Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Current application, US Application No. 18/712,560 filed on 05/22/2024, is a National Stage entry of PCT/EP2022/08005 , International Filing Date: 10/27/2022, which claims foreign priority to EP 63286277 filed on 12/06/2021.
DETAILED ACTION
This office action is responsive to the application filed on 05/22/2024. Claims 1-20 are currently pending. Claims 1-15 are amended and claims 16-20 are added new by applicant.
Specification
The abstract of the disclosure is objected to because of following informalities: The phrase “a global mechanical property related to the layer” should be replaced with “a global mechanical property of the layer” or with an appropriate phrase for clarity and consistency with earlier phrase “a mechanical property of a layer” in “A method for determining a mechanical property of a layer”.
The phrase “the first mechanical property” in “predict a mechanical property distribution or associated overlay map based on the first mechanical property” lacks an antecedent basis and appear to mean “the global mechanical property”. The limitation “the mechanical property variation” lacks an antecedent basis and should be replaced with “the mechanical property variation” for clarity.
A corrected abstract of the disclosure is required and must be presented on a separate sheet, apart from any other text. See MPEP § 608.01(b).
Claim Objections
Claims 16-20 are objected to because of the following informalities: As per claim 16, the limitation “therein” in “A computer program product comprising a non-transitory computer readable medium having instructions therein” should be replaced with “in the non-transitory computer readable medium” or with an appropriate phrase for clarity.
As per claims 17-20, claims are also objected because base claim 16 is objected.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor regards as the invention. As per claims 1 and 16, the limitation “a global mechanical property related to the layer” in “determine a global mechanical property related to the layer based on at least the input data” is ambiguous because it is not clear which subject or object that the property represents although the limitation vaguely reveals the subject (or object) is related to the layer. For the sake of the examination, the limitation is interpreted as “a global mechanical property of the layer”.
Claims also recite limitations “the first mechanical property” and “the mechanical property variation”. There are insufficient antecedent bases for these limitations in the claims.
As per claims 2-15 and 17-20, claims are also rejected because base claims 1 and 15 are rejected.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-20 are rejected under 35 U.S.C. 101 because the claimed invention is directed to nonstatutory subject matter. The claimed invention is directed to a judicial exception (i.e., a law of nature, a natural phenomenon, or an abstract idea) without significantly more.
Specifically, representative claim 1 recites:
“A method for determining a mechanical property of a layer applied to a substrate, (1.A) the method comprising:
obtaining input data comprising metrology data relating to the layer; (1.B.1)
obtaining layout data relating to a layout of a pattern to be applied in the layer; (1.B.2)
using a first model or first model term to determine a global mechanical property related to the layer based on at least the input data; (1.C.1) and
using at least one second model or at least one second model term to predict a mechanical property distribution or associated overlay map based on the first mechanical property and the layout data, the mechanical property distribution describing the mechanical property variation over the layer. (1.C.2)”.
The claim limitations in the abstract idea have been highlighted in bold above; the remaining limitations are “additional elements”.
Under the Step 1 of the eligibility analysis, we determine whether the claims are to a statutory category by considering whether the claimed subject matter falls within the four statutory categories of patentable subject matter identified by 35 U.S.C. 101: Process, machine, manufacture, or composition of matter. The above claim is considered to be in a statutory category (Process - Method).
Under the Step 2A, Prong One, we consider whether the claim recites a judicial exception (abstract idea). In the above claim, the highlighted portion constitutes an abstract idea because, under a broadest reasonable interpretation, it recites limitations that fall into/recite an abstract idea exception. Specifically, under the 2019 Revised Patent Subject Matter Eligibility Guidance, it falls into the grouping of subject matter when recited as such in a claim limitation, that covers mathematical concepts (mathematical relationships, mathematical formulas or equations, mathematical calculations), and mental processes (concepts performed in the human mind including an observation, evaluation, judgement, and/or opinion).
For example, highlighted limitations/steps (1.A) and (1.C.1)– (1.C.2) are treated by the Examiner as belonging to Mathematical Concept grouping or a combination of Mathematical Concept and Mental Processing groupings as the limitations show Mathematical Relationship with optional Mental observation.
The highlighted limitation (1.A and 1.C.1) show a mathematical calculation of a mechanical property for a layer using the first model or the first model term or show the mathematical relationship among the mechanical property, the layer and the first model or the first model term (see specification- first model, stress, deformation, global stress, effective thin film properties [0049-0060, see equations for σeff and the first model]).
The highlighted limitation (1.C.2) show a mathematical calculation of a mechanical property distribution or associated overlay map form the mechanical property using the at least one second model or the at least one second model term or show mathematical relationship among the mechanical property distribution or associated overlay map, the mechanical property, and the at least one second model or the at least one second model term (see specification – stress distribution ‘map’ or overlay distribution ‘map’, [0052-0058, 0061-0069, see equations for the first order ‘2D’ bulk response term and the second order local response term of the second model for example]).
Next, under the Step 2A, Prong Two, we consider whether the claim that recites a judicial exception is integrated into a practical application.
In this step, we evaluate whether the claim recites additional elements that integrate the exception into a practical application of that exception.
The above claims comprise the following additional elements: (Side Note: duplicated elements are not repeated)
In Claim 1: “A method for determining a mechanical property of a layer applied to a substrate”, and “obtaining input data comprising metrology data relating to the layer; obtaining layout data relating to a layout of a pattern to be applied in the layer”;
In Claim 16: “A computer program product comprising a non-transitory computer readable medium having instructions therein” and “the instructions, when executed by a computer system, configured to cause the computer system to at least”;
As per claim 1, the additional element in the preamble “A method for determining a mechanical property of a layer applied to a substrate” is not a meaningful limitation because the limitation simply links a method with an abstract idea, i.e. determining a mechanical property of a layer. The limitations/elements “layer” and “substrate” represents standard element in the art and are not particular.
The limitations/steps “obtaining input data comprising metrology data relating to the layer; obtaining layout data relating to a layout of a pattern to be applied in the layer” represent standard data collection step in the art and only add insignificant extra solution activity to the judicial exception.
As per claim 16, the additional element in the preamble “A computer program product comprising a non-transitory computer readable medium having instructions therein” is not qualified as a meaningful limitation because the limitation even fails to link the computer program product with a particular operation or field of use.
The limitation/step “the instructions, when executed by a computer system, configured to cause the computer system to at least” represents a component of a general computer and the instructions are not particular in the art.
In conclusion, the above additional elements except those treated as patent eligible, considered individually and in combination with the other claim elements as a whole do not reflect an improvement to the computer technology or other technology or technical field, and, therefore, do not integrate the judicial exception into a practical application. No particular machine or real-world transformation are claimed. Therefore, the claims are directed to a judicial exception and require further analysis under the Step 2B.
Under Step 2B analysis, the above claims fail to include additional elements that are sufficient to amount to significantly more than the judicial exception as shown in the prior art of record.
The limitations/elements listed as additional elements above are well understood, routine and conventional steps/elements in the art according to the prior art of record. (See Hooge, Van Haren, Smorenberg, Van Dijk and others in the list of prior art of record)
Claims 1-20, therefore, are not patent eligible.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 6, 8-9, 15, 16-17 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Hooge (US 20180342410 A1), hereinafter ‘Hooge’ best understood by the examiner.
As per claim 1, Hooge discloses
A method for determining a mechanical property of a layer applied to a substrate, (global wafer distortion [abs, 0014], method … contribute to the global distortion … ameliorates the global distortion [claim 1]) the method comprising:
obtaining input data comprising metrology data relating to the layer; (wafer shape data obtained [0039, Fig. 1], obtaining shape data of the semiconductor wafer [0040, claim 1])
obtaining layout data relating to a layout of a pattern to be applied in the layer; (producing coverage layout, a pattern [0110, 0112, claim 12])
using a first model or first model term to determine a global mechanical property
related to the layer based on at least the input data; (global wafer distortion [abs, 0014], based on the obtained shape data, local distortion, using the estimated forces, contribute to the global distortion, generating amelioration pattern, ameliorates the global distortion [claim 1], shape data, global distortion [0025], stresses, global distortion [0026], simulation or model of the subject wafer, stress estimator, physic model, Finite element ‘FE’ model [0041-0062], cooperative operation of the subject - wafer
simulator 220 and the stress estimator 230 may be described
as determining , based on the obtained shape data, … contributes to the global distortion of the semiconductor wafer [0063]) and
using at least one second model or at least one second model term to predict a
mechanical property distribution or associated overlay map based on the first
mechanical property and the layout data, the mechanical property distribution
describing the mechanical property variation over the layer. (simulation or model of the subject wafer, stress estimator, physic model, Finite element ‘FE’ model [0041-0062], finite element simulation, a film stress profile, distribution of stresses across all pieces, rule of superposition, all pieces can add up together to form an overall distortion [0060], local distortion, global distortion [0063], ameliorates the global and local distortion of the semiconductor wafer [0064]. amelioration action, backside layer, backside pattern, the thickness of the film, designed pattern/stress distribution profile [0065], amelioration pattern, local distortion [claim 11], amelioration pattern, coverage layout [claim 12], local distortion, a map or a model of the wafer, estimates the amount of local distortion ’e.g. out-of-plane and/or in-plane distortion’ [0075])
Although Hooge does not use the identical limitations/terms as the limitations/terms of the claim, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the limitations/terms of Hooge to disclose the claim limitations.
As per claim 16, Hooge discloses
A computer program product comprising a non-transitory computer readable medium having instructions therein, the instructions, when executed by a computer system, configured to cause the computer system to at least: (software, instructions stored on one or more computer - readable storage media that , when executed by one or more processors, perform the recited operations [022]).
Hooge further discloses the remaining limitations as shown in claim 1 above.
Claim 1 is also rejected under 35 U.S.C. 103 as being unpatentable over Van Haren (van Haren, and et al. "Intra-field stress impact on global wafer deformation." In Metrology, Inspection, and Process Control for Microlithography XXXIII, vol. 10959, pp. 311-325. SPIE, 2019), hereinafter ‘vH’ best understood by the examiner.
As per claim 1, vH discloses
A method for determining a mechanical property of a layer applied to a substrate, (consider the impact of local stress variations on the global wafer deformation, One of the sources of the local stress variation is linked to the intra-field or intra-die pattern density, demonstrate that the intra-field stress distribution not only affects the intra-field overlay performance but has also a significant impact on the global wafer distortion [abs], intra-die stress impact on overly, Finite Element ‘FE’ based analysis, extending … to investigate local wafer distortions that are caused by intra-field and intra-die stress variation by modifying … FE approach [pg. 3 par. 3 – 4]) the method comprising:
obtaining input data comprising metrology data relating to the layer; (in-die measurement technique, intra-die … measurement, wafer shape measurement [pg. 5 par. 2-4, pg. 6 par. 2 – 3, Fig. 5], measured wafer distortions [pg. 10 par. 3, Fig. 10])
obtaining layout data relating to a layout of a pattern to be applied in the layer; (layout that can be used to study the local stress impact on the intra- and inter-field overlay performance [pg. 8 par 2 -1 from the bottom, Fig. 7], striper geometry ‘or intra-field stress’, a strong correlation with the field and die layout, intra-field stress induced shape changes [pg. 10 par. 1-3, Fig. 10])
using a first model or first model term to determine a global mechanical property
related to the layer based on at least the input data; (a Finite Element based model, waveform shape measurements as the input, the modeled displacement [pg. 12 par.1 Fig. 12], Both the intra-field and global wafer distortion signatures are predicted very well by the free-form wafer shape to IPD prediction model [pg. 12 par. 2], approach to predict the process-induced in-plane displacement ‘IPD’ [pg. 5 par. 4], global wafer distortion [pg. 10 par. 4-5, pg. 14 par. 1 conclusion]) and
using at least one second model or at least one second model term to predict a
mechanical property distribution or associated overlay map based on the first
mechanical property and the layout data, the mechanical property distribution
describing the mechanical property variation over the layer.(intra-field stress distribution, intra-field displacement signature [pg. 4 par. 2-3, Fig. 3, 4], Comparing the statistics of the intra-field distortion ‘bottom row of Figure 11’ to the global wafer distortion ‘top row of Figure 11’, it is clear the wafer distortion is dominated by the field signature [pg. 10 par. 4], Both the intra-field and global wafer distortion signatures are predicted very well by the free-form wafer shape to IPD prediction model [pg. 12 par. 2], the higher order global wafer deformations due to a non-uniform intra-field stress distribution [pg. 12 par. 5], wafer alignment ‘HOWA’ models [pg. 2 par. 1], high-order polynomial model … HOWA3 [pg. 5 par. 1]).
Although vH does not use the identical limitations/terms as the limitations/terms of the claim, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the limitations/terms of vH to disclose the claim limitations.
As per claims 2 and 17, Hooge discloses claims 1 and 16 set forth above.
Hooge further discloses mechanical property is related to stress within the layer (distorted wafer … caused by stresses or forces [0018], stress in a thin film introduces a curvature [0052])
As per claim 3, Hooge discloses claim 2 set forth above.
Hooge further discloses the mechanical property is a product of stress and layer thickness (local in - plane force ‘e . g . , stress * thickness’ [0099]).
As per claims 6 and 20, Hooge discloses claims 1 and 16 set forth above.
Hooge further discloses use of magnifications as a set of process correction parameters ([0086]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge to use the first model or first model term comprising a zeroth order magnification model term with a rationale for performing accurate process operation.
As per claim 8, Hooge discloses claim 1.
Hooge discloses using a library of predetermined global mechanical properties by selecting an appropriate predetermined mechanical property from the library based on the input data. (use of libraries [0058-0062, Fig. 6A], pattern chosen from the coverage library [0110.claim 12]).
As per claim 9, Hooge discloses claim 1.
Hooge further discloses stress in a thin film to be included in the model or model term for a representation of wafer deformation (IPD, wafer bow. Stress in a thin film [0049-0054]).
As per claim 15, Hooge discloses claim 1.
Hooge discloses using a library of predetermined global mechanical properties by selecting an appropriate predetermined mechanical property from the library based on the input data. (use of libraries [0058-0062, Fig. 6A], pattern chosen from the coverage library [0110.claim 12]).
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge to include comprises a static library of predetermined stress or overlay distributions according to a plurality of different layout options and select an appropriate stress or overlay distribution from the library based on the layout data for the at least one second model or second model term with a rationale for performing an accurate process operation.
Claims 4-5, 7, 12-14 and 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Hooge in view of vH.
As per claims 4 and 18, Hooge discloses claims 1 and 16
Hooge is silent regarding a mean value for the mechanical property over the substrate.
vH discloses average contraction or expansion of the top wafer which can describe main contributor of the wafer deformation by a symmetric wafer scaling term (see vH – average, wafer scaling term [pg. 9 par. 1]).
vH is in the same semiconductor wafer distortion analysis art like Hooge.
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge in view of vH to use the first model or first model term to determine a mean value for the mechanical property over the substrate with a rationale for performing accurate process operation (see Hooge – accuracy of substrate alignment [0029],
As per claim 5 and 19, Hooge discloses claims 1 and 16.
Hooge is silent regarding isotropic model or model term.
vH discloses symmetric wafer scaling term ([pg. 9 par. 1] and vH is in the same semiconductor wafer distortion analysis art like Hooge.
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge in view of vH to use the first model or first model term and at least one second model or second model term, wherein each comprise an isotropic model or model term with a rationale for performing an accurate process operation.
As per claim 7, Hooge discloses claim 1.
Hooge is silent regarding fitting the input data to the first model or first model term.
vH discloses using higher order polynomial fitting for representing deformation (higher-order polynomial fitting, wafer distortion residuals as function of a polynomial fit [pg. 13 par. 3, Fig. 14]) and vH is in the same semiconductor wafer distortion analysis art like Hooge.
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge in view of vH to fit the input data to the first model or first model term, to determine the first mechanical property with a rationale for performing an accurate process operation.
As per claim 12, Hooge discloses claim 1.
Hooge is silent regarding the at least one second model or second model term additionally uses one or more selected from: a wafer alignment readout wafer quality indicator, an overlay stack sensitivity indicator, and/or level sensor data, to determine the second mechanical property distribution or associated overlay map.
vH discloses process-induced distortion map construction from alignment readout (alignment readout [pg. 10 par. 3, Fig, 10]).
vH is in the same semiconductor wafer distortion analysis art like Hooge.
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge in view of vH to select a wafer alignment readout wafer quality indicator for the at least one second model or second model term with a rationale for performing an accurate process operation.
As per claim 13, Hooge discloses claim 1.
Hooge discloses the layout data comprises digital patterns (digital patterns [0110-0112, claim 12]), but is silent regarding the layout data comprises one or more selected from: the number of dies within a field, positions of dies within a field, dimensions of dies within a field, a layout file and/or pattern density.
vH discloses number of dies as the layout data (chosen a ‘4 x 2’ die layout, whole wafer layout [pg. 2 par. 4-5, Fig. 2], field and die layout [pg. 10 par. 2]) and vH is in the same semiconductor wafer distortion analysis art like Hooge.
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge in view of vH to select a number of dies as the layout data with a rationale for performing an accurate process operation.
As per claim 14, Hooge discloses claim 1.
Hooge is silent regarding the input data comprised one or more selected from: alignment data, wafer shape data, overlay data, ellipsometry metrology of film properties, Raman spectroscopy data, profile metrology and/or focus data.
vH discloses process-induced distortion map construction from alignment readout (alignment readout [pg. 10 par. 3, Fig, 10]).
vH is in the same semiconductor wafer distortion analysis art like Hooge.
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge in view of vH to select a wafer alignment readout data as the input with a rationale for performing an accurate process operation.
Claims 10 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Hooge in view of Aksoy (Aksoy, B., and et al. "High-resolution spatiotemporal strain mapping reveals non-uniform deformation in micropatterned elastomers." Journal of Micromechanics and Microengineering 27, no. 4 (2017): 045008), hereinafter ‘Aksoy’
As per claims 10 and 11, Hooge discloses claim 1.
Hooge is silent regarding the at least one second model or second model term comprises a first order bulk response term and a second order local response model term.
Aksoy recites bulk response and local response associated with spatiotemporal strain mapping related to the deformation in patterned substrate. (micropatterns or fabrication imperfections … strain profile, bulk response [pg. 2 left col par. 2], strain mapping technique … bulk response [pg. 3 right col par. 1 from the bottom], exhibit a high spatial resolution and sensitivity to the variations in
the local response [pg. 2 left col par. 2]).
Aksoy in in the same patterned substrate deformation analysis art like Hooge.
Therefore, it would have been obvious to one of ordinary skill in the art at the time when invention is filed before the effective filing date of the current application to modify the teachings of Hooge in view of vH to fit the input data to the first model or first model term, to determine the first mechanical property with a rationale for performing an accurate process operation.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1 and 16 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 and 19, respectively, of US Patent No. 11,300,889 B2 (reference). Although the corresponding claims at issue are not identical, they are not patentably distinct from each other because every limitation of current claim is anticipated by the reference claim and/or unpatentable over the reference claim in view of Hooge or vH.
Notes with regard to Prior Art
The prior arts made of record are provided as additional references relevant to the current claims.
Smorenberg (WO 2020234028 A1) discloses a method for determining a sampling scheme, which can for example be used in measurement and/or inspection of a semiconductor substrate, and/or for controlling the lithographic process which is performed on a semiconductor substrate by using finder print models ([0011-0012]).
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DOUGLAS KAY, whose telephone number is (408) 918-7569. The examiner can normally be reached on M, Th & F 8-5, T 2-7, and W 8-1.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Arleen M Vazquez can be reached on 571-272-2619. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see https://ppair-my.uspto.gov/pair/PrivatePair. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DOUGLAS KAY/
Primary Examiner, Art Unit 2857
Prosecution Insights