DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chen et al. [US 2015/0186581 A1].
Regarding claims 1 and 17, Chen et al. discloses a method for a mark design for use in imaging of a pattern on a substrate using a lithographic process in a lithographic apparatus (paragraphs [0005]-[0007] teaches design of a metrology target), the method comprising:
obtaining a mark construction for a mark to be formed on a substrate and to be measured by a physical measurement apparatus (paragraphs [0063]-[0064] teaches various metrology target designs in order to confirm the suitability and/or viability of one or more of the proposed target designs);
obtaining a spatial variation of a geometric parameter associated with the mark construction, wherein the spatial variation is associated with a lithographic process (paragraphs [0067]-[0071] teaches model formulation describes the known physics and chemistry of the overall process, and each of the model parameters desirably corresponds to a distinct physical or chemical effect, including process parameters and one or more geometric dimensions can be defined for a particular target design such as pitch, critical dimension of a feature of the metrology target design); and
determining, by a hardware computer (paragraphs [0113]-[0114] teaches computer programs), a geometry design of individual patterns of a mark based on the spatial variation of the mark (Figs. 7-9 and paragraphs [0067]-[0074], teaches one or more geometric dimensions can be defined for a particular target design such as pitch, critical dimension of a feature of the metrology target design, etc.), and
displaying the determined geometry design to a user on a hardware display (paragraph [0110] teaches wherein the user may select the required metrology target for use in a particular semiconductor processing step).
Regarding claims 2, 16 and 18, Chen et al. discloses wherein the geometry design is further determined based on surrounding patterns of the mark (paragraph [0074]).
Regarding claims 3 and 19, Chen et al. discloses wherein determining the geometry design includes determining at least one selected from: a critical dimension, pitch, or sub-segmentation, of the individual patterns of the mark (paragraph [0070]).
Regarding claims 4-6 and 20, Chen et al. discloses wherein determining the geometry design includes iteratively adjusting the geometry design based on predicted measurement performance, wherein each iteration includes: computing a cost function; determining whether the cost function satisfies a specified condition; and adjusting the geometry design based on a determination that the cost function does not satisfy the specified condition, wherein the cost function includes one or more performance indicators that are indicative of the optical measurement performance of the mark (paragraphs [0082]-[0083] teaches the cost function to define the parameter of the set of test patterns).
Regarding claim 7, Chen et al. discloses wherein obtaining the mark construction includes: inputting a target design layout and design layout variables of the lithographic process to a simulation model that is configured to generate a three-dimensional (3D) representation of a design corresponding to the target design layout printed on the substrate using the lithographic process; and executing the simulation model to obtain simulation results, the simulation results including the 3D representation of the design (paragraph [0066]).
Regarding claims 8 and 9, Chen et al. discloses wherein obtaining the spatial variation of the geometric parameter includes: identifying, in the target design layout, a grid having the mark, wherein a size of the grid is greater than a size of the mark; and obtaining, from the simulation results, the spatial variation of the geometric parameter on the grid, wherein obtaining the spatial variation includes interpolating the grid to obtain spatial variation of the geometrical parameter for each of the individual patterns of the mark (paragraphs [0067]-[0074], teaches one or more geometric dimensions can be defined for a particular target design).
Regarding claims 10 and 11, Chen et al. discloses wherein determining the geometry design includes reconstructing, using a simulation model (paragraph [0063]), the individual patterns of the mark based on the spatial variation of the geometric parameter and a mark design layout, wherein the individual patterns are further reconstructed based on a characteristic of surrounding patterns of the mark (paragraphs [0067]-[0074]).
Regarding claim 12, Chen et al. discloses wherein the spatial variation of the geometric parameter is obtained using at least one selected from: of measurement data, empirical data, or experimental data, and wherein the geometric parameter includes at least one selected from: a layer thickness, a chemical mechanical polishing dishing height, an etch sidewall angle, a litho-etch critical dimension bias, or an etch floor tilt (paragraphs [0067]-[0074]).
Regarding claim 13, Chen et al. discloses wherein the geometric parameter varies within an individual pattern (paragraphs [0056] and [0061]).
Regarding claim 14, Chen et al. discloses comprising: obtaining, using a first simulation model, a measurement performance of the mark; performing a measurement using a measurement tool to obtain a measurement signal, the measurement signal including a set of optical measurement parameters obtained using the mark; and adjusting the measurement signal based on the measurement performance (Fig. 7 and paragraphs [0063]-[0067] and [0085]-[0091]).
Regarding claim 15, Chen et al. discloses wherein the mark includes at least one selected from: a metrology mark, an overlay mark or an alignment mark, and further comprising generating a mask pattern based on the mark, the mask pattern including patterns corresponding to a target design layout to be printed on the substrate (paragraphs [0035]).
Response to Arguments
Applicant's arguments filed 07/20/2026 have been fully considered but they are not persuasive.
Applicant argues that the applied reference does not teach wherein the mark to be formed on a substrate and to be measured by a physical measurement apparatus and displaying the determined geometry design to a user on a hardware display, see pages 9-11 of the remarks.
The Examiner respectfully disagrees. As applied above, Chen et al. discloses wherein the determine one or more structural parameters of a metrology target is usable in the manufacture of devices by a lithographic technique and to methods of manufacturing using a lithographic technique (paragraph [0002]), wherein the one or more geometric dimensions can be defined for a particular target design such as pitch, critical dimension of a feature of the metrology target design (paragraph [0070]) and wherein the user may select the required metrology target for use in a particular semiconductor processing step (paragraph [0110]).
As such, Applicant’s arguments are not persuasive and the rejection under 35 USC § 102 is maintained.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DEORAM PERSAUD whose telephone number is (571)270-5476. The examiner can normally be reached M-F 8AM-5PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Minh-Toan Ton can be reached at 571-272-2303. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/DEORAM PERSAUD/Primary Examiner, Art Unit 2882
