DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim(s) 1-12 and 15-17 are rejected under 35 U.S.C. 102(a1).
Claim(s) 13-14 are rejected under 35 U.S.C. 103.
Response to Arguments
Applicant's arguments filed 01/28/2026 have been fully considered but they are not persuasive.
In regards to the applicant’s arguments that the prior art fails to disclose “a plurality of discrete values, each discrete value of the plurality of discrete values being maintained for at least one count of a clock signal”, the Examiner respectfully disagrees.
Attention is brought to Figures 6a-f of the reference to Ueno, wherein a plurality of voltage maximum and minimum values are determined over a predetermined interval according to a provided clocking signal (par. 47-55).
Attention is also brought to paragraphs 8-10, which explicitly disclose measuring a phase difference of the optical feedback signal through the counting of mode hops in an interference pattern.
Claim Interpretation
The following is a quotation of 35 U.S.C. 112(f):
(f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph:
An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof.
This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, because the claim limitation(s) uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitation(s) is/are: “a computation unit”, “a target phase computation unit”, and “a phase unwrapping unit”, in claims 10-11.
Because these claim limitation(s) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof.
If applicant does not intend to have these limitation(s) interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, applicant may: (1) amend the claim limitation(s) to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitation(s) recite(s) sufficient structure to perform the claimed function so as to avoid them being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-12 and 15-17 are rejected under 35 U.S.C. 102(a1) as being anticipated by US Publication 2008/0181354 to Ueno.
In regards to claims 1-12 and 15-17, Ueno discloses and shows in Figures 1-5, an optoelectronic device and method for a self-mixing interferometer (par. 14, 43), comprising:
a clock generator (par. 50-52), wherein:
the clock generator is operable to provide a clock signal (par. 50-52),
a driver block (4) operable to provide a time modulated control signal, wherein the control signal has a periodic waveform (Figures 1-2) (par. 16, 44, 46), and comprises a plurality of discrete values (voltage maximum and voltage minimum values) (Figure 6b), each discrete value of the plurality of discrete values being maintained for at least one count of the clock signal (Figures 6a-6f) (par. 47, 50-55; wherein measurements of the maximum and minimum voltage are performed over predetermined intervals according to the provided clock signal),
a semiconductor laser (1) operable to emit a laser light with a time-dependent characteristics being a function of the control signal and self-mixing interference optical feedback (Figures 2, 3a-3b) (par. 16, 44-45, 48),
a detector (2) operable to generate a detection signal depending on the time-dependent characteristics (Figures 3a-3b) (par. 9, 16, 44, 48), and
a switching network (5, 8-10) arranged to provide a time sequence of detection signals per period of the control signal (Figures 4-5) (par. 15-16, 44, 48-50; wherein the system includes a variety of circuits to provide desired detection signals);
[claim 2] wherein the optoelectronic device for a self-mixing interferometer comprises a common integrated circuit (par. 4; wherein the photodiode may be built-in to the semiconductor laser);
[claim 3] wherein the detector comprises;
a photodetector (2) operable to provide the detection signal as an optical power readout (Figures 3a-3b) (par. 9, 16, 44, 48), and/or
a voltage meter (5) operable to provide the detection signal as a voltage readout (par. 9, 16, 44, 48; wherein the amplifier provides a voltage output);
[claim 4] wherein the switching network is configured to assume a sequence of switching states, and in each switching state the switching network provides a detection signal from the time sequence of detection signals (Figures 2, 3a-3b) (par. 9, 43-44, 46, 48-58; wherein the laser source and detection periods include a first continuously increasing portion, and a second continuously decreasing portion; wherein each portion provides a time sequence detection signal).
[claim 5] wherein the driver block comprises a stimulus generator (SGE) and a driver circuit (DRV), wherein:
the stimulus generator (SGE) is operable to generate a periodic stimulus waveform as a function of time (par. 16, 44-48; wherein the laser may be a VCSEL or a DFB semiconductor laser), and
the driver circuit (DRV) is arranged to receive the stimulus waveform and is operable to generate the control signal depending on the received stimulus waveform (par. 16, 44-48);
[claim 6] wherein the driver circuit is operable to provide the time modulated control signal synchronous with the clock signal, and the sequence of switching states is synchronized with the clock signal (Figures 6a-6f) (par. 48-58);
[claim 7] wherein the stimulus generator is synchronized with the clock signal so that the time dependence of the stimulus waveform is determined by the clock signal (Figures 6a-6f) (par. 48-58);
[claim 8] wherein the driver circuit comprises an amplifier operable to generate the time modulated control signal as a driving current for the semiconductor laser (par. 44-46, 48; wherein the laser may be a VCSEL or a DFB semiconductor laser);
[claim 9] further comprising an analog-to-digital converter (5), wherein the analog-to-digital converter (ADC) is coupled between the detector and the switching network and operable to receive the detection signal and provide the detection signal in digital form to the switching network (Figure 1) (par. 44, 48, 71), or the analog-to-digital converter (ADC) is coupled to output terminals of the switching network and comprises time-interleaved ADC-channels, each associated with a corresponding output terminal of the switching network;
[claim 10] further comprising a computation unit (9) operable to acquire detection values from the time sequence of detection signals and calculate an output being indicative of a target distance to be placed in a field of view of the semiconductor laser (par. 16, 67-69, 71);
[claim 11] wherein the computation unit comprises a target phase computation unit (840-842) and/or a phase unwrapping unit (843), the target phase computation is operable to determine the output from the time sequence of detection signals and corresponding control signal (par. 16, 51, 55-58, 71; wherein a target distance is calculated), the phase unwrapping unit is operable to remove a phase discontinuity from the calculated output (par. 59; wherein a corrected value is provided);
[claim 12] a self-mixing interferometer further comprising: a reflective membrane (102), placed with respect to the semiconductor laser (SCL) so as to form the self-mixing interferometer (par. 5; wherein a Fabry-Perot type semiconductor laser is disclosed);
[claim 16] wherein a distance to the target is calculated from the time sequence of detection signals and the corresponding control signal, and/or the distance is calculated as a function of time to derive a sound signal (par. 16, 67-69, 71);
[claim 17] wherein the acquired detection values comprise one or more phases of the time sequence of detection signals (Figures 3a-b, 23-24) (par. 8-10; wherein a phase difference in an optical feedback signal is illustrated by the mode hops of a staircase interference pattern), and wherein the target phase computation unit and/or the phase unwrapping unit is configured to determine a measurement signal indicating a distance between the semiconductor laser and the membrane using at least the one or more phases (par. 8-10, 14; wherein the number of mode hops are counted over an interval to determine a distance to a target).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 13-14 are rejected under 35 U.S.C. 103 as being unpatentable over Ueno, in view of US Publication 2022/0201403 to Khaleghimetbodi et al.
In regards to claims 13-14, Ueno differs from the limitations in that it is silent to the system and method:
[claim 13] wherein the driver block, semiconductor laser (SCL), detector (DTC) and/or switching network (SWN) are integrated into a common integrated circuit; and
[claim 14] wherein the system is arranged as an optical microphone and being operable to provide a sound signal as output.
However, Khaleghimetbodi teaches and shows in Figures 2-7, a self-mixing interferometric optical microphone system, which is configured on a common substrate and photonic integrated circuit (par. 4, 24, 88-89, 98).
Therefore, it would have been obvious to one of ordinary skill in the art at the time of the effective filing date of the invention, to modify Ueno to include the common substrate, optical microphone configuration discussed above for the advantage of providing a compact optical detector configuration, with a reasonable expectation of success.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN M HANSEN whose telephone number is (571)270-1736. The examiner can normally be reached Monday to Friday, 8am to 4pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Michelle Iacoletti can be reached at 571-270-5789. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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JONATHAN M. HANSEN
Primary Examiner
Art Unit 2877
/JONATHAN M HANSEN/Primary Examiner, Art Unit 2877
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