DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5/27/2024. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 4-5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. US 2021/0193544 in view of Macris et al. US 2006/0118925.
Re claim 1, Lin teaches a liquid metal packaging structure (2, fig3, [66]) for chip heat dissipation, comprising:
a fixing frame (40, fig3, [30]) and a sealing frame (MUF and E, fig3, [23, 32]), wherein the fixing frame (40, fig3, [30]) is located outside a chip (102, fig3, [13]) and an electronic component (30, fig3, [22]), the sealing frame (MUF and E, fig3, [23, 32]) is provided inside the fixing frame (40, fig3, [30]), the sealing frame (MUF and E, fig3, [23, 32]) seals the electronic component (30, fig3, [22]), and the chip (102, fig3, [13]) is provided in inner frame of the sealing frame (E, fig3, [23, 32]), wherein
a heat sink (50, fig3, [34]) is provided on side of the sealing frame (top side of MUF and E, fig3, [23, 32]) away from the electronic component (30, fig3, [22]),
Lin does not explicitly show the heat sink is hermetically covered on an end surface of the sealing frame, the sealing frame is filled with liquid metal, and the heat sink is integrally molded with a pressing block at a position corresponding to the inner frame of the sealing frame, and the liquid metal is arranged between the chip and the pressing block.
Macris teaches the heat sink (168, fig16, [81]) is hermetically covered (hermetic joint 140 (144/142), fig16, [57, 58]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Lin and Macris to replace 52 with 140 of Macris. The motivation to do so is to improve heat exchange (Macris, [57]).
Lin in view of Macris teaches the heat sink (Lin, 50, fig3, [34]) is hermetically covered on an end surface of the sealing frame (Lin, 52 as 140 of Lin cover top surface of E, fig3), the sealing frame (Lin, MUF and E, fig3, [23, 32]) is filled with liquid metal (Macris, 142, fig16, [58]), and the heat sink (Lin, 50, fig3, [34]) is integrally molded with a pressing block (Macris, 144, fig16, [75]) at a position corresponding to the inner frame of the sealing frame (Macris 144 formed to contact Lin E with Macris 142 in contact with 102/202 of Lin in fig3), and the liquid metal (Macris, 142, fig16, [58]) is arranged between the chip (Macris, 108, fig16, [57]) and the pressing block (Macris, 144, fig16, [75]).
Re claim 2, Lin modified above teaches the liquid metal packaging structure for chip heat dissipation as claimed in claim 1, wherein a first insulating film (Lin, 103, fig3, [15]) is sealed between the heat sink (Lin, 50, fig3, [34]) and the sealing frame (Lin, MUF and E, fig3, [23, 32]).
Re claim 4, Lin modified above teaches the liquid metal packaging structure for chip heat dissipation according to claim 1, wherein the sealing frame (Lin, MUF and E, fig3, [23, 32]) is provided with a cavity (Lin, space in MUF housing 30, fig3) corresponding to the end surface of the electronic component (Lin, 30, fig3, [22]), and the electronic component is provided in the cavity.
Re claim 5, Lin modified above teaches the liquid metal packaging structure for chip heat dissipation as claimed in claim 4, wherein an insulating layer (Lin, 32, fig3, [22]) is arranged between the sealing frame (Lin, MUF and E, fig3, [23, 32]) and the electronic component (Lin, 30, fig3, [22]).
Re claim 7, Lin modified above teaches the liquid metal packaging structure for chip heat dissipation according to claim 1, wherein the inner frame of the sealing frame (Lin, E, fig3, [23, 32]) is greater than or equal to the chip (Lin, 102, fig3, [13]) undercut angle in size.
Claim(s) 1, 4-5 and 8-9 are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. US 2015/0035135 in view of Macris et al. US 2006/0118925.
Re claim 1, Huang teaches a liquid metal packaging structure (100, fig12, [31]) for chip heat dissipation, comprising:
a fixing frame (22 and 20 in contact with 22, fig12, [19, 31]) and a sealing frame (16 and 20 between 24’, fig12, [31]), wherein the fixing frame (22 and 20 in contact with 22, fig12, [19, 31]) is located outside a chip (40, fig12, [31]) and an electronic component (die stack 12, fig12, [31]), the sealing frame (16 and 20 between 24’, fig12, [31]) is provided inside the fixing frame (22 and 20 in contact with 22, fig12, [19, 31]), the sealing frame (16 and 20 between 24’, fig12, [31]) seals the electronic component (bottom die of stack 12, fig12, [31]), and the chip (40, fig12, [31]) is provided in inner frame of the sealing frame (20 between 24’, fig12, [31]), wherein
a heat sink (24, fig12, [31]) is provided on side of the sealing frame away from the electronic component.
Huang does not explicitly show the heat sink is hermetically covered on an end surface of the sealing frame, the sealing frame is filled with liquid metal, and the heat sink is integrally molded with a pressing block at a position corresponding to the inner frame of the sealing frame, and the liquid metal is arranged between the chip and the pressing block.
Macris teaches the heat sink (168, fig16, [81]) is hermetically covered (hermetic joint 140 (144/142), fig16, [57, 58]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Huang and Macris to replace each 16 with 140 of Macris. The motivation to do so is to improve heat exchange (Macris, [57]).
Huang in view of Macris teaches the heat sink (Huang, 24, fig12, [31]) is hermetically covered on an end surface of the sealing frame (Huang, 16 and 20 between 24’, fig12, [31]), the sealing frame (Huang, 16 and 20 between 24’, fig12, [31]) is filled with liquid metal (Huang 16 replaced by Macris 140 with liquid metal 142 in fig16), and the heat sink (Huang, 24, fig12, [31]) is integrally molded with a pressing block (Huang, convex part of 24 in contact with liquid metal 142 located in place of 16/16A above 40, fig12) at a position corresponding to the inner frame of the sealing frame (20 between 24’, fig12, [31]), and the liquid metal (Huang, 16/16A above 40 using Marcus 140, fig12; Macris, 142, fig16, [58]) is arranged between the chip (Huang, 40, fig12) and the pressing block (Huang, convex part of 24 above 40, fig12).
Re claim 4, Huang modified above teaches the liquid metal packaging structure for chip heat dissipation according to claim 1, wherein the sealing frame (Huang, 16 and 20 between 24’, fig12, [31]) is provided with a cavity (Huang, space housing 12A/12, fig12) corresponding to the end surface of the electronic component (Huang, lower die of die stack 12, fig12, [31]), and the electronic component is provided in the cavity.
Re claim 5, Huang modified above teaches the liquid metal packaging structure for chip heat dissipation as claimed in claim 4, wherein an insulating layer (Huang, ILD of upper die around TSV, fig12) is arranged between the sealing frame (Huang, 16 and 20 between 24’, fig12, [31]) and the electronic component (Huang, lower die of die stack 12, fig12, [31]).
Re claim 8, Huang modified above teaches the liquid metal packaging structure for chip heat dissipation as claimed in claim 1, wherein the outer frame of the sealing frame (Huang 16/16A above outer 20 in fig12 formed as 142/144 covering lid 104 of Macris in fig17) is equal to the fixing frame in size (Huang, 22 and 20, fig12).
Re claim 9, Huang modified above teaches the liquid metal packaging structure for chip heat dissipation according to claim 1, wherein the pressing block (Huang, convex part of 24, fig12) is a square convex platform, and a cavity (Huang, space between side surface of 40 and inner 20, fig12) is arranged between the side surface of the chip and the inner wall of the sealing frame.
Claim(s) 3 is rejected under 35 U.S.C. 103 as being unpatentable over Lin et al. US 2021/0193544 in view of Macris et al. US 2006/0118925 and Aldousari et al. US 2017/0120563.
Re claim 3, Lin modified above teaches the liquid metal packaging structure for chip heat dissipation as claimed in claim 1, wherein the sealing frame (Lin, MUF and E as epoxy, fig3, [16, 24]) is made of a flexible material.
Lin not explicitly show the epoxy with a temperature resistance of 150C or more.
Aldousari teaches epoxy resin with temperature resistance exceeding 150C to 500C ([72]).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to combine the teaching of Lin modified above and Aldousari to use a epoxy with high temperature resistance. The motivation to do so is to improve thermal property of the sealing frame and reduce chance of damage during operation (Aldousari, [6]).
Allowable Subject Matter
Claim 6 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim.
Specifically, the limitations are material to the inventive concept of the application in hand to prevent liquid metal from leaking between the sealing frames.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to XIAOMING LIU whose telephone number is (571)270-0384. The examiner can normally be reached Monday-Friday, 9am-8pm, EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S Kim can be reached at (571)272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/XIAOMING LIU/Examiner, Art Unit 2812
Prosecution Insights