Prosecution Insights
Last updated: July 17, 2026
Application No. 18/713,734

INTEGRATED CIRCUIT SYSTEMS COOLED BY EMBEDDED MICROTUBES

Non-Final OA §103
Filed
May 28, 2024
Priority
Dec 31, 2021 — TÜ 2021/022036 +1 more
Examiner
PRASAD, NEIL R
Art Unit
Tech Center
Assignee
Sabanci Universitesi Nanoteknoloji Arastirma Ve Uygulama Merkezi Sunum
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
607 granted / 711 resolved
+25.4% vs TC avg
Moderate +10% lift
Without
With
+9.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
20 currently pending
Career history
731
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
82.5%
+42.5% vs TC avg
§102
10.3%
-29.7% vs TC avg
§112
0.4%
-39.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 711 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) submitted on 5/31/2024 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-8 and 13-20 are rejected under 35 U.S.C. 103 as being unpatentable over Koeneman (US Publication No. 2013/0044431) in view of Koeneman et al. (US Publication No. 2003/0110788). Regarding claim 1, Koeneman (‘431) discloses an integrated circuit unit (100) comprising: at least one electronic chip (120) consisting of a wafer body with at least one groove (22) extending along its surface from one end to the other, and of an active area (24) (Figure 1) Koeneman (‘431) does not disclose the integrated circuit unit further comprises at least one tube, which is housed in the said at least one groove, and which allows a transport of a cooling fluid for cooling the at least one electronic chip. However, Koeneman (‘788) discloses a tube (290) housed in a groove (270) for cooling fluid (paragraph 34). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the integrated circuit unit of Koeneman (‘431) to include a tube in the groove, as taught by Koeneman (‘788), since it can improve cooling efficiency of the system (paragraph 35). Regarding claim 2, Koeneman (‘431) discloses the at least one grooves extend parallel to each other along a horizontal axis of the wafer body (paragraph 27). Regarding claim 3, Koeneman (‘788) discloses the at least one tube is configured not to allow the cooling fluid carried therein to contact with an active area (side with solder balls 232) and the wafer body (1) of the at least one electronic chip (10), and configure-configured to allow only the fluid transfer. As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 4, Koeneman (‘431) discloses the geometry of the said at least one groove is in the shape of rectangular prism (Figure 1). Regarding claim 5, Koeneman (‘431) discloses the integrated circuit comprises the at least one groove (22) obtained on the wafer body (20) directly by wet etching or dry etching method (paragraph 22). Regarding claim 6, Koeneman (‘431)/Koeneman (‘788) discloses the limitations as discussed in the rejection of claim 1 above. Koeneman (‘431) also discloses any suitable shape and size for fluidic pathways. Koeneman (‘431)/Koeneman (‘788) is silent regarding the at least one tube has a form that does not include any corners along its circumference, preferably a circular form. However, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the shape to be circular to maximize structural integrity of the channels, since it has been held that adjusting the shape of an article involves only routine skill in the art. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966). Regarding claim 7, Koeneman (‘431) discloses the cooling fluid carried in the said at least one tube dielectric liquid (paragraph 24). Regarding claim 8, Koeneman (‘431) discloses the said dielectric liquid is water (paragraph 24). Regarding claim 13, Koeneman (‘788) discloses the wafer body is made of a semiconductor material, preferably silicon (paragraphs 5-6). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 14, Koeneman (‘431) discloses a three-dimensional stack-type integrated circuit system comprising two of the integrated circuit units (20) according to claim 1 (Figure 1; paragraphs 4-5). Regarding claim 15, Koeneman (‘431) discloses two electronic chips (20) with at least a part of which is aligned opposite to each other and the wafer bodies face each other, wherein each electronic chip has grooves (29) on the surfaces of the wafer body, at least a part of which is aligned opposite to each other, and the grooves (29) are configured to allow the at least one tube to be housed (23) therein (Figure 1). Regarding claim 16, Koeneman (‘431) discloses a three-dimensional stack-type integrated circuit system (40) comprising more than two of the integrated circuit units (20) according to claim 1 (Figure 1 shows 4 integrated circuit units 20). Regarding claim 17, Koeneman (‘788) discloses a method for forming the integrated circuit unit according to claim 1, comprising the steps of: providing at least one electronic chip (20) consisting of a wafer body and an active area (solder side 232), forming at least one groove (270) extending from one end to the other along the surface of the wafer body of the at least one electronic chip (20), and housing the at least one tube (290) in the said groove (270). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 18, Koeneman (‘431) discloses the integrated circuit comprises the at least one groove (22) obtained on the wafer body (20) directly by wet etching or dry etching method (paragraph 22). Regarding claim 19, Koeneman (‘788) discloses the at least one tube is configured not to allow the cooling fluid carried therein to contact with an active area (side with solder balls 232) and the wafer body (1) of the at least one electronic chip (10), and configure-configured to allow only the fluid transfer. As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 20, Koeneman (‘431) discloses the geometry of the said at least one groove is in the shape of rectangular prism (Figure 1). Claims 9-12 are rejected under 35 U.S.C. 103 as being unpatentable over Koeneman (US Publication No. 2013/0044431) in view of Koeneman et al. (US Publication No. 2003/0110788), and further in view of Oganesian et al. (US Publication No. 2015/0084148). Regarding claim 9, Koeneman (‘431)/Koeneman (‘788) discloses the limitations as discussed in the rejection of claim 1 above. Koeneman (‘431)/Koeneman (‘788) does not disclose a thermal conductive material is provided in the at least one groove where the said at least one tube is placed. However, Oganesian discloses a groove (26) in a chip (10) with thermal conductive material (72) provided in the groove where a tube (70) is placed (Figure 4). It would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the grooves of Koeneman (‘431)/Koeneman (‘788) to include a thermal paste surrounding a tube, as taught by Oganesian, since it can enhance thermal conduction between the heat pipes (70) and substrate (10) and provided structural support (paragraph 34). Regarding claim 10, Oganesian discloses the gap (26) in the at least one groove contains, partially or completely, a thermal conductive material (72) (Figure 4). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Regarding claim 11, Oganesian/Koeneman (‘431)/Koeneman (‘788) discloses the limitations as discussed in the rejection of claim 9 above. Oganesian/Koeneman (‘431)/Koeneman (‘788) is silent regarding the thermal conductivity coefficient of the thermal conductive material is in the range of 50-75 W/m.K. However, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified the thermal conductive material to conduct heat in this range to optimize heat dissipation while maintaining structural integrity of the device, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding claim 12, Oganesian discloses the thermal conductive material is a thermal paste (paragraph 34). As discussed above, it would have been obvious to one of ordinary skill in the art at a time before the effective filing date of the invention to have modified Koeneman (‘431) in view of Koeneman (‘788). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Joshi et al. (US Publication No. 2020/0161217) discloses fluid channels for cooling a chip (Figure 5). Foong et al. (US Patent No. 8,860,212) discloses a fluid cooled die package which uses a tube and thermal paste (Figure 6). Any inquiry concerning this communication or earlier communications from the examiner should be directed to NEIL R PRASAD whose telephone number is (571) 270-3129. The examiner can normally be reached M-F 9am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached at (469) 295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /N.R.P/ 6/28/2026 Examiner, Art Unit 2897 /JACOB Y CHOI/ Supervisory Patent Examiner, Art Unit 2897
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Prosecution Timeline

May 28, 2024
Application Filed
Jul 01, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
95%
With Interview (+9.5%)
2y 2m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 711 resolved cases by this examiner. Grant probability derived from career allowance rate.

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