Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 5 – 7, 14, 15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Pic (US 10108894).
Regarding claim 1, Pic discloses an electronic device comprising:
a circuit board (the tape 10, Fig. 2);
an electronic component (microcircuit 14a and 14b) mounted to the circuit board; and
a breakage feature (the openings 20) provided at a target location (the rupture zone 17a & 17b around the openings 20) relative to the circuit board and the electronic component to destroy a functionality of the electronic device (removing the cap 18 will rupture the connection of the circuit board; column 3, line 63 – column 4, line 9) when a force (the force to remove the cap 18 from the container) is applied to the electronic device for removal of the electronic device from a structure (cap 18 and the container).
Regarding claim 2, Pic discloses the claimed invention as set forth in claim 1. Pic further suggests the breakage feature comprises a deliberately weakened region (the openings 20 a deliberately formed by design) provided in the circuit board.
Regarding claim 5, Pic discloses the claimed invention as set forth in claim 1. Pic further suggests the breakage feature comprises a groove (the openings 20 appear to be a notch or groove) formed in the circuit board to provide a stress concentrator to break the circuit board (when stress concentrate on the weak area like the rupture zone, the breakage may happen).
Regarding claim 6, Pic discloses the claimed invention as set forth in claim 5. Pic further suggests the circuit board has an external surface (external surface of tape 10), and the groove extends inwardly into the circuit board from the external surface (the opening 20 extend from the surface into the internal thickness of the tape 10), wherein the circuit board is to break at a region adjacent a portion of the groove (the break happen at the portions next to the openings 20) that is most distal from the external surface (the region in the thickness of the tape 10), and wherein the electronic component is positioned proximal to the region (the component 14b is near the rupture area).
Regarding claim 7, Pic discloses the claimed invention as set forth in claim 6. Pic further suggests electrically conductive traces (L, Fig. 1) that pass through the region and that are to break when the circuit board breaks.
Regarding claim 14, Pic discloses a method comprising:
mounting an electronic component (components 14a, 14b, Fig. 1 & 2) to a circuit board (tape 10) of an electronic device; and
forming a breakage feature (openings 20) at a target location (the rupture zone 17a, 17b) relative to the circuit board and the electronic component to destroy a functionality (removing the cap 18 will rupture the connection of the circuit board; column 3, line 63 – column 4, line 9) of the electronic device when a force (the force to remove the cap 18 from the container) is applied to the electronic device for removal of the electronic device from a structure (cap 18 and the container).
Regarding claim 15, Pic discloses the claimed invention as set forth in claim 14. Pic further suggests the breakage feature is to cause breaking of the circuit board in response to the force or removal of the electronic component from the circuit board in response to the force (use the force to remove the cap 18 and break the rupture zone).
Allowable Subject Matter
Claims 3, 4, 8 - 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Allowance
The following is an examiner’s statement of reasons for allowance:
Regarding claim 3, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claims 1 & 2, a combination of limitations that the breakage features further comprises a deliberately weakened region provided in a protective layer that encapsulates the electronic component. None of the reference art of record discloses or renders obvious such a combination.
Regarding claim 8, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claim 1, a combination of limitations that a subassembly including the electronic component and a protective layer that encapsulates the electronic component, wherein the subassembly is detachable from the circuit board in response to the force. None of the reference art of record discloses or renders obvious such a combination.
Regarding claim 12, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claim 1, a combination of limitations that the subassembly is placed on an external surface of the circuit board, the electronic device comprising: a first discrete adhesive to adhere the subassembly to the structure; and a second discrete adhesive separate from the first discrete adhesive to adhere the circuit board to the structure, wherein the breakage feature comprises deliberately weakened regions formed in the circuit board. None of the reference art of record discloses or renders obvious such a combination.
Regarding claim 13, the prior art of record, taken alone or in combination, fails to teach or fairly suggest, in combining with other limitations recited in claim 1, a combination of limitations that the breakage feature comprises a cutting element that penetrates into a protective layer that encapsulates the electronic component, where removal of the electronic device along a direction that is angled with respect to the cutting element causes destruction of the protective layer and detachment of the electronic component. None of the reference art of record discloses or renders obvious such a combination.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Tanaka (US 9934459) discloses a breakable device, Fig. 1A.
Hebberker (US 6693544) discloses a breakable card with embedded chip, Fig. 2B.
Gustafson (US 6050622) discloses a breakable device, Fig. 1.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to BINH B TRAN whose telephone number is (571)272-9289. The examiner can normally be reached M-F 8:00 AM - 6:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy J Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/BINH B TRAN/Primary Examiner, Art Unit 2848
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