DETAILED ACTION
The present application is being examined under the pre-AIA first to invent provisions.
This action is responsive to claims filed 08/27/2026 and Applicant’s communication regarding application 18/717573 filed 08/27/2026.
Claims 17-20, 22-27, 29, and 31-36 have been examined with this office action.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on has been entered.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 17, 32, and 35 and any claims which depend therefrom are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. Applicant introduces new matter to claims 17, 32, and 35. Applicant amended claims 17, 32, and 35 recite the limit (or an equivalent) "providing a parameterized circuit design with a minimum depth, wherein the parameterized circuit design with a minimum depth is obtained by combining counterdiabatic driving terms and Hamiltonian terms, wherein the counterdiabatic driving terms are determined by a nested commutator approach and wherein the combination is optimized to minimize the number of sequentially stacked gates required to represent the Hamiltonian”. The specification ([0019] [0041] [0048] [0092] [0118]) does not provide 112(a) support for how a parameterized circuit is designed with a minimum depth beyond applying a noisy intermediate-scale quantum (NISQ) device ([0118] “Since the NISQ devices can only implement circuits of limited depth…”). Nothing in the Specification provides support for “the parameterized circuit design with a minimum depth is obtained by combining counterdiabatic driving terms and Hamiltonian terms, wherein the counterdiabatic driving terms are determined by a nested commutator approach and wherein the combination is optimized to minimize the number of sequentially stacked gates required to represent the Hamiltonian”. As such, the amended claims as cited adds new matter as claimed and is rejected along with any claims which depend therefrom fail to comply with the written description requirement.
Prior Art
The claims overcomes the prior art of record such that none of the cited prior art reference’s disclosures can be applied to form the basis of a 35 USC § 102 rejection nor can they be combined to fairly suggest in combination, the basis of a 35 USC § 103 rejection when the limitations are read in the particular environment of the claims. Initially, the “optimization” within the claims is interpreted as “portfolio optimization” since examples described in the specification are narrowly described only for portfolios (Specification [Title] [Abstract] [0001] [0003] example starting in [0024] [0103]] example starting in [0109] [0135-0140]). The examiner has cited multiple prior art references which mention that an Ising-Hamiltonian model can be applied to the optimization of portfolio (see prior art made of record and not relied upon is considered pertinent to applicant's disclosure in the Conclusion section within this office action). However, none of the prior art references can be shown to teach “providing a parameterized circuit design with a minimum depth”. Here the examiner notes that, on its face, the claim limitation “providing a parameterized circuit design with a minimum depth” could be patent eligible subject matter. However, the specification ([0019] [0041] [0048] [0092] [0118]) does not provide 112(a) support for how a parameterized circuit is designed with a minimum depth beyond applying a noisy intermediate-scale quantum (NISQ) device ([0118] “Since the NISQ devices can only implement circuits of limited depth…”). Therefore, even though prior cannot be applied to the claims, the claims at present are not patent eligible subject matter since the technology is merely applied to the abstract idea (portfolio optimization) of the claimed invention. Therefore, the claims may be allowable if amended to overcome the rejection(s) under 35 U.S.C. 101, set forth in this Office action.
Response to Arguments
Applicant's arguments with respect to claims have been considered but are moot in view of the new ground(s) of rejection necessitated by applicant’s amendment to claims. The rejection above serves as the examiner’s response to the applicant’s arguments.
Conclusion
For prior art made of record and not relied upon is considered pertinent to applicant's disclosure see Notice of References Cited items A-D submitted 05/27/2026 used as prior art and in the conclusion section in the office action submitted 05/27/2026.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Gregory A Pollock whose telephone number is (571) 270-1465. The examiner can normally be reached M-F 8 AM - 4 PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Abhishek Vyas can be reached on 571 270-1836. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Gregory A Pollock/Primary Examiner, Art Unit 3691
09/05/2026
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