DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-3 and 9 are rejected under 35 U.S.C. 102(a)(1) or (a)(2) as being anticipated by Nakata et al. (US 2020/0343287, hereinafter Nakata).
Regarding claim 1, Nakata discloses for an imaging element comprising that
a semiconductor substrate (semiconductor substrate 53, Fig. 4);
a photoelectric conversion portion (photoelectric converting unit 104, Fig. 4) disposed in the semiconductor substrate (53, Fig. 4) to generate charges according to an amount of received light through photoelectric conversion, because “the photoelectric converting unit 104 converts light received through the on-chip lens 109 into charge” ([0022]);
a charge holding portion (charge holding unit 105, Fig. 4) disposed in the semiconductor substrate (53, Fig. 4) to hold charges transferred from the photoelectric conversion portion, because “the charge holding unit 105 temporarily holds the charge transferred from the photoelectric converting unit 104” ([0022]);
a gate of a transfer transistor (transfer gate 103, Fig. 4) disposed on a region of a bottom surface of the semiconductor substrate (right-side region in the bottom surface of 53, Fig. 4),
the region overlapping the charge holding portion (105, Fig. 4);
a sidewall formed around the gate (103, Fig. 4), because Applicants do not specifically claim which sidewall is the claimed sidewall formed around the gate, what material’s composition the sidewall has, and/or what geometrical relationships between the gate and the sidewall have, the interlayer insulating film 102 by Nakata has a sidewall around the transfer gate 103, being in contact with the contact part 110 (Fig. 4), and therefore, the right sidewall of the interlayer insulating film 102 corresponds to the claimed sidewall; and
an in-substrate-shielding portion (light shielding unit 106/107 and contact part 110, Fig. 4) that is a light-shielding portion (light shielding unit 106/107 and light shielding film 108, Fig. 4) disposed in a boundary region of sensor pixels (adjacent to the on-chip lens 109, Fig. 4) in the semiconductor substrate (53, Fig. 4) to extend from a light-receiving surface of the semiconductor substrate (top surface of 53, Fig. 4) toward the bottom surface side (bottom surface if 53, Fig. 4),
wherein the in-substrate-shielding portion (106/110, Fig. 4) has a penetrating portion (106, Fig. 4) that penetrates the semiconductor substrate (53, Fig. 4), and is in contact with the sidewall (sidewall of 102, Fig. 4) at the penetrating portion, because a sidewall of the interlayer insulating layer 102 by Nakata is in contact with the contact part 110, which is a portion of light shielding unit.
Regarding claim 2, Nakata further discloses for the imaging element according to claim 1 that a width of the sidewall is wider than a width of an end on the bottom surface side of the penetrating portion, as shown in the attached and annotated Fig. 4 of Nakata below.
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Regarding claim 3, Nakata further discloses for the imaging element according to claim 1 that a light-receiving-surface-shielding portion (light shielding film 108, Fig. 4) that is a light-shielding portion (106/107/108/110, Fig. 4) that covers the light-receiving surface of the semiconductor substrate (top surface of 53, Fig. 4), wherein the light-receiving-surface-shielding portion (108, Fig. 4) has an opening formed in a region overlapping the photoelectric conversion portion (opening directly above the photoelectric converting unit 104, Fig. 4), and an end of the in-substrate-shielding portion (end of 106/107, Fig. 4) on the light-receiving surface side (top surface side of 53, Fig. 4) is spaced apart from the opening, because an upper end point of the light shielding units 106 and 107 are spaced apart from the opening above the photoelectric converting unit 104 (Fig. 4).
Regarding claim 9, Nakata discloses for an electronic device equipped with an imaging element, the imaging element comprising that
a semiconductor substrate (53, Fig. 4);
a photoelectric conversion portion (104, Fig. 4) disposed in the semiconductor substrate (53, Fig. 4) to generate charges according to an amount of received light through photoelectric conversion, because “the photoelectric converting unit 104 converts light received through the on-chip lens 109 into charge” ([0022]);
a charge holding portion (105, Fig. 4) disposed in the semiconductor substrate (53, Fig. 4) to hold charges transferred from the photoelectric conversion portion, because “the charge holding unit 105 temporarily holds the charge transferred from the photoelectric converting unit 104” ([0022]);
a gate of a transfer transistor (103, Fig. 4) disposed on a region of a bottom surface of the semiconductor substrate (right-side region on the bottom surface of 53, Fig. 4),
the region overlapping the charge holding portion (105, Fig. 4);
a sidewall formed around the gate (103, Fig. 4), because Applicants do not specifically claim which sidewall is the claimed sidewall formed around the gate, what material’s composition the sidewall has, and/or what geometrical relationships between the gate and the sidewall have, the interlayer insulating film 102 by Nakata has a sidewall around the transfer gate 103, being in contact with the contact part 110 (Fig. 4), and therefore, the right sidewall of the interlayer insulating film 102 corresponds to the claimed sidewall; and
an in-substrate-shielding portion (106/107 and 110, Fig. 4) that is a light-shielding portion (106/107 and 110, Fig. 4) disposed in a boundary region of sensor pixels in the semiconductor substrate (53, Fig. 4) to extend from a light-receiving surface of the semiconductor substrate (top surface of 53, Fig. 4) toward the bottom surface side (bottom surface of 53, Fig. 4),
wherein the in-substrate-shielding portion (106/107/110, Fig. 4) has a penetrating portion (106/110, Fig. 4) that penetrates the semiconductor substrate (53, Fig. 4), and is in contact with the sidewall (right-side sidewall of 102, Fig. 4) at the penetrating portion, because a sidewall of the interlayer insulating layer 102 by Nakata is in contact with the contact part 110, which is a portion of light shielding unit.
Claims 6-8 are rejected under 35 U.S.C. 102(a)(1) or (a)(2) as being anticipated by Sato (US 2020/0295068).
Regarding claim 6, Sato discloses for a method for manufacturing an imaging element, comprising that
a photoelectric conversion portion (photodiode (PD) 21, Fig. 3) forming step of forming a photoelectric conversion portion (PD 21, Fig. 3) disposed in a semiconductor substrate (semiconductor substrate 51, Fig. 3) to generate charges according to an amount of received light through photoelectric conversion (photoelectric conversion section, [0121]);
a charge holding portion (charge retention section (MEM) 24, Fig. 3) forming step of forming a charge holding portion (MEM 24, Fig. 3) disposed in the semiconductor substrate (51, Fig. 3) to hold charges transferred from the photoelectric conversion portion (“charge retention”, [0123]);
a gate (gate electrode 55, Fig. 3) forming step of forming a gate of a transfer transistor (55, Fig. 3, also see gate electrode 221 of the first transfer gate section 22 in Fig. 2) disposed on a region of a bottom surface of the semiconductor substrate (region on the bottom surface of 51, Fig. 3),
the region overlapping the charge holding portion (MEM 24, Fig. 3);
a sidewall (first insulating film 52A, Fig. 3) forming step of forming a sidewall (52A, Fig. 3) around the gate (55, Fig. 3), because Applicants do not specifically claim which sidewall is the claimed sidewall formed around the gate, what material’s composition the sidewall has, and/or what geometrical relationships between the gate and the sidewall have, the first insulating film 52A by Sato is disposed around the gate electrode 55 and has a sidewall (Fig. 3); and
an in-substrate-shielding portion (non-piercing light blocking section 57B/piercing light blocking section 57C/multiple-layer film 56, Fig. 3) forming step of forming an in-substrate-shielding portion (57B/57C/56, Fig. 3) that is a light-shielding portion disposed in a boundary region of sensor pixels in the semiconductor substrate (51 between photodiodes, Fig. 3) to extend from a light-receiving surface of the semiconductor substrate (top surface of 51, Fig. 3) toward the bottom surface side (bottom surface of 51, Fig. 3),
wherein the in-substrate-shielding portion (57B/57C/56, Fig. 3) has a penetrating portion (57C/56, Fig. 3) that penetrates the semiconductor substrate (51, Fig. 3), and is in contact with the sidewall (52A, Fig. 3) at the penetrating portion (lower portion of 57C/56, Fig. 3).
Regarding claim 7, Sato further discloses for the method for manufacturing the imaging element according to claim 6 that the in-substrate-shielding portion (57B/57C/56, Fig. 3) forming step includes a trench (trench 65/66, Fig. 11) forming step of forming a trench (65/66, Fig. 11) by etching using the sidewall (52A, Fig. 11) as an etching stopper.
Regarding claim 8, Sato further discloses for the method for manufacturing the imaging element according to claim 6 that a light-receiving-surface-shielding portion (surface light blocking section 57A, Fig. 3) forming step of forming a light-receiving-surface-shielding portion (57A, Fig. 3) that is a light-shielding portion that covers the light-receiving surface (region of the light receiving face of the semiconductor substrate 51, Fig. 3); and
an opening (opening above PD 21, Fig. 3) forming step of forming an opening in a region of the light-receiving-surface-shielding portion (57A, Fig. 3), the region overlapping the photoelectric conversion portion (PD 21, Fig. 3),
wherein in the opening (opening above PD 21, Fig. 3) forming step, the opening is formed such that an end of the in-substrate-shielding portion (end of 57B/57C/56, Fig. 3) on the light-receiving surface side (top surface of 51, Fig. 3) is spaced apart from the opening, because the end points of the non-piercing light blocking section 57B and piercing light blocking section 57C with the multiple-layer film 56 are spaced apart from the opening directly above the photodiode 21 (Fig. 3).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over by Nakata et al. (US 2020/0343287, hereinafter Nakata).
Regarding claim 4, Nakata does not explicitly disclose that a distance from the opening to the end of the light-receiving surface side of the in- substrate-shielding portion is 50 nm or more.
However, Nakata further discloses that “the light shielding unit 107 between the photoelectric converting unit 104 and the charge holding unit 105 is disposed in a position closer to the photoelectric converting unit 104 than the charge holding unit 105. Stated differently, the distance between the light shielding unit 107 and the photoelectric converting unit 104 is shorter than the distance between the light shielding unit 107 and the charge holding unit 105. More specifically, the distance between the light shielding unit 107 and the N-type semiconductor region of the photoelectric converting unit 104 is shorter than the distance between the light shielding unit 107 and the N-type semiconductor region of the charge holding unit 105” ([0036]), and in view of this teaching by Nakata, one of ordinary skill in the art would have understood that Nakata recognizes that the arrangement and dimension of the light shielding unit would impact the optical performance of the image sensor. The arrangement and dimension of the light shielding unit is therefore a result-effective variable to be optimized by repeated experiments.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, an arrangement and dimension of the light shielding element as Nakata has identified the dimension of the light shielding element as a result-effective variable. Further, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at the distance from the opening to the end of the light-receiving surface side of the in-substrate-shielding portion to be 50 nm or more, in order to achieve the desired optical performance of the image sensor, as taught by Nakata. Furthermore, the applicant has not presented persuasive evidence that the claimed distance is for a particular purpose that is critical to the overall claimed invention (i.e., that the invention would not work without the specific claimed distance).
Regarding claim 5, Nakata further discloses that the imaging element (imaging system 2000, Fig. 8) is a global shutter-type back-illuminated image sensor, because “The photoelectric conversion apparatus according to the embodiment is a so-called backside illumination type CMOS image sensor in which incident light is irradiated from a surface opposite to the surface of the semiconductor substrate 53 on which the wiring layer is arranged” (emphasis added, [0043]) and further discloses that the imaging system 2000 by Nakata includes the diaphragm shutter control portion 2018 (Fig. 8).
Conclusion
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/JAY C KIM/Primary Examiner, Art Unit 2815
/WOO K LEE/Examiner, Art Unit 2815
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