Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1, 2, 4-7, 9-12, 17, 19-21, 23 and 24 are rejected under 35 U.S.C. 103 as being unpatentable over SANGHVI (Publication 2018/0189102) in view of KOKER (Patent 11995737).
As to claim 1,
SANGHVI teaches a data processing method, for a data processing apparatus, wherein the data processing apparatus comprises a plurality of computing modules (accelerators), each of the plurality of computing modules comprises a shared memory (shared memory), and the plurality of computing modules comprise a first computing module and a second computing module, the data processing method comprises: transferring data to be interacted with between a first working group (consumer / producer thread) running on the first computing module and a second working group (another consumer / producer thread) running on the second computing module through a data transferring channel established between a shared memory of the first computing module and a shared memory of the second computing module ([0022 – 0035; 0052-0058, 0061-0071). However, SANGHVI does not explicitly indicate the computing modules comprises a plurality of thread execution units or that the thread is a working group.
KOKER teaches a known algorithm for dispatching working groups, e.g. thread warps, to computing modules ( col. 10, lines 19-31; column 23, line 3-35; col. 24, lines 48-56) wherein each computing module comprises a thread execution unit for communication of data between the computing modules (note Figure 7, column 23, line 36 – col. 25, line 7; a parallelism profile associate with workgroups / thread block / SIMT / thread warp are analyzed for parallelism and deployed to a compute unit for processing wherein workgroups are deployed to a singular computer unit or distributed among a plurality of compute units. Further the workgroups / thread block / SIMT / thread warp communicates among each other via any one of the clusters of the processing cluster array can route the output of each cluster to the input of any partition unit or another cluster – col. 6, line 62 – col. 7, line 15).
Therefore, it would be obvious to one of ordinary skill in the art to combine the teachings of KOKER to the teachings of SANGHVI in order to coordinate the transfer of data between the shared memory dispatch and execute threads that share data.
As to claim 2, SANGHVI teaches the data to be interacted with is shared data between the first working group and the second working group; or the data to be interacted with is data to be synchronized between the first working group and the second working group ([0022 – 0035; 0052-0058, 0061-0071).
As to claim 4, SANGHVI teaches the data transferring channel performs data interaction by direct memory access (0029).
As to claim 5, Neither SANGHVI nor KOKER place a limit on the number of threads to be assigned or the amount of threads in a thread warp (Sanghvi, 0036, KOKER, column 8, line 56 – col. 9, line 9). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing of the claimed invention that the number of threads of the first working group are the same as the number of threads of a second working group.
As to claim 6, KOKER teaches a known algorithm for dispatching thread groups to computing modules by receiving a working group to be dispatched that comprises the first working group and the second working group; determining a target dispatching mode; and dispatching the working group to be dispatched, based on the target dispatching mode (note Figure 7, column 23, line 36 – col. 25, line 7; a parallelism profile associate with workgroups / thread block / SIMT / thread warp are analyzed for parallelism and deployed to a compute unit for processing wherein workgroups are deployed to a singular computer unit or distributed among a plurality of compute units. Further the workgroups / thread block / SIMT / thread warp communicates among each other via any one of the clusters of the processing cluster array can route the output of each cluster to the input of any partition unit or another cluster – col. 6, line 62 – col. 7, line 15). Refer to claim 1 for the motivation to combine.
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As to claim 7, KOKER teaches a known algorithm for dispatching thread groups to computing modules by determining a target dispatching mode, comprises: acquiring configuration information of the working group to be dispatched; and selecting a dispatching mode matching the configuration information from at least two dispatching modes as the target dispatching mode, wherein the at least two dispatching modes comprise a first dispatching mode and a second dispatching mode, in the first dispatching mode, the working group to be dispatched is dispatched to one computing module of the plurality of computing modules, and in the second dispatching mode, the working group to be dispatched is dispatched to N computing modules of the plurality of computing modules, and a at least some of the N computing modules to enable interaction between any two computing modules of the N computing modules, wherein N is a positive integer greater than 1, the configuration information comprises a number of threads of the working group to be dispatched and/or an amount of data processed by each thread of the working group to be dispatched (note Figure 7, column 23, line 36 – col. 25, line 7; a parallelism profile associate with workgroups / thread block / SIMT / thread warp are analyzed for parallelism and deployed to a compute unit for processing wherein workgroups are deployed to a singular computer unit or distributed among a plurality of compute units. Further the workgroups / thread block / SIMT / thread warp communicates among each other via any one of the clusters of the processing cluster array can route the output of each cluster to the input of any partition unit or another cluster – col. 6, line 62 – col. 7, line 15).
SANGHVI teaches a data transferring channel is provided between shared memories of at least some of the N computing modules to enable interaction between any two computing modules of the N computing modules through the data transferring channel ([0022 – 0035; 0052-0058, 0061-0071). Refer to claim 1 for the motivation to combine.
As to claim 9, KOKER teaches the determining a target dispatching mode, comprises: acquiring mode selection information from a storage unit, wherein the mode selection information indicates a type of a dispatching mode selected by a user; and selecting a dispatching mode matching the dispatching mode selection information from the at least two dispatching modes as the target dispatching mode (via receive a parallelism profile for a workload, note Figure 7, column 23, line 36 – col. 25, line 7; a parallelism profile associate with workgroups / thread block / SIMT / thread warp are analyzed for parallelism and deployed to a compute unit for processing wherein workgroups are deployed to a singular computer unit or distributed among a plurality of compute units. Further the workgroups / thread block / SIMT / thread warp communicates among each other via any one of the clusters of the processing cluster array can route the output of each cluster to the input of any partition unit or another cluster – col. 6, line 62 – col. 7, line 15). Refer to claim 1 for the motivation to combine.
As to claim 10, KOKER teaches the dispatching the working group to be dispatched, based on the target dispatching mode, comprises: in response to the target dispatching mode being the second dispatching mode, dividing the working group to be dispatched into N working groups; and dispatching the N working groups to the N computing modules respectively (via receive a parallelism profile for a workload, note Figure 7, column 23, line 36 – col. 25, line 7; a parallelism profile associate with workgroups / thread block / SIMT / thread warp are analyzed for parallelism and deployed to a compute unit for processing wherein workgroups are deployed to a singular computer unit or distributed among a plurality of compute units. Further the workgroups / thread block / SIMT / thread warp communicates among each other via any one of the clusters of the processing cluster array can route the output of each cluster to the input of any partition unit or another cluster – col. 6, line 62 – col. 7, line 15). Refer to claim 1 for the motivation to combine.
As to claim 11, KOKER teaches the N working groups comprise the first working group and the second working group, and the N computing modules comprise the first computing module and the second computing module; the dispatching the N working groups to the N computing modules respectively, comprises: dispatching the first working group to the first computing module; and dispatching the second working group to the second computing module (via receive a parallelism profile for a workload, note Figure 7, column 23, line 36 – col. 25, line 7; a parallelism profile associate with workgroups / thread block / SIMT / thread warp are analyzed for parallelism and deployed to a compute unit for processing wherein workgroups are deployed to a singular computer unit or distributed among a plurality of compute units. Further the workgroups / thread block / SIMT / thread warp communicates among each other via any one of the clusters of the processing cluster array can route the output of each cluster to the input of any partition unit or another cluster – col. 6, line 62 – col. 7, line 15). Refer to claim 1 for the motivation to combine.
As to claim 12, KOKER teaches the dispatching the N working groups to the N computing modules respectively, comprises: dividing the plurality of computing modules into module groups each including N computing modules; and dispatching the working group to be dispatched to the N computing modules contained in one of the module groups (via receive a parallelism profile for a workload, note Figure 7, column 23, line 36 – col. 25, line 7; a parallelism profile associate with workgroups / thread block / SIMT / thread warp are analyzed for parallelism and deployed to a compute unit for processing wherein workgroups are deployed to a singular computer unit or distributed among a plurality of compute units. Further the workgroups / thread block / SIMT / thread warp communicates among each other via any one of the clusters of the processing cluster array can route the output of each cluster to the input of any partition unit or another cluster – col. 6, line 62 – col. 7, line 15). Refer to claim 1 for the motivation to combine.
As to claim 17, SANGHVI teaches the first computing module further comprises a first instruction scheduling unit, and the second computing module further comprises a second instruction scheduling unit; the directly transferring data to be interacted with between a first working group running on the first computing module and a second working group running on the second computing module through a data transferring channel established between a shared memory of the first computing module and a shared memory of the second computing module, comprises: sending an access instruction to the second instruction scheduling unit by the first instruction scheduling unit; sending a data transferring command to the shared memory of the second computing module based on the access instruction by the second instruction scheduling unit; and sending data corresponding to the access instruction to the shared memory of the first computing module through the data transferring channel based on the data transferring command by the shared memory of the second computing module, wherein the data to be interacted with comprises the data corresponding to the access instruction, wherein sending an access instruction to the second instruction scheduling unit by the first instruction scheduling unit, comprises: sending the access instruction to the second instruction scheduling unit through a command transferring channel established between the first instruction scheduling unit and the second instruction scheduling unit by the first instruction scheduling unit (via scheduler associated with each accelerator and signals indicating processing and completion of handling of data) ([0022 – 0035; 0052-0058, 0061-0071).
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As to claim 19, SANGHVI teaches the directly transferring data to be interacted with between a first working group running on the first computing module and a second working group running on the second computing module through a data transferring channel established between a shared memory of the first computing module and a shared memory of the second computing module, further comprises: transferring a data transferring completion message to the first instruction scheduling unit by the shared memory of the first computing module, in response to the shared memory of the first computing module storing the data corresponding to the access instruction (via scheduler associated with each accelerator and signals indicating processing and completion of handling of data) ([0022 – 0035; 0052-0058, 0061-0071).
As to claim 20, reference is made to an apparatus that corresponds to the method of claim 1 and therefore rejected based on the same logic outlined in the rejection of claim 1.
As to claim 21, KOKER teaches a known algorithm for dispatching thread groups to computing modules by a mode controlling unit and a storage unit, wherein the mode controlling unit is configured to: receive a working group to be dispatched that comprises the first working group and the second working group; determine a target dispatching mode; and dispatch the working group to be dispatched, based on the target dispatching mode; the storage unit is configured to store mode selection information, wherein the mode selection information indicates a type of a mode selected by a user; and the mode controlling unit is further configured to select a dispatching mode matching the mode selection information from at least two dispatching modes as the target dispatching mode (via receive a parallelism profile for a workload, note Figure 7, column 23, line 36 – col. 25, line 7; a parallelism profile associate with workgroups / thread block / SIMT / thread warp are analyzed for parallelism and deployed to a compute unit for processing wherein workgroups are deployed to a singular computer unit or distributed among a plurality of compute units. Further the workgroups / thread block / SIMT / thread warp communicates among each other via any one of the clusters of the processing cluster array can route the output of each cluster to the input of any partition unit or another cluster – col. 6, line 62 – col. 7, line 15). Refer to claim 1 for the motivation to combine.
As to claim 23, SANGHVI and KOKER teaches an electronic device, comprising: a processor; and a memory, storing one or more computer program modules; wherein the one or more computer program modules are configured to be executed by the processor to implement the data processing method (SANGHVI, claim 1, 0020-0021, 0082, KOKER, column 44, line 34 – col. 48, line 39).
As to claim 24, SANGHVI and KOKER teaches a computer-readable storage medium, storing non- transitory computer-readable instructions, the non-transitory computer-readable instruction being executed by a computer to implement the data processing method (SANGHVI, claim 1, 0020-0021, 0082, KOKER, column 44, line 34 – col. 48, line 39).
Claim(s) 13-16 are rejected under 35 U.S.C. 103 as being unpatentable over SANGHVI (Publication 2018/0189102) in view of KOKER (Patent 11995737) as applied to claim 10 above, and further in view of LI (Publication 2023/0367741).
As to claim 13, KOKER substantially teaches the invention but does not teach assessing resource requirements for dispatching of working groups. LI teaches the dispatching the working group to be dispatched, based on the target dispatching mode, further comprises: determining whether the N computing modules satisfy resource requirements of the N working groups before dispatching the N working groups to the N computing modules, respectively; and dispatching the N working groups to the N computing modules respectively in a case where the N computing modules satisfy the resource requirements of the N working groups (via receive a parallelism profile for a workload, note par. 0017-0032; EN: comparison of register occupancy / requirements associated with thread warps are dispatch based on capacity associated with SPs). Therefore, it would be obvious to one of ordinary skill in the art before the effective filing of the claimed invention to combine LI to the teachings of SANGHVI and KOKER in order to allocation thread warps based on the required register space (0017-0018).
As to claim 14, KOKER substantially teaches the invention but does not teach assessing resource requirements for dispatching of working groups. LI teaches each of the plurality of computing modules further comprises a plurality of registers, and for each of the computing modules, the plurality of registers interact with the shared memory and the plurality of thread execution units; the determining whether the N computing modules satisfy resource requirements of the N working groups, comprises: determining whether a number of registers contained in the N computing modules satisfies number requirements of the N working groups; and/or determining whether a capacity of the shared memory contained in the N computing modules satisfies capacity requirements of the N working groups (via receive a parallelism profile for a workload, note par. 0017-0032; EN: comparison of register occupancy / requirements associated with thread warps are dispatch based on capacity associated with SPs). Refer to claim 13 for the motivation to combine.
As to claim 15, KOKER substantially teaches the invention but does not teach assessing resource requirements for dispatching of working groups. LI teaches the determining whether a number of registers contained in the N computing modules satisfies number requirements of the N working groups, comprises at least one of the following: determining whether a total number of registers contained in the N computing modules is greater than or equal to the number of registers required for the working group to be dispatched; and determining whether the number of registers contained in each of the N computing modules is greater than or equal to the number of registers required for a working group of the N working groups that is dispatched to the computing module (via receive a parallelism profile for a workload, note par. 0017-0032; EN: comparison of register occupancy / requirements associated with thread warps are dispatch based on capacity associated with SPs). Refer to claim 13 for the motivation to combine.
As to claim 16, KOKER substantially teaches the invention but does not teach assessing resource requirements for dispatching of working groups. LI teaches the determining whether a capacity of the shared memory contained in the N computing modules satisfies capacity requirements of the N working groups, comprises: determining whether a total capacity of the N shared memories contained in the N computing modules is greater than or equal to a memory capacity required for the working group to be dispatched (via receive a parallelism profile for a workload, note par. 0017-0032; EN: comparison of register occupancy / requirements associated with thread warps are dispatch based on capacity associated with SPs). Refer to claim 13 for the motivation to combine.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
HESSLER (WO2021/190828), BANGALORE PRABHAKAR (Publication 20230289189), KERR (Publication 2023/0185570), and KERR (Publication 2021/0124582) each demonstrates the broader disclosure of communicating / synchronizing of data associated with thread warps running on accelerator devices through a shared memory.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to LEWIS ALEXANDER BULLOCK JR whose telephone number is (571)272-3759. The examiner can normally be reached Monday-Friday, 9:00-5:00 pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Cordelia Zecher can be reached at 571-272-7771. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/LEWIS A BULLOCK JR/Supervisory Patent Examiner, Art Unit 2199
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