Prosecution Insights
Last updated: July 17, 2026
Application No. 18/719,223

SEMICONDUCTOR DEVICE

Non-Final OA §102§103§112
Filed
Jun 12, 2024
Priority
Dec 19, 2021 — JP 2021-205630 +1 more
Examiner
HARBOTTLE, CHARLOTTE ELIZABETH
Art Unit
Tech Center
Assignee
Shindengen Electric Manufacturing Co., Ltd.
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-60.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
8 currently pending
Career history
2
Total Applications
across all art units

Statute-Specific Performance

§103
100.0%
+60.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description: 510a. This number should be correctly labeled in the figures. Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: 60, 65, 70a, 70a’, and 71 from Fig. 25. These features should be described in the specification. These Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-11 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites “provided outside the active portion are provided via the insulating film”. Using provided twice leaves it unclear what is trying to be claimed, rendering the claim indefinite. For examination purposes this phrase has been interpreted the phrase to be claiming an insulating film located outside of the active portion. (Note: provided is a term that represents a method claim. For a device claim alternative phrases like connected to, on top of, etc. are recommended to be used instead to provide a clear structural relationship between limitations). Claims 2-11 are similarly rejected due to their dependence on claim 1. Claim 5 recites the limitation "a trench" in line 1. There is insufficient antecedent basis for this limitation in the claim. There was already a trench introduced in Claim 1, therefore it remains unclear whether this trench is a different trench from the trench already introduced. For examination purposes, the examiner has interpreted “a trench” to mean “a second trench.” Claim 7 recites the limitation “a trench”. There is insufficient antecedent basis for this limitation in the claim. There have already been multiple trenches claimed, therefore any additional trenches need to have an adjective to make it secondary. Along with that, any additional parts of the initial trench would still be part of the trench, there wouldn’t be an additional trench inside a trench. Claim 8, recites the limitation of “a plurality of trenches in the channel current suppression portion”, but claim 1 already included ‘a trench’, it appears this trench would be included in the plurality, but this is not specified and creates ambiguity between the two claims. It is recommended this claim be rewritten as: “The semiconductor device according to claim 1, wherein the channel current suppression portion includes at least one additional trench along a direction in which the channel current flows.” Claim 9 recites the limitation “the trench”. There is insufficient antecedent basis for this limitation in the claim. There have been numerous trenches listed in the previous claims. Therefore, it is unclear which trench is being referred to, leaving the scope of the claim unclear. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2, & 5-7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee et al. (US 2013/0228857 A1). Regarding Claim 1, Lee et al teaches a semiconductor device having a substrate (Fig 2A/2B 12), an epitaxial layer formed on the substrate (Paragraph 0012 describes an epitaxial layer on the substrate, 12), and an insulating film provided on one surface side of the epitaxial layer (Paragraph 0013 states that 35 is insulating. Fig 2B show that the insulating material, 35, is in contact with the epitaxial layer, 12), Wherein on one side surface side of the epitaxial layer, an active portion (Paragraph 0012 describes 14 as being the active region) provided with a predetermined element (any of the plurality of transistors formed in trenches, one of which is 18 - Paragraph 0012) and a channel current suppression portion being at a termination portion side (See annotated Fig 2B below. Paragraph 0016 describes that 16, where the channel current suppression region is labeled, is a termination area) and provided outside the active portion are provided via the insulating film (Fig 2B shows an insulating material, 35, outside the active potion), and PNG media_image1.png 452 656 media_image1.png Greyscale Wherein the channel current suppression portion is provided with a trench for suppressing current flowing from the active portion to the terminal portion (Fig 2B shows two trenches, 19 and 31, in the channel current suppression region). Regarding Claim 2, Lee et al. teaches the channel current suppression portion further provided with an electrode for suppressing the channel current (In Fig. 2B, the contact 40 is in the channel current suppression region. Paragraph 0024 describes the contact being in electrical communication with the vias, thus can broadly be considered an electrode) Regarding Claim 5, Lee et al. teaches a trench is provided in the active portion, and a depth dimension and/or a width dimension of the trench provided in the channel current suppression portion is set to be equal to or greater than a depth dimension and/or a width dimension of the trench provided in the active portion (Figure 2B shows a trench in both the active region and the channel current suppression region. Paragraph 0012 states that the trenches have the same width and dimension.). PNG media_image2.png 502 889 media_image2.png Greyscale Regarding Claim 6, Lee et al. teaches the trench provided in the channel current suppression portion is provided so as to be cut out in a stepped shape at the termination portion side on the one surface side of the epitaxial layer, and the trench having the stepped shape is configured to expose a lateral side of an outer side thereof (Annotated 2B below shows there is a step shape in the trench region, 19, which is in the termination portion, indicated by 16). Regarding Claim 7, Lee et al. teaches the trench having the stepped shape is further provided with a trench at a bottom thereof (See annotated Fig. 2B above). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 3-4 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2013/0228857 A1) in view of Takeuchi et al. (US 2015/0072485 A1). Regarding Claim 3, Lee et al. does not explicitly teach the electrode for suppressing the channel current being an EQR electrode. Takeuchi et al. teaches the electrode for suppressing the channel current being an EQR electrode. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lee et al. to make the electrode an EQR electrode, as taught by Takeuchi et al., because it can minimize localized electric field concentration. This lowers the chance of current leaking through the insulating layers which improves the efficiency and reliability of the device. Regarding Claim 4, Lee et al., as modified, teaches the EQR electrode has a portion directly provided on the epitaxial layer without interposing the insulating film therebetween (Fig 2B in Lee et al. shows that the electrode, 40, which is now an EQR electrode as taught by Takeuchi et al. as described in the rejection of claim 3 above, is directly in contact with the epitaxial layer, 12, without interposing the insulating film ,35. The insulating layer, 35, touches the epitaxial layer in the sides of the trench while the contact, 40, touches it as it imbeds itself in the top of the epitaxial layer) . Claim(s) 8-11 are rejected under 35 U.S.C. 103 as being unpatentable over Lee et al. (US 2013/0228857 A1) in view of Boettcher et al. (US 2015/0333133 A1). Regarding Claim 8, Lee et al. does not teach a plurality of trenches in the channel current suppression portion are provided along a direction in which the channel current flows. Boettcher et al. teaches a plurality of trenches in the channel current suppression portion are provided along a direction in which the channel current flows (Paragraph 0002 states that the current could pass horizontally across the substrate which would be the direction in which the current flows). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lee et al. to have a plurality of trenches in the channel current suppression portion in the direction in which the channel current flows, as taught by Boettcher et al., because aligning the trenches with the current path allows for the channel region to be partitioned into multiple parallel paths, allowing for more current to be carried without overwhelming the device. Regarding Claim 9, Lee et al. does not teach a mesa width of the trenches provided in the channel current suppression portion is set to a width dimension greater than a width of the trench. Boettcher et al. teaches a mesa width of the trenches provided in the channel current suppression portion is set to a width dimension greater than a width of the trench (paragraph 0024 that some of the trenches are of different widths). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lee et al. to make the width of the trenches different, as taught by Boettcher et al., because in trench-based devices, varying the trench width can control the electric field distribution, which prevents current leakage and improves the overall reliability of the device. Regarding claims 10 and 11, Lee lacks where the element is a diode (claim 10) and specifically a Schottky barrier diode (claim 11). Boettcher et al. teaches a Schottky barrier diode (Paragraph 0006). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify Lee et al. to have the element be a Schottky barrier diode, as taught by Boettcher et al., because integrating a Schottky diode with a MOSFET improves switching efficiency, reduces conduction losses, and enhances performance in high-frequency power application. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Hsieh (US 20230327013 A1) shares a similar structure, specifically in regards to the presence of an active region and a termination region where an epitaxial layer lies on the substrate. It also contains a plurality of trenches that contain a step structure. Lee et al. (US 20140167071 A1) contains an epitaxial layer disposed on substate, a series of trenches in which the trenches follow the current of the system, an insulated film, and an electrode on top of the epitaxial layer. Moriya et al. (US 11004749 B2) contains an epitaxial layer formed on a substrate with a series of trenches, an electrode in contact with said epitaxial layer a predetermined element that it is a diode Nakano et al. (US 20200258977) contains two regions, one of them being an active region. It also contains an epitaxial layer on the substrate, a series of trenches, an insulating layer, and an electrode. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CHARLOTTE ELIZABETH HARBOTTLE whose telephone number is (571)270-0644. The examiner can normally be reached Monday-Friday 7:30-5. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jeff Natalini can be reached at (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.E.H./Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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Prosecution Timeline

Jun 12, 2024
Application Filed
Jul 07, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

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