Prosecution Insights
Last updated: October 02, 2026
Application No. 18/720,857

Hybrid Bonding With Micro-Light Emitting Diode (LED) Devices

Non-Final OA §102§103§112
Filed
Jun 17, 2024
Priority
Dec 31, 2021 — provisional 63/295,615 +3 more
Examiner
REIDA, MOLLY KAY
Art Unit
Tech Center
Assignee
Lumileds LLC
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
366 granted / 444 resolved
+22.4% vs TC avg
Minimal +3% lift
Without
With
+3.2%
Interview Lift
resolved cases with interview
Typical timeline
2y 2m
Avg Prosecution
15 currently pending
Career history
468
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
50.6%
+10.6% vs TC avg
§102
29.9%
-10.1% vs TC avg
§112
17.3%
-22.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 444 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Information Disclosure Statement The information disclosure statement (IDS) submitted on 09/24/2024, 07/08/2025, 11/04/2025, and 03/30/2026 have been considered by the examiner. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 13 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Re claim 13, it is unclear what is meant by “wherein a pitch between centers of all of the n-contact bond areas and the p-contact bond areas is in a range of greater than or equal to 1 micrometers to less than or equal to 60 micrometers” (emphasis added) because it is unclear how such a limitation would be accomplished. The Examiner believes it needs to be clarified that the pitch is defined as “between adjacent centers of the each of the die n-contacts and the die p-contacts” (emphasis added) similarly to in claim 23. As written it appears that the pitch between every n-type contact and every p-type contact is within the claimed range, but that doesn’t make sense unless even the largest distance between a single n-type contact and a single p-type contact is within the claimed range, but given paragraph 0010 of Applicant’s Specification, it does not appear that this is what Applicant intends. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1, 3-9, and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Morris et al. (US Pub. 2020/0251638). Regarding independent claim 1, Morris teaches a micro-light emitting diode (uLED) device (Figs. 9A-9D; para. 0165-0168) comprising: a source wafer (Fig. 9B) comprising: a uLED die including a plurality of pixels each having sidewalls and comprising a mesa of semiconductor layers including an active region (para. 0166); a plurality of die n-contacts (982) in electrical communication with an n-type layer of the mesa; a plurality of die p-contacts (980) in communication with a p-type layer of the mesa; and a die dielectric material (960) isolating the die n-contacts and the die p-contacts; a target wafer (Fig. 9A) comprising: a target substrate (910) on which a plurality of wafer n- contacts (every other 930), a plurality of wafer p-contacts (the other 930s), and a wafer dielectric material (940) are located (para. 0165), the wafer n-contacts directly bonded to the plurality of die n-contacts (Fig. 9D; para. 0168); the wafer p-contacts directly bonded to the die p-contacts (Fig. 9D; para. 0168); and the wafer dielectric material directly bonded to the die dielectric material (Fig. 9C; para. 0167); the wafer dielectric material isolating the wafer n-contacts and the wafer p-contacts (para. 0165). Re claim 3, Morris teaches wherein the die n-contacts, the wafer n-contacts, the die p-contacts and the wafer p-contacts comprise a metal (para. 0165-0166). Re claim 4, Morris teaches wherein the die n-contacts, the wafer n- contacts, the die p-contacts and the wafer p-contacts comprise the same metal (para. 0165-0166). Re claim 5, Morris teaches wherein the die n-contacts, the wafer n- contacts, the die p-contacts and the wafer p-contacts comprise one or more of: copper (Cu), aluminum (Al), nickel (Ni), titanium (Ti), silver (Ag), gold (Au), platinum (Pt), and palladium (Pd) (para. 0165-0166). Re claim 6, Morris teaches wherein the die dielectric material and the wafer dielectric material comprise the same dielectric material (para. 0165-0166). Re claim 7, Morris teaches wherein the die dielectric material and the wafer dielectric material comprise one or more of: silicon dioxide (SiO2), silicon nitride (SiN), aluminum oxide (A12O3) (para. 0165-0166). Re claim 8, Morris teaches wherein the uLED die further comprises a die substrate (950) in contact with the semiconductor layers including the active region (para. 0166). Re claim 9, Morris teaches wherein the die substrate comprises a material selected from the group consisting of: a sapphire, silicon carbide, and Ill-nitride (para. 0166) and/or the target substrate comprises a substrate material selected from the group consisting of: silicon (para. 0165). Re claim 14, Morris teaches wherein the die n-contacts and the die p- contacts are connected in series to the wafer n-contacts and the wafer p-contacts (Fig. 9D). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 12 is rejected under 35 U.S.C. 103 as being unpatentable over Morris et al. (US Pub. 2020/0251638). Re claim 12, Morris teaches wherein the wafer n-contacts are directly bonded to the plurality of die n-contacts over respective n-contact bond areas and the wafer p-contacts are directly bonded to the die p-contacts over respective p-contact bond areas (Fig. 9D; para. 0168). While Morris is silent with respect to wherein the diameters of the n-contact bond areas and the p-contact bond areas; per se, Morris does teach that the linear dimension of the uLED can be “less than about 200um, less than 100um, less than 50um, less than 20µm, less than 10µm, or smaller…as small as 6um, 5um, 4um, 2um” (para. 0098). Given that the linear dimensions of the entire uLED is within these disclosed ranges then the diameters of the n-contact bond areas and the p-contact bond areas having a diameter in a range of 0.5 micrometers to less than or equal to 30 micrometers is likely to exist for at least some of the uLEDs of Morris and even if not, given that the bonding area has an effect on the contact quality, it would have at least been obvious to one of ordinary skill in that art at the time of filing to optimize the bonding areas to arrive at the claimed invention for the purpose of forming a high quality bond between the target wafer than the source wafer. Allowable Subject Matter Claims 2 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Claims 15-16, 18, 19, 21-23 are allowed. The following is a statement of reasons for the indication of allowable subject matter: there is no teaching, suggestion, or motivation from the prior art of record, nor does the prior art of record otherwise make obvious the limitations of… Re claim 2, wherein a width of each of the wafer n- contacts is 95% to 100% of a width of each of the die n-contacts at each location where they are directly bonded; and/or a width of each of the wafer p-contacts is 95% to 100% of a width of each of the die p-contacts at each location where they are directly bonded; and/or a width of the wafer dielectric material is 95% to 100% of a width of the die dielectric material at each location where they are directly bonded. Re claim 11, further comprising an etch stop layer on the target substrate below the wafer n-contacts, the wafer p-contacts, and the wafer dielectric material. Regarding claims claim 15, 16, 18, 19, 21, 22, …depositing an etch stop layer on the target substrate… Regarding claim 23, …a pitch "p" between adjacent centers of each of the die n-contacts and the die p-contacts…the "p" being in a of greater than or equal to 1 micrometer and less than or equal to 60 micrometers… …in combination with the other limitations. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOLLY KAY REIDA whose telephone number is (571)272-4237. The examiner can normally be reached M-F 8:30-5:00PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Brent Fairbanks can be reached at (408)918-7532. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOLLY K REIDA/Examiner, Art Unit 2899
Read full office action

Prosecution Timeline

Jun 17, 2024
Application Filed
Sep 21, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
86%
With Interview (+3.2%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 444 resolved cases by this examiner. Grant probability derived from career allowance rate.

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