Prosecution Insights
Last updated: July 17, 2026
Application No. 18/721,448

CERAMIC SUBSTRATE, METHOD FOR MANUFACTURING CERAMIC SUBSTRATE, WIRING BOARD, PACKAGE, MICROPHONE DEVICE, AND GAS SENSOR DEVICE

Non-Final OA §103
Filed
Jun 18, 2024
Priority
Dec 24, 2021 — JP 2021-211249 +1 more
Examiner
SHARMA, ADITYA
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Kyocera Corporation
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
6m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
24 granted / 27 resolved
+20.9% vs TC avg
Strong +16% interview lift
Without
With
+16.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
20 currently pending
Career history
51
Total Applications
across all art units

Statute-Specific Performance

§103
97.4%
+57.4% vs TC avg
§102
2.6%
-37.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 27 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Information Disclosure Statement The information disclosure statement (IDS) submitted on May 7, 2024, is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Response to Arguments Applicant's arguments filed May 8, 2026, have been fully considered but they are not persuasive. Claim 1 does not require the outer through-holes to be blind or isolated. Claim 1 recites only the plan-view location of the outer through-holes “outside region of the first through-hole”. Applicant’s asserted limitation that the outer through hoes are “blind”, “bottoms are closed”, or “structurally isolated” is not recited and therefore does not rebut the prima facie case under BRI. Iwata is applied for placement (outside region), not for “fluid communication”. Iwata expressly teaches forming “A plurality of through holes h2a… at positions outside… ha” (Fig 11; [0030]). Even though Iwata teaches a notch that may communicate with h2a in an L-shaped passage, claim 1 does not exclude such a configuration. “Teach away” is not shown by either reference. Neither Feiertag nor Iwata states that adding additional holes outside the main opening region is undesirable or incompatible with the substrate structure. Iwata’s outside holes are presented as a part of ceramic manufacturing solution (venting/deformation prevention), not as something to avoid. Applicant’s reservoirs or traps advantage is based on “blind/isolated” features not recited in claim 1. As set forth in the Office Action, Iwata provides the reason to add outside-region through-holes to Feiertag (improved degassing/manufacturing reliability and avoiding deformation) Therefore, the rejection is maintained. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1 is/are rejected under 35 U.S.C. 103 as being unpatentable over Feiertag et al. (US 8571239 B2) in view of Iwata et al. (JP 2009246338 A) Regarding Claim 1 – Feiertag teaches a ceramic substrate (Fig 3; SUB) comprising: at least one first layer provided with a first through-hole (Fig 3; SUB shows “a cutout is arranged in the lower of the two dielectric layers”); and at least one second layer located overlapping the first layer (Fig 3; SUB; Feiertag states “a multilayer substrate SUB, which is illustrated here in a two-layered fashion”), wherein the second layer is provided with a plurality of second through-holes each having a smaller hole diameter than the first through-hole (Fig 3; SEO in SUB; Feiertag col 4, lines 45-54), and the second through-holes comprise a plurality of inner through-holes located in an inside region of the first through-hole in plan view (Fig 3; SEO in SUB; Feiertag col 4, lines 51-54). Feiertag does not explicitly disclose a plurality of outer through-holes located in an outside region of the first through-hole in plan view. Iwata teaches a plurality of outer through-holes located in an outside region of the first through-hole in plan view (Fig 11; h2a and ha; Iwata [0030] states “A plurality of through holes h2a were formed at positions outside the same through holes ha”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Feiertag with a plurality of outer through-holes located in an outside region of the first through-hole in plan view as taught by Iwata to get the benefit of improved degassing/manufacturing reliability and avoid deformation. Regarding Claim 5 – Feiertag in view of Iwata teaches a wiring board comprising: the ceramic substrate according to claim 1; and a wiring (Feiertag; Fig 3; MET; [Claim 9] states “at least two dielectric layers with integrated wiring”). Regarding Claim 11 – Feiertag in view of Iwata teaches a microphone device comprising: the wiring board according to claim 5; and a microphone element (Feiertag; Fig 3; MIC; Feiertag states “Microphone chip MIC… mounted… on a multilayer substrate SUB”; Fig 5; MIC; Feiertag states “microphone chips MIC are mounted… on the top side of a ceramic multilayered substrate SUB”). Regarding Claim 15 – Feiertag in view of Iwata teaches an electronic apparatus comprising: the microphone device according to claim 11 (Feiertag; Figs 3, 5; MIC; Feiertag states “Microphone chip MIC and IC component AIC are both mounted… on a multilayer substrate SUB”; Feiertag [Claim 9] states “at least two dielectric layers with integrated wiring”). Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Feiertag et al. (US 8571239 B2) in view of Iwata et al. (JP 2009246338 A) and in further view of Burdon et al. (US 7164572 B1) Regarding Claim 2 – Feiertag in view of Iwata teaches the ceramic substrate according to claim 1, but does not explicitly disclose wherein the second through-holes are in a staggered array in the second layer. Burdon teaches the second through-holes are in a staggered array in the second layer (Figs 2-4; via structures 108, 110, 114; Burdon states “co-fired to form a monolithic structure with a staggered via structure”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Feiertag in view of Iwata with the second through-holes are in a staggered array in the second layer as taught by Burdon to increase the path distance through the ceramic structure and improve resistance to fluid ingress. Claim(s) 6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Feiertag et al. (US 8571239 B2) in view of Iwata et al. (JP 2009246338 A) and in further view of Minervini (US 9148731 B1) Regarding Claim 6 – Feiertag in view of Iwata teaches the wiring board according to claim 5, wherein the second layer comprises a second surface facing the first layer and a first surface located on an opposite side of the second surface (Feiertag; Fig 3; SUB; Feiertag states “multilayer substrate SUB, which is illustrated here in a two-layered fashion”), the first surface comprises an element mounting region (Feiertag; Fig 5; MIC; Feiertag states “microphone chips MIC are mounted… on the top side of a ceramic multilayered substrate SUB”), but does not explicitly disclose the element mounting region is located surrounding the first through-hole in plan view. Minervini teaches the element mounting region is located surrounding the first through-hole in plan view (Minervini [Claim 24] states “a solder pad ring that completely surrounds the second acoustic port” and “MEMS microphone die is positioned over the second acoustic port”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Feiertag in view of Iwata with the element mounting region is located surrounding the first through-hole in plan view as taught by Minervini in order to position the MEMS microphone die over the acoustic port to the diaphragm while maintaining the acoustic pressure within the front volume. Claim(s) 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Feiertag et al. (US 8571239 B2) in view of Iwata et al. (JP 2009246338 A) and in further view of Kuratani (US 8890265 B2) Regarding Claim 7 – Feiertag in view of Iwata teaches the wiring board according to claim 5, wherein the first layer comprises a third surface facing the second layer and a fourth surface located on an opposite side of the third surface (Feiertag; Fig 3; SUB; lower dielectric layer/cutout; Feiertag states “a cutout is arranged in the lower of the two dielectric layers”), but does not explicitly disclose the fourth surface comprises an element mounting region, and the element mounting region is located surrounding the first through-hole in plan view. Kuratani teaches the fourth surface comprises an element mounting region, and the element mounting region is located surrounding the first through-hole in plan view (Figs 4A-4B, 6-8; cover 44, concave portion 46, conductive layer 47, acoustic perforation 53, microphone chip 42; Kuratani states “the microphone chip 42 is accommodated inside the concave portion 46, and its underside is fixed to the top surface of the concave portion 46 (the conductive layer 47) by an adhesive. Also, the microphone chip 42 is installed in alignment with an acoustic perforation 53 provided on the cover 44, and covers the acoustic perforation 53”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Feiertag in view of Iwata with the fourth surface comprises an element mounting region, and the element mounting region is located surrounding the first through-hole in plan view as taught by Kuratani, so that the microphone chip is installed in alignment with and cover the acoustic perforation, thereby providing a large back chamber capacity and in=creasing microphone sensitivity. Claim(s) 9, 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Feiertag et al. (US 8571239 B2) in view of Iwata et al. (JP 2009246338 A) and in further view of Minervini (US 9148731 B1) and Protheroe et al. (US 8999757 B2) Regarding Claim 9 – Feiertag in view of Iwata teaches the ceramic substrate according to claim 1, but does not explicitly disclose a package comprising: the ceramic substrate according to claim 1 as a lid; and a wiring board comprising an element mounting region at a position overlapping the first through-hole in plan view. Minervini teaches a package comprising: a wiring board comprising an element mounting region at a position overlapping the first through-hole in plan view (Minervini [Abstract] states “A top port, surface mount package for a micro-electro-mechanical system (MEMS) microphone die is disclosed”; [Claim 29] states “the top surface having a die mount region” and “the acoustic port disposed in the cover element is acoustically coupled to the diaphragm”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Feiertag in view of Iwata with a package comprising: a wiring board comprising an element mounting region at a position overlapping the first through-hole in plan view as taught by Minervini in order to provide a top port surface mount MEMS microphone package in which the substrate mounted MEMS microphone die is acoustically coupled to the acoustic port. Protheroe teaches the ceramic substrate as a lid (Figs 1-4; cover 12, lid 13, port 16; Protheroe states “The cover 12 has a lid 13 and sidewalls 15. A port 16 extends through the lid 13… The cover 12 is formed from any suitable material such as a metal, ceramic, liquid crystal polymer or other molded polymer”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Feiertag in view of Iwata with the ceramic substrate as a lid because Protheroe teaches a package that enables the MEMS device to be mounted to a cover component without complex assembly and high cost and the device is protected from dirt, dust, and mechanical damage. Regarding Claim 13 – Feiertag in view of Iwata, Minervini, and Protheroe teaches a microphone device comprising: the package according to claim 9; and a microphone element (Feiertag; Fig 3; MIC; Feiertag states “Microphone chip MIC… mounted… on a multilayer substrate SUB”; Fig 5; MIC; Feiertag states “microphone chips MIC are mounted… on the top side of a ceramic multilayered substrate SUB”). Claim(s) 10 is/are rejected under 35 U.S.C. 103 as being unpatentable over Feiertag et al. (US 8571239 B2) in view of Iwata et al. (JP 2009246338 A), Minervini (US 9148731 B1) and Protheroe et al. (US 8999757 B2) and in further view of Kuratani (US 8890265 B2) Regarding Claim 10 – Feiertag in view of Iwata, Minervini, and Protheroe teaches the package according to claim 9, but does not explicitly disclose wherein the wiring board is provided with a recessed portion, and the element mounting region is provided on a bottom surface of the recessed portion. Kuratani teaches the wiring board is provided with a recessed portion, and the element mounting region is provided on a bottom surface of the recessed portion (Figs 14A-18; substrate 45, concave portion 66, conductive layer 67, circuit element 43; Kuratani states “The microphone 92 uses a substrate 45 comprising a concave portion 66… a conductive layer 67 is provided on the bottom surface of the concave portion 66… a region for mounting the circuit element 43 is formed inside the concave portion 66”). It would have been obvious for a person with ordinary skill in the art before the effective filing date of the claimed invention to have provided the device of Feiertag in view of Iwata, Minervini, and Protheroe with the wiring board is provided with a recessed portion, and the element mounting region is provided on a bottom surface of the recessed portion as taught by Kuratani, so that the circuit element mounting region is formed inside the concave portion and the conductive layer is provided on the bottom surface of the concave portion. Allowable Subject Matter Claim 3 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to ADITYA SHARMA whose telephone number is (571)270-7246. The examiner can normally be reached Monday - Friday 8:30 - 5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ADITYA SHARMA/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Jun 18, 2024
Application Filed
Jun 26, 2026
Non-Final Rejection mailed — §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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FLOATING ELECTRICAL CONNECTOR
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Patent 12658341
WIRE STRUCTURE, WIRE CAPACITOR, AND ELECTRONIC DEVICE INCLUDING THE WIRE CAPACITOR
2y 6m to grant Granted Jun 16, 2026
Patent 12648468
WIRING SUBSTRATE
2y 5m to grant Granted Jun 02, 2026
Patent 12641720
CIRCUIT BOARD
3y 1m to grant Granted May 26, 2026
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HIGH VOLTAGE FEEDTHROUGH APPARATUS
3y 4m to grant Granted May 05, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
99%
With Interview (+16.0%)
2y 7m (~6m remaining)
Median Time to Grant
Low
PTA Risk
Based on 27 resolved cases by this examiner. Grant probability derived from career allowance rate.

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