Prosecution Insights
Last updated: October 01, 2026
Application No. 18/724,156

CIRCUIT BOARD ASSEMBLY AND ELECTRONIC DEVICE

Final Rejection §102§103
Filed
Jun 25, 2024
Priority
Dec 30, 2021 — CN 202111645822.1 +1 more
Examiner
DINH, TUAN T
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Huawei Technologies Co., Ltd.
OA Round
2 (Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
7m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
944 granted / 1198 resolved
+10.8% vs TC avg
Strong +22% interview lift
Without
With
+22.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
29 currently pending
Career history
1229
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
45.0%
+5.0% vs TC avg
§102
38.5%
-1.5% vs TC avg
§112
6.0%
-34.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1198 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Note: liquid acrylic polymer emulsions (such as Golden GAC 400) act as strong fabric stiffeners. Epoxy acts as an excellent stiffener. When it cures, it transforms from a liquid into a highly rigid, solid plastic that reinforces and hardens the material it is applied to. Claim Objections Claim 33 is objected to because of the following informalities: Regarding claim 33, line 7, please, change “first pads” to - - the first pads - - for proper reading. Regarding claim 33, line 9, please, change “at least one first pad” to - - at least one of the first pads - - for proper reading. Regarding claim 33, line 13, please, change “second pads” to - - the second pads - - for proper reading. Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 33-34 is/are rejected under 35 U.S.C. 102a(1) as being anticipated by Andrews et al. (U.S. 2004/0237208), cited in the record. As best understood to claim 33, Andrews discloses a method of making a circuit board assembly by using soldering method as shown in figures 1-9, the method comprising; moving a first circuit board (51) to a second circuit board (55), and disposing first pads (53) corresponding to second pads (57), para-0006+; and soldering, by using reflow soldering, the first pads (53) to the second pads (57), wherein the first pads (53) and the second pads (57) are correspondingly disposed, figure 2; wherein the first circuit board (51) is a flexible printed circuit, para-0007, a stiffener (the pattern standoff 61 made from epoxy, polyimide, etc., para-0010) and the first pads (53) are disposed on a first surface of the first circuit board (51), the stiffener (61) is provided with first through holes (63, para-0006), at least one of the first pads is located in one first through hole (63) of the first through holes such that the at least one first pad (53) is exposed from the first through hole (63), figure 2, and hardness of the stiffener (61) is greater than hardness of the first circuit board (flexible material), wherein a material of the stiffener (61) is glass fiber, polyimide (para-0010), or stainless steel; and the second pads (57) are disposed on the second circuit board (55), and the at least one first pad (53) is soldered to the second pad (57). As to claim 34, Andrews discloses before moving the first circuit board (51) to the second circuit board (55), the method further comprises: placing a solder (59) on the second pads (57) of the second circuit board. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 20-22, 24-27, 35-37, and 39 is/are rejected under 35 U.S.C. 103 as being unpatentable over Andrews et al. in view of Yamamoto et al. (006) cited in the record. As best understood to claim 20, Andrews discloses a circuit board assembly as shown in figures 1-9, comprising a first circuit board (55) and a second circuit board (51), wherein the first circuit board (55) is a flexible printed circuit (0007), a stiffener (61) and first pads (57) are disposed on a first surface of the first circuit board (55), the stiffener (61) is provided with first through holes (63), at least one of the first pads (57) is located in one first through hole (63) of the first through holes such that the at least one first pad is exposed from the first through hole, and hardness of the stiffener (61) is greater than hardness of the first circuit board, wherein a material of the stiffener is glass fiber, polyimide (para-0009), or stainless steel; and second pads (53) are disposed on the second circuit board (51), and the at least one first pad (57) is soldered to the second pad (53). Andrews does not specifically disclose at least two first pads are disposed on a second surface that is of the first circuit board and that is disposed back to the first surface, and wherein at least two first pads are disposed on the first surface; and the at least two first pads on the first surface are disposed in a one-to-one correspondence with the at least two first pads on the second surface, and the first pads on the first surface and the first pads on the second surface that are correspondingly disposed are connected through second through holes. Yamamoto teaches printed circuit board solder mounting (100) as shown in figures 6 at least two first pads (33) are disposed on a second surface that is of the first circuit board (3) and that is disposed back to the first surface, and at least two first pads (31) are disposed on the first surface; and the at least two first pads (31) on the first surface are disposed in a one-to-one correspondence with the at least two first pads (33) on the second surface, and the first pads on the first surface and the first pads on the second surface that are correspondingly disposed are connected through second through holes (32). It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Yamamoto employed in the method of Andrews in order to provide electrical interconnection structure. Regarding claim 21, Andrews as modified by Yamamoto discloses the first surface is a surface that is of the first circuit board and that is opposite to the second circuit board. Regarding claim 22, Andrews as modified by Yamamoto teaches the first pads (31) in the first through holes (32) are soldered to the second pads (33) via a solder that passes through the second through holes (32), figures 14-15. It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Yamamoto employed in the method of Andrews in order to provide electrical interconnection structure. Regarding claim 24, Andrews as modified by Yamamoto discloses the first surface is a surface that is of the first circuit board (55) and that faces the second circuit board (51). Regarding claim 25, Andrews as modified by Yamamoto discloses the stiffener (61) abuts against the second circuit board. Regarding claim 26, Andrews as modified by Yamamoto a height of the stiffener (61) from the first surface of the first circuit board (55) is greater than or equal to a first height, and the first height is a height of the first pad (57) disposed on a same surface as the stiffener from the first surface of the first circuit board (55). Regarding claim 27, Andrews as modified by Yamamoto discloses the first surface is a surface that is of the first circuit board (55) and that faces the second circuit board (51). Regarding claim 35, Andrews discloses all of the limitations of claimed invention except for at least two first pads are disposed on a second surface that is of the first circuit board and that is disposed back to the first surface, and at least two first pads are disposed on the first surface; and the at least two first pads on the first surface are disposed in a one-to-one correspondence with the at least two first pads on the second surface, and the first pads on the first surface and the first pads on the second surface that are correspondingly disposed are connected through second through holes. Yamamoto teaches printed circuit board solder mounting (100) as shown in figures 6 at least two first pads (33) are disposed on a second surface that is of the first circuit board (3) and that is disposed back to the first surface, and at least two first pads (31) are disposed on the first surface; and the at least two first pads (31) on the first surface are disposed in a one-to-one correspondence with the at least two first pads (33) on the second surface, and the first pads on the first surface and the first pads on the second surface that are correspondingly disposed are connected through second through holes (32). It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Yamamoto employed in the method of Andrews in order to provide electrical interconnection structure. Regarding claim 36, Andrews as modified by Yamamoto discloses the first surface is a surface that is of the first circuit board and that is opposite to the second circuit board. Regarding claim 37, Andrews as modified by Yamamoto teaches the first pads (31) in the first through holes (32) are soldered to the second pads (33) via a solder that passes through the second through holes (32), figures 14-15. It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Yamamoto employed in the method of Andrews in order to provide electrical interconnection structure. Regarding claim 39, Andrews as modified by Yamamoto teaches the first surface is a surface that is of the first circuit board (3) and that faces the second circuit board (1). Claim(s) 29-32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Andrews et al. in view of Kido et al. (U.S. 2015/0189740) As to claim 29, Andrews discloses a circuit board assembly as shown in figures 1-9, comprising a first circuit board (55), a second circuit board (51), and a gasket (61), wherein the first circuit board (55) is a flexible printed circuit (para-0009), first pads (57) are disposed on a first surface of the first circuit board (57), the first surface and the second surface are disposed back to each other; second pads (53) are disposed on the second circuit board (51), and the first pads (57) are soldered (by the bump 59) to the second pads (53), wherein the first and second pads (57, 53) are correspondingly disposed; and the gasket (61) is located between the first and second circuit boards (55, 51), and the gasket (61) abuts against the first and second circuit boards (55, 51). Andrews does not disclose a stiffener is disposed on a second surface of the first circuit board, and hardness of the stiffener is greater than hardness of the first circuit board, wherein a material of the stiffener is glass fiber, polyimide, or stainless steel. Kido teaches stiffener-integrated flexible printed circuit board as shown in figure 1 comprising a stiffener (6) is disposed on a second surface of the first circuit board (5), and hardness of the stiffener is greater than hardness of the first circuit board (the PCB 5 is flexible PCB), wherein a material of the stiffener is glass fiber, polyimide (para-0029-0031), or stainless steel. It would have been obvious to one having ordinary skill in the art before the effective filling date to have a teaching of Kido employed in the method of Andrews in order to provide excellent electrical insulation reliability and prevent the stiffener from being detached during a reflow process. Regarding claim 30, Andrews as modified by Kido discloses the gasket is disposed on the second circuit board (51), and the second pads (53) and the gasket (61) are disposed on a same surface of the second circuit board; and a height of the gasket from the surface of the second circuit board (51) is greater than a height of the second pad from the surface of the second circuit board. Regarding claim 31, Andrews as modified by Kido discloses in figure 2 that the gasket (61) is an annular structure, and at least one second pad (53) in a second soldering region of the second circuit board (51) is disposed in a closed region enclosed by the gasket (61); or the gasket has a plurality of segments, and the plurality of segments of the gasket are disposed at gaps between adjacent second pads or corners of the second soldering region. Regarding claim 32, Andrews as modified by Kido discloses the gasket (61) is disposed on the first surface of the first circuit board (55), and a height of the gasket from the first surface is greater than a height of the first pad from the first surface. Allowable Subject Matter Claims 23, 28, and 40 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Response to Arguments Applicant’s arguments with respect to claim(s) 20-27, 29-40 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to TUAN T DINH whose telephone number is (571)272-1929. The examiner can normally be reached 8am-5pm, M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Dole can be reached at 571-272-2229. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /TUAN T DINH/Primary Examiner, Art Unit 2847
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Prosecution Timeline

Jun 25, 2024
Application Filed
Apr 15, 2026
Non-Final Rejection mailed — §102, §103
Jul 01, 2026
Response Filed
Sep 08, 2026
Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
79%
Grant Probability
99%
With Interview (+22.1%)
2y 11m (~7m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 1198 resolved cases by this examiner. Grant probability derived from career allowance rate.

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