DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
The application data sheet filed on 05 September 2024 was improper as it was not filed with proper mark-ups.
The foreign priority claim filed on 05 September 2024 was not entered because the foreign priority claim was not filed during the time period set forth in 37 CFR 1.55. For original applications filed under 35 U.S.C. 111(a) (other than a design application) on or after November 29, 2000, the time period is during the pendency of the application and within the later of four months from the actual filing date of the application or sixteen months from the filing date of the prior foreign application. In addition, if the application was filed on or after September 16, 2012, the claim for foreign priority must be presented in an application data sheet. See 37 CFR 1.55(d)(1). For national stage applications under 35 U.S.C. 371, the claim for priority must be made within the time limit set forth in the PCT and the Regulations under the PCT. See 37 CFR 1.55(d)(2). If applicant desires priority under 35 U.S.C. 119(a)-(d), or (f), 365(a) or (b), or 386(a) based upon a prior foreign application, applicant must file a petition for an unintentionally delayed priority claim under 37 CFR 1.55(e). The petition must be accompanied by (1) the priority claim under 35 U.S.C. 119(a)-(d), or (f), 365(a) or (b), or 386(a) in accordance with 37 CFR 1.55 identifying the prior foreign application to which priority is claimed, unless previously submitted; (2) a certified copy of the foreign application, unless previously submitted or an exception under 37 CFR 1.55 applies; (3) the applicable petition fee under 37 CFR 1.17(m)(1) or (2); and (4) a statement that the entire delay between the date the claim was due under 37 CFR 1.55 and the date the claim was filed was unintentional. The Director may require additional information where there is a question whether the delay was unintentional. The petition should be addressed to: Mail Stop Petition, Commissioner for Patents, P.O. Box 1450, Alexandria, Virginia 22313-1450.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the at least part of a second signal transmission line away from the center line is bent towards a second signal transmission line proximate to the center line, of claim 9, must be shown or the feature(s) canceled from the claim(s). Additionally, the orthographic projection of a portion of the transfer line proximate to the first connection point and beyond the isolation portion on the substrate substantially coinciding with an orthographic projection of a portion of the second fan-out sub-line proximate to the first connection point and beyond the isolation portion on the substrate, of claim 13, must be shown in the context of the first fan-out region, the second fan-out region, the first fan-out sub-region, and the second fan-out sub-region of the claims on which claim 13 depends, or the feature(s) canceled from the claim(s). Additionally, the second fan-out sub-line is located in the second fan-out sub-region and is electrically connected to an end of the transfer line away from the first fan-out sub-line, of claim 26, must be shown in the context of the second transfer-line (which makes up an end of the transfer line away from the first fan-out sub-line) of claim 18 on which claim 26 depends. No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Objections
Claims 1-3, 5-9, 12-16, 18, 20-21, 24-26, 31 objected to because of the following informalities: the mark-up of the amendments to the claims lacks good resolution which makes the amendments difficult to read and unclear. Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 6 and 9 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 6 recites the limitation, “for two adjacent fan-out lines in the third fan-out sub-lines and the first fan-out sub-lines, at least part of a fan-out line away from the center line is bent towards a fan-out line proximate to the center line,” in lines 8-10 of this claim. It is unclear whether the adjacent fan-out lines are each in both the third fan-out sub-lines and the first fan-out sub-lines or whether the adjacent fan-out lines are independently in either the third fan-out sub-lines or the first fan-out sub-lines. Furthermore, the first fan-out sub-lines are portions of the first fan-out lines and the third fan-out sub-lines are portions of the second fan-out lines (para. 271); therefore, it is indefinite to recite that a fan-out line is “in” a set of fan-out sub-lines. The meets and bound of the scope of the limitation are unclear.
Claim 9 recites the limitation, “the plurality of first fan-out lines each include a second signal transmission lines,” in line 6 of the claim. It is unclear whether the plurality of first fan-out lines each include a second signal transmission line or whether the plurality of first fan-out lines each include second signal transmission lines. The meets and bound of the scope of the limitation are unclear.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3 and 31 are rejected under 35 U.S.C. 103 as being unpatentable over Jeong et al. (US PGPub 20200312252 A1; hereinafter referred to as "Jeong”) in view of Cho et al. (US PGPub 20210151470 A1; hereinafter referred to as "Cho”).
Re claim 1: Jeong teaches a display substrate (FIG. 1-3; para. abstract, 93), having a display area (FIG. 1-2: el. DA; para. 59), a fan-out area (FIG. 3: el. FOA; para. 59) and a bending area (FIG. 3: el. BA; para. 60), the fan-out area being adjacent to an edge of the display area (FIG. 3: el. FOA, DA); the fan-out area including a first fan-out region (FIG. 3: el. FOA2; para. 60) and a second fan-out region (FIG. 3: el. FOA1; para. 60), the first fan-out region being closer to the display area than the second fan-out region (FIG. 3: el. FOA2, DA, FOA1); and the bending area being located between the first fan-out region and the second fan-out region (FIG. 3: el. FOA2, BA, FOA1); the display substrate comprising: a substrate (FIG. 3-4: el. 100; para. 94); and a plurality of conductive layers located on a same side of the substrate (FIG. 2-4: el. DL, CL, F; para. 85-88); the plurality of conductive layers being disposed sequentially (FIG. 4|conductive layers disposed in multiple sequential layers), wherein the plurality of conductive layers includes: a plurality of data lines (FIG. 1-2, 4: el. DL; para. 48-51, 86), wherein the plurality of data lines are disposed at intervals in a first direction (FIG. 2, el. DL, D2|data lines disposed at regular intervals in first direction D2; para. 49), the plurality of data lines all extend in a second direction (FIG. 1-2: el. DL, D1|data lines extend in second direction D1), and the second direction intersects the first direction (FIG. 1-2: el. D1, D2); the plurality of data lines include a plurality of first data lines (FIG. 1-2: el. DL1 to DLk and DLq+1 to DLM) and a plurality of second data lines (FIG. 1-2: el. DLk+1 to DLq); the plurality of first data lines are located in two edge regions of the display area in the first direction (FIG. 1-2: el. DL1 to DLk and DLq+1 to DLM|first data lines are located in the left edge region of first side area LA of display area and the right edge region RA of second side area RA of display area), and the plurality of second data lines are located in a central region of the display area in the first direction (FIG. 1-2: el. DLk+1 to DLq|second data lines are located in a central region of the display area in the first direction D2); a plurality of connection lines (FIG. 1-2: el. CL1-CLk and CLq+1-CLM; para. 53), wherein a first end of a connection line is located in an edge region of the display area in the first direction and is electrically connected to a first data line (FIG. 1: el. CL2|a first end of connection line CL2 is located in an edge region of the display area and is electrically connected to a first data line DL2); the connection line crosses at least one data line (FIG. 2: el. CL2, DL719) and is insulated from the crossed data line (FIG. 4: el. DL, CL; para. 105, 109|data lines DL included in first source metal layer on insulating layer 140, connection lines CL included in second source metal layer on insulating layer 150 and insulated from data lines DL included in first source metal layer by insulating layer 150); and a plurality of fan-out lines located in the fan-out area (FIG. 2: el. F1-F1440; para. 72), wherein the plurality of fan-out lines include a plurality of first fan-out lines (FIG. 2: el. F1-F720; para. 72) and a plurality of second fan-out lines (FIG. 2: el. F721-F1440; para. 72); a first fan-out line is electrically connected to the second end of the connection line (FIG.2: el. F2, CL2), and a second fan-out line is electrically connected to an end of a second data line proximate to the fan-out area (FIG. 2: el. F722, DL722). Jeong fails to teach a second end of the connection line extends to a position of the central region of the display area proximate to the fan-out area; and a second end of at least one connection line is located between two adjacent second data lines; and wherein the first fan-out line includes a transfer line, and the transfer line is located in the second fan-out region; the transfer line and the plurality of second fan-out lines are located in different conductive layers; the transfer line crosses at least one second fan-out line, so that an order of arrangement of ends of the plurality of fan-out lines away from the display area in the first direction is same as an order of arrangement of the plurality of data lines in the first direction.
In a similar field of endeavor, Cho teaches a display substrate comprising: a plurality of data lines (FIG. 14: el. 171; para. 111, 113), wherein the plurality of data lines are disposed at intervals in a first direction, the plurality of data lines all extend in a second direction (FIG. 14: el. 171|data lines 171 are disposed at intervals in the first horizontal direction and extend in the second vertical direction), and the second direction intersects the first direction; the plurality of data lines include a plurality of first data lines (FIG. 14: elements 1 to n of data lines 171) and a plurality of second data lines (FIG. 14: elements n+1 to 2n of data lines 171); a plurality of connection lines (FIG. 14: el. 510; para. 111, 113), wherein a first end of a connection line is located in an edge region of the display area in the first direction and is electrically connected to a first data line (annotated FIG. 14: el. 510a, element 2 of data lines 171|annotated FIG. 14 provided below shows a first end of connection line 510a connected to data line 2 in edge region of display area), and a second end of the connection line extends to a position of the central region of the display area proximate to the fan-out area (annotated FIG. 14: el. 510a|annotated FIG. 14 labelling second end of connection line provided below); and a second end of at least one connection line is located between two adjacent second data lines (FIG. 14: el. 510a|annotated FIG. 14 labelling second end of connection line between data line n+2 and location of adjacent data line n+3 provided below); and a plurality of fan-out lines located in the fan-out area (FIG. 14: el. 511, 145; para. 110, 113), wherein the plurality of fan-out lines include a plurality of first fan-out lines (FIG. 14: el. 511; para. 111, 113) and a plurality of second fan-out lines (FIG. 14: el. 145; para. 111, 113); a first fan-out line is electrically connected to the second end of the connection line (annotated FIG. 14: el. 511, 510a; para. 111, 113), and a second fan-out line is electrically connected to an end of a second data line proximate to the fan-out area (FIG. 14: el. 145, 171; para. 111, 113), wherein the first fan-out line includes a transfer line (annotated FIG. 14| transfer line of first fan-out line 511 labelled in annotated FIG. 14 provided below), and the transfer line is located in the second fan-out region (annotated FIG. 14); the transfer line and the plurality of second fan-out lines are located in different conductive layers (FIG. 13: el. 511, 145|transfer line of first fan-out line 511 in different conductive layer than second fan-out lines 145); the transfer line crosses at least one second fan-out line (annotated FIG. 14: el. 145, annotated transfer line), so that an order of arrangement of ends of the plurality of fan-out lines away from the display area in the first direction is same as an order of arrangement of the plurality of data lines in the first direction (FIG. 14: el. 171, 511, 145, para. 86, 110, 112). Cho further teaches a benefit of connecting, proximate to the fan-out area, the connection line to a first fan-out line and a second data line to a second fan-out line is an increased signal shielding between the intersecting first fan-out line and second fan-out line consisting of a shielding layer and three insulating layers (para. 112).
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Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Jeong and Cho, to enable using the connection, proximate to the fan-out area, of the connection line to a first fan-out line and a second data line to a second fan-out line of Cho in the display substrate of Jeong, for the benefit of an increased signal shielding between the intersecting first fan-out line and second fan-out line consisting of a shielding layer and three insulating layers.
Re claim 2: The combination of Jeong and Cho teaches the display substrate according to claim 1, wherein the plurality of connection lines and the plurality of first data lines are electrically connected in one-to-one correspondence (Jeong - FIG. 1: el. (CL1 to CLk and CLq+1 to CLM), (DL1 to DLk and DLq+1 to DLM); para. 53-55); and the plurality of second fan-out lines and the plurality of second data lines are electrically connected in one-to-one correspondence (Jeong - para. 62-63; second data lines DLk+1 to DLq connected to corresponding second fan-out lines).
Re claim 3: The combination of Jeong and Cho teaches the display substrate according to claim 1, wherein the plurality of first data lines (Jeong - FIG. 2: el. DL1-DL721 (and corresponding data lines from the second side area RA of FIG. 1)) include a plurality of first type of first data lines (Jeong - FIG. 2: el. DL1-DL720 (and corresponding data lines from the right side of the display)) and a plurality of second type of first data lines (Jeong - FIG. 2: el. DL721 (and corresponding data line from the right side of the display)); and the plurality of second fan-out lines (Jeong - FIG. 2: el. F721-F1440 (and corresponding fan-out lines from the right side of the fan-out area)) include a plurality of first type of second fan-out lines (Jeong - FIG. 2: el. F722-F1440 (and corresponding fan-out lines from the right side of the fan-out area)) and a plurality of second type of second fan-out lines (Jeong - FIG. 2: el. F721 (and corresponding fan-out line from the right side of the fan-out area)); the plurality of first type of first data lines (Jeong - FIG. 2: el. DL1-DL720 (and corresponding data lines from the right side of the display)) and the plurality of connection lines (Jeong - FIG. 2: el. CL1-CL720 (and corresponding connection lines from the right side of the display) are electrically connected in one-to-one correspondence (Jeong - FIG. 2: el. DL1-DL720, CL1-CL720); the plurality of first type of second fan-out lines (Jeong - FIG. 2: el. F722-F1440 (and corresponding fan-out lines from the right side of the fan-out area)) and the plurality of second data lines (Jeong - FIG. 2: el. DL722-DL1440 (and corresponding fan-out lines from the right side of the fan-out area)) are electrically connected in one-to-one correspondence (Jeong - FIG 2: el. F722-F1440, DL722-DL1440); and the plurality of second type of second fan-out lines (Jeong - FIG. 2: el. F721 (and corresponding fan-out line from the right side of the fan-out area)) and the plurality of second type of first data lines (Jeong - FIG. 2: el. DL721 (and corresponding data line from the right side of the display)) are electrically connected in one-to-one correspondence (Jeong - FIG. 2: el. 721, DL721).
Re claim 31: The combination of Jeong and Cho teaches a display device, comprising the display substrate according to claim 1 (Jeong - para. abstract, 45, 66).
Claims 5 and 7 are rejected under 35 U.S.C. 103 as being unpatentable over Jeong in view of Cho as applied to claim 1 above, and further in view of Bang et al. (US PGPub 20210013287 A1; hereinafter referred to as "Bang”).
Re claim 5: The combination of Jeong and Cho teaches the display substrate according to claim 1, wherein the first fan-out line further includes: a first fan-out sub-line electrically connected to the second end of the connection line (Cho - annotated FIG. 14, provided below, labels the first fan-out sub-line connected to second end of the connection line). The combination of Jeong and Cho further teach the transfer line electrically connected to the first fan-out sub-line (Cho - annotated FIG. 14, provided below, labels the first fan-out sub-line and the transfer line). The combination of Jeong and Cho fails to teach a plurality of transfer portions including a first transfer portion located in an area of the first fan-out region proximate to the bending area, and a second transfer portion located in an area of the second fan-out region proximate to the bending area, wherein the first transfer portion is electrically connected to an end of the first fan-out sub-line away from the connection line, and the transfer line is electrically connected to the second transfer portion; and a first signal transmission line passing through the bending area and connecting the first transfer portion and the second transfer portion.
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In a similar field of endeavor, Bang teaches a display substrate having data lines (FIG. 13: el. DL; para. 76, 152), connection lines (FIG. 13: el. DM; para. 76, 152), and a fan-out wiring area comprising a first fan-out region (main region MR of FIG. 14), a bending area (bending region BR of FIG. 14), and a second fan-out region (subregions SR of FIG. 14), wherein a fan-out wiring line includes transfer portions adjacent to the bending area and a signal transmission line in the bending area (FIG. 14). Bang teaches a display substrate, wherein the first fan-out line (FIG. 14: el. F2_1: para. 89, 92, 153-155) includes: a first fan-out sub-line (FIG. 14: el. 121_1: para. 92, 155) electrically connected to the second end of the connection line (FIG. 14: el. DM2: para. 89, 155); a plurality of transfer portions including a first transfer portion located in an area of the first fan-out region proximate to the bending area (annotated FIG. 14, provided below, labels the first transfer portion located in an area of the first fan-out region MR of FIG. 14 proximate to the bending area BR), and a second transfer portion located in an area of the second fan-out region proximate to the bending area (annotated FIG. 14, provided below, labels the second transfer portion located in an area of the second fan-out region SR of FIG. 14 proximate to the bending area BR), wherein the first transfer portion is electrically connected to an end of the first fan-out sub-line away from the connection line (annotated FIG. 14: el. 1st transfer portion, 121_1, DM2), and the transfer line is electrically connected to the second transfer portion (annotated FIG. 14: el. 122_1, 2nd transfer portion; para. 156, 160|annotated FIG. 14, provided below, labels the second transfer portion connected to the transfer line 122_1), and a first signal transmission line passing through the bending area and connecting the first transfer portion and the second transfer portion (FIG. 14, 15: el. 410; para. 92, 161| the first signal transmission line 410 located in the bending area BR and connecting the 1st transfer portion and the 2nd transfer portion is shown in annotated FIG. 14 provided below). Bang also teaches benefits of utilizing the signal transmission line for the bent region are a uniform wiring layer for the plurality of fan-out lines passing through the bent region and the ability to form a uniform organic insulating layer as an underlayer for the wires of the bent region (FIG. 14-15; para. 92, 142, 14, 109).
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Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Bang with the teaching of the combination of Jeong and Cho, to enable using bent signal transmission wiring line of Bang in the first fan-out line of the combination of Jeong and Cho, for the benefits of improved reliability provided by a uniform wiring sub-section of the fan-out wires on a uniform organic insulating layer in the bent region.
Re claim 7: The combination of Jeong, Cho, and Bang teaches the display substrate according to claim 5, wherein the second fan-out region includes a first fan-out sub-region and a second fan-out sub-region, and the first fan-out sub-region is closer to the bending area than the second fan-out sub-region (Cho - first fan-out sub-region and second fan-out sub-region of 2nd fan-out region labelled in annotated FIG. 14, provided below); at least part of the transfer line is located in the first fan-out sub-region; the display substrate further comprises: an isolation portion located in the first fan-out sub-region (Cho - FIG. 14: el. 177; para. 112), the isolation portion being located between the transfer line and the plurality of second fan-out lines (Cho - FIG. 13, annotated FIG. 14: el. 177, transfer line, 511, 145; para. 112, 113|isolation portion 177 located between the transfer line of first fan-out line 511 and the plurality of second fan-out lines 145).
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Allowable Subject Matter
Claims 6, 8-9, 12-16, 18, 20-21, 24-26 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Re claim 6: the closest prior art, Jeong et al. (US PGPub 20200312252 A1), Cho et al. (US PGPub 20210151470 A1), and Bang et al. (US PGPub 20210013287 A1), either alone or in combination fails to disclose or suggest, “the second fan-out lines include third fan-out sub-lines located in the first fan-out region; the first fan-out lines include first fan-out sub-lines located in the first fan-out region; and the third fan-out sub-lines and first fan-out sub-lines are arranged in the first direction; and for two adjacent fan-out lines in the third fan-out sub-lines and the first fan-out sub-lines, at least part of a fan-out line away from the center line is bent towards a fan-out line proximate to the center line,” in combination with the additionally claimed features, as claimed by the applicant.
Re claim 8: the closest prior art, Jeong et al. (US PGPub 20200312252 A1), Cho et al. (US PGPub 20210151470 A1), and Bang et al. (US PGPub 20210013287 A1), either alone or in combination fails to disclose or suggest, “wherein the first fan-out line further includes: a second signal transmission line connected between the second transfer portion and the transfer line, wherein an orthographic projection of the second signal transmission line on the substrate is located between an orthographic projection of the isolation portion on the substrate and an edge of the first fan-out sub-region proximate to the bending area,” in combination with the additionally claimed features, as claimed by the applicant.
Re claim 12: the closest prior art, Jeong et al. (US PGPub 20200312252 A1), Cho et al. (US PGPub 20210151470 A1), and Bang et al. (US PGPub 20210013287 A1), either alone or in combination fails to disclose or suggest, “wherein the first fan-out line further includes a second fan-out sub-line, and the second fan-out sub-line and the transfer line are located in different conductive layers,” in combination with the additionally claimed features, as claimed by the applicant.
Re claim 18: the closest prior art, Jeong et al. (US PGPub 20200312252 A1), Cho et al. (US PGPub 20210151470 A1), and Bang et al. (US PGPub 20210013287 A1), either alone or in combination fails to disclose or suggest, “wherein the transfer line includes: a first transfer sub-line electrically connected to the first fan-out sub-line; the first transfer sub-line crossing the at least one second fan-out line; and a second transfer sub-line electrically connected to an end of the first transfer sub-line away from the first fan-out sub-line; an orthographic projection of at least one second transfer sub-line on the substrate falls between orthographic projections of two adjacent fan-out lines on the substrate,” in combination with the additionally claimed features, as claimed by the applicant.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claims 1 and 31 rejected on the ground of nonstatutory double patenting as being unpatentable over claim 1 and 16 of U.S. Patent No. 12684,976 (Wang et al; hereinafter referred to as ‘976) in view of Cho et al. (US PGPub 20210296424 A1; hereinafter referred to as "Cho”).
Instant Application
US 12,684,976 B2
Claim 1:
A display substrate, having a display area, a fan-out area and a bending area, the fan-out area being adjacent to an edge of the display area; the fan-out area including a first fan-out region and a second fan-out region, the first fan-out region being closer to the display area than the second fan-out region; and the bending area being located between the first fan-out region and the second fan-out region; the display substrate comprising:
a substrate; and
a plurality of conductive layers located on a same side of the substrate; the plurality of conductive layers being disposed sequentially, wherein
the plurality of conductive layers includes:
a plurality of data lines, wherein the plurality of data lines are disposed at intervals in a first direction, the plurality of data lines all extend in a second direction, and the second direction intersects the first direction; the plurality of data lines include a plurality of first data lines and a plurality of second data lines; the plurality of first data lines are located in two edge regions of the display area in the first direction, and the plurality of second data lines are located in a central region of the display area in the first direction;
a plurality of connection lines, wherein a first end of a connection line is located in an edge region of the display area in the first direction and is electrically connected to a first data line, and a second end of the connection line extends to a position of the central region of the display area proximate to the fan-out area; the connection line crosses at least one data line and is insulated from the crossed data line; and a second end of at least one connection line is located between two adjacent second data lines; and
a plurality of fan-out lines located in the fan-out area, wherein the plurality of fan-out lines include a plurality of first fan-out lines and a plurality of second fan-out lines; a first fan-out line is electrically connected to the second end of the connection line, and a second fan-out line is electrically connected to an end of a second data line proximate to the fan-out area, wherein
the first fan-out line includes a transfer line, and the transfer line is located in the second fan-out region; the transfer line and the plurality of second fan-out lines are located in different conductive layers; the transfer line crosses at least one second fan-out line, so that an order of arrangement of ends of the plurality of fan-out lines away from the display area in the first direction is same as an order of arrangement of the plurality of data lines in the first direction.
Claim 31:
A display device, comprising the display substrate according to claim 1.
Claim 1:
A display substrate having a display region and a fan-out region, the fan-out region being adjacent to an edge of the display region, the display substrate comprising:
(wherein the display substrate further has a bending region and a chip on panel region that are sequentially away from the display region; the fan-out region includes a first fan-out region and a second fan-out region, the first fan-out region is located between the display region and the bending region, and the second fan-out region is located between the bending region and the chip on panel region – claim 1 - col. 33: line 43-50)
a substrate; and
a plurality of conductive layers located on a same side of the substrate, the plurality of conductive layers being stacked;
the plurality of conductive layers including:
a plurality of data lines, wherein the plurality of data lines are arranged at intervals along a first direction, and the plurality of data lines all extend along a second direction, the second direction intersecting the first direction; the plurality of data lines include a plurality of first data lines and a plurality of second data lines, the plurality of first data lines are located in two edge regions of the display region along the first direction, and the plurality of second data lines are located in a central region of the display region along the first direction;
a plurality of connection lines, wherein a first end of a connection line of the plurality of connection lines is located in an edge region of the two edge regions and is electrically connected to a first data line of the plurality of first data lines, and a second end of the connection line extends to a boundary between the central region and the fan-out region; at least one of the plurality of connection lines crosses at least one data line, and is insulated from the at least one data line that the at least one of the plurality of connection lines crosses; a second end of the at least one of the plurality of connection lines is located between two adjacent second data lines; and
a plurality of fan-out lines located in the fan-out region, wherein the plurality of fan- out lines include a plurality of first fan-out lines and a plurality of second fan-out lines; a first fan-out line is electrically connected to the second end of the connection line, and a second fan-out line is electrically connected to an end, proximate to the fan-out region, of a data line that is not electrically connected to the connection line; (wherein the display substrate further has a bending region and a chip on panel region that are sequentially away from the display region; the fan-out region includes a first fan-out region and a second fan-out region, the first fan-out region is located between the display region and the bending region, and the second fan-out region is located between the bending region and the chip on panel region – the limitation within these parentheses was addressed in the first paragraph of this column of the table)
the first fan-out line includes a transfer line, and the transfer line is located in the second fan- out region; the transfer line crosses at least one of the plurality of second fan-out lines, so that an arrangement order of ends of the plurality of fan-out lines away from the display region along the first direction is the same as an arrangement order of the plurality of data lines along the first direction; wherein the transfer line includes a main body and two connection ends, and the main body is located on a side of the two connection ends proximate to the display region.
Claim 16:
A display apparatus, comprising the display substrate according to claim 1
‘976 discloses the display substrate of claim 1, as shown above, but does not explicitly disclose second fan-out line is electrically connected to an end of a second data line proximate to the fan-out area. In a similar field of endeavor, Cho teaches a display substrate (FIG. 15; para. abstract, 171) comprising a plurality of data lines including a plurality of first data lines in edge regions of the display (FIG. 15: el. D1_2, D2_2, D3_2, D4_2; para. 172) and a plurality of second data lines in a central region of the display (FIG. 15: el. D5_2, D6_2, D7_2, D8_2; para. 172, 176-177). Cho further teaches a plurality of fan-out lines located in a fan-out area (FIG. 15: el. 60, 30; para. 70-76|drive lines 60 in drive area 30 are formed as fan-out lines which fan-out from a drive chip 40, in a fan-out drive area 30, to a display area DA), wherein the plurality of fan-out lines include a plurality of first fan-out lines (FIG. 16: el. 60a_1; para. 176) and a plurality of second fan-out lines (FIG. 16: el. 60b_1; para. 176); a first fan-out line is electrically connected to a second end of a connection line (FIG. 16: el. 64a_1, DM1_2; para. 176-177), and a second fan-out line is electrically connected to an end of a second data line proximate to the fan-out area (FIG. 16: el. 64b_1, D8_2; para. 176-177) Cho additionally teaches a benefit of connecting a second fan-out line to a second data line and a first fan-out line to a connection line is that the first fan-out line, the second fan-out line, the connection line, and the second data line can remain mutually insulated by insulating layers which enables a desired image to be displayed without modifying output signals output to the display (para. 177, 182-183; FIG. 15-16).
Therefore, it would have been obvious at the time of the effective filling date of the claimed invention to combine the teachings of Cho and ‘976, to enable using the second fan-out line electrically connected to an end of a second data line of Cho in the display device of ‘976, for the benefit of displaying a desired image without modifying output signals output to the display.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Specifically, the prior art made of record and not relied upon is considered pertinent to the connection lines and transfer lines of the applicant’s disclosure.
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/D.G./ Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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