DETAILED ACTION
The preliminary amendment filed 15 July 2024, amending the specification at paragraph [0036] and amending claims 1–14, has been entered.
Claims 1–14 are pending and have been examined on the merits below.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Domestic Benefit
Applicant’s claim for the benefit of a prior-filed application under 35 U.S.C. 120, 365(c), or 386(c) is acknowledged. This application is a 35 U.S.C. 371 national stage of International Application No. PCT/JP2023/003039, filed 31 January 2023.
Foreign Priority
Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119(a)–(d). A certified copy of Japanese Application No. 2022-013589, filed 31 January 2022, was received in this application on 15 July 2024.1
Information Disclosure Statement
The information disclosure statements filed 15 July 2024 and 23 July 2025 have been considered. Both statements were filed before the mailing of this first Office action. See 37 CFR 1.97; MPEP 609.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. See 37 CFR 1.72(a); MPEP 606.01. The following title or similar is suggested: Semiconductor Module Having a Heat Dissipation Member and an Off-Center Semiconductor Element.
The specification is objected to because paragraph [0045] refers to “stepped portion 26.” The drawings and the remainder of the specification identify the stepped portion as 46. Applicant may amend paragraph [0045] to recite stepped portion 46.
Claim Interpretation
The claims are given their broadest reasonable interpretation consistent with the specification. The specification is used to interpret claim language. Limitations appearing only in the embodiments are not read into the claims. Phillips v. AWH Corp., 415 F.3d 1303, 1316, 75 USPQ2d 1321, 1329 (Fed. Cir. 2005) (en banc); MPEP 2111.
In claim 1, “positioned above the semiconductor element” does not require contact between the heat dissipation member and the element. “Shifted from a center of the substrate” requires that the element not sit at the geometric center of the substrate in plan view. It does not require a particular distance of offset.
Claim Rejections - 35 USC § 102 and § 103
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
102(a) A person shall be entitled to a patent unless—
(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention; or
(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned or subject to an obligation of assignment to the same person at the time the inventions covered therein were effectively filed absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned or subject to an obligation of assignment to the same person at the time the inventions covered therein were effectively filed as the examiner may consider this fact in determining whether a rejection under 35 U.S.C. 102 or 103 based on prior art is appropriate.
A. Prior Art Rejections Based on Primary Reference Kozu
Claims 1 and 14 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kozu (JP 2010-141279 A, published 24 June 2010) (cited on the IDS filed 15 July 2024).
Regarding independent claim 1, Kozu teaches a semiconductor module (Figs. 1–3; paragraphs [0010]–[0018]) comprising a substrate (board 3), at least one semiconductor element positioned on the substrate (element 1; paragraphs [0010]–[0012]), and a heat dissipation member positioned above the semiconductor element (radiator 4, including fins 42 and projecting part 43, disposed over element 1 and contacting a heat-radiation part of the element through through-hole 32; Figs. 1–3). Kozu teaches that a position of the semiconductor element is shifted from a center of the substrate (Fig. 2; element 1 is located toward an end of board 3 rather than at the board center in plan view).
PNG
media_image1.png
362
756
media_image1.png
Greyscale
Kozu, Figs. 1–2 (JP 2010-141279 A)
Regarding claim 14, Kozu teaches that the semiconductor element is an optical element that converts an electrical signal into an optical signal (paragraph [0011]; element 1 is described as an LED).
Claim 2 is rejected under 35 U.S.C. 103 as being unpatentable over Kozu in view of Yano (US 2006/0169437 A1, published 3 August 2006). Yano is prior art under 35 U.S.C. 102(a)(1).
Regarding claim 2, Kozu teaches the semiconductor module of claim 1 as set forth above, including element 1 shifted from the center of board 3 (Fig. 2). Kozu fastens radiator 4 to board 3 with screws 5 through attachment holes 44 (Figs. 1–2; paragraphs [0014]–[0015]). Kozu does not teach that the heat dissipation member includes a plate-shaped portion and at least one leg portion extending from the plate-shaped portion toward the substrate. Projecting part 43 passes through through-hole 32. That projecting part is not a leg extending from a plate toward the substrate.
Yano suggests the problem with that arrangement. Yano states that a mounting position on the substrate may be shifted from a mounting position on the radiator. When the radiator is then fixed to the substrate with screws, a large stress is applied to the substrate, the substrate may be bent, and a soldering portion of the semiconductor to the substrate may be cracked. Yano further states that a separate spring can reduce that stress, but the spring increases the number of components.
Yano’s plate and legs fix that problem. Yano teaches a plate portion (top plate portion 31) and leg portions (32a–32d) extending from the outer periphery of the plate toward substrate 10 and fixed to the substrate. The plate member is elastic relative to the substrate, so it absorbs the shift between the mounting positions and restricts deformation of the substrate without a separate spring. The plate is on the side of the radiator opposite the substrate, and the radiator contacts IC chip 11 (Figs. 1–2).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to recognize that combining Yano with Kozu would have been beneficial because Yano’s plate and legs absorb a shift between the mounting position on the substrate and the mounting position on the radiator, so the screws that fasten Kozu’s radiator to the board do not bend the substrate or crack the solder of the semiconductor, and a separate spring is not required.
Allowable Subject Matter
Claims 3-13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter. Kozu and Yano do not teach a virtual region R that includes the center of the substrate, with the element outside that region, as required by claim 4. They do not teach the orthogonal arrangement of element centers required by claim 6. They do not teach four elements, one in each of four regions divided by two straight lines intersecting at the center, as required by claim 7. They do not teach that every semiconductor element is in only one of those four regions, as required by claim 8. Figure 10 of Kozu is a single row of elements and is not relied on for claims 6–8.
They also do not teach three regions arranged along the longitudinal direction of the leg portion, with the element in the second or third region, as required by claim 3. They do not teach a second opening of smaller area than a first opening between leg portions, as required by claim 9. They do not teach a stepped portion of the plate-shaped portion, as required by claim 10, an inclined portion whose distance to the substrate decreases toward an outer side, as required by claim 11, or a curved corner of the plate, including on the substrate side, as required by claims 12 and 13. Further, claims 3-13 contain allowable subject matter because they depend on the allowable subject matter of claim 3.
Double Patenting
No double patenting rejection is made. The only U.S. application of record in this family is the instant application.
Conclusion
A shortened statutory period for reply to this action is set to expire THREE MONTHS from the mailing date of this action.
Claims 1, 2, 5, and 14 are rejected. Claims 3, 4, and 6–13 are objected to as set forth above.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN P DULKA whose telephone number is (571)270-7398. The examiner can normally be reached Monday-Friday, 9am-5pm, EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ELISEO RAMOS-FELICIANO can be reached at (571)272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
24 September 2026
/John P. Dulka/Primary Examiner, Art Unit 2817
1A translation of JP 2022-013589 may be required to perfect the priority claim if that document is relied on and is not in English. See 37 CFR 1.55(g)(3); MPEP 215.02(a).