DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 7/19/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: METHOD FOR PRODUCING A PLURALITY OF PHOTONIC CRYSTAL OPTOELECTRONIC SEMICONDUCTOR CHIPS, AND PHOTONIC CRYSTAL OPTOELECTRONIC SEMICONDUCTOR CHIP.
Preliminary Amendment
Applicant's 7/19/2024 Preliminary Amendment to: 1. Amend the instant Specification. 2. Amend the Claims is acknowledged by the Office.
Claim Objections
Claim 19 is objected to because of the following informalities: the grammatical error “according to the claim 18” in line 1, which would be more clearly read as “according to claim 18”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 18-20; 26-29 and 32 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by LIM (US 2010/0295080 A1, hereafter Lim).
Re claim 18, Lim discloses in FIGS. 1-6, 9 and 18 a method for manufacturing a plurality of optoelectronic semiconductor chips (101A), the method comprising:
providing a growth surface (110 in FIG. 1; [0032]) with a plurality of LED areas
(inwardly right of left 161and inwardly left of patterned 130/140/150 as in FIG. 18), which
are separated from each other by reflector areas (at left 161 and inwardly left of right 161 of each chip; [0081]);
epitaxial growing epitaxial semiconductor columns (132 in FIG. 1; [0041]) on the growth surface (110);
epitaxial coalescing (FIG. 1) the epitaxial semiconductor columns (132) so that a closed semiconductor surface (130; [0035] and [0041]) is formed;
epitaxial growing an active semiconductor layer (140; [0031] and [0072]) on or over the closed semiconductor surface (130), wherein the active semiconductor layer (140) is configured to generate electromagnetic radiation (light as in FIG. 10; [0083]); and
removing the active semiconductor layer (140 in FIGS. 9 and 18; [0081] and [0099]) over the reflector areas (at left 161 and inwardly left of right 161 of each chip) such that a plurality of active semiconductor areas (140 as in each chip in FIG. 18 from FIG. 9) is generated over the LED areas (inwardly right of left 161and inwardly left of
patterned 130/140/150 as in FIG. 18).
Re claim 19, Lim discloses the method according to claim 18, wherein removing the active semiconductor layer (140) over the reflector areas (at left 161 and inwardly left
of right 161 of each chip) comprises retaining a further closed semiconductor surface (patterned 130).
Re claim 20, Lim discloses the method according to claim 18, wherein the epitaxial semiconductor columns (132) form a two-dimensional photonic crystal for the electromagnetic radiation (light) of the active semiconductor areas (140 as in each chip
in FIG. 18 from FIG. 9) over the reflector areas (at left 161 and inwardly left of right 161 of each chip; [0081]).
Re claim 26, Lim discloses in FIGS. 15 and 20 an optoelectronic semiconductor chip (30) comprising:
a cavity (upper portion of 31; [0117]) comprising a bottom surface (lower portion 31);
epitaxial semiconductor columns (133/130A; [0090]-[0091] and [0120]), which extend from the bottom surface (lower portion of 31) of the cavity (upper portion of 31) to a radiation exit surface (underside of 140) of the optoelectronic semiconductor chip (30);
an active semiconductor area (underside of 140; [0043]; [0081]; [0099] and [0124]) configured to generate electromagnetic radiation (light as in FIG. 14; [0089]); and
a reflector (metallic inner walls of upper portion of 31) arranged at side surfaces (left/right slanted inner walls of upper portion of 31) of the cavity (upper portion of 31) and
configured to reflect the electromagnetic radiation (light), wherein the active semiconductor area (140) is arranged between the bottom surface (lower portion of 31) and the epitaxial semiconductor columns (133/130A).
Re claim 27, Lim discloses the optoelectronic semiconductor chip according claim 26, wherein hollow spaces (125; [0091]) are arranged between the epitaxial semiconductor columns (133/130A).
Re claim 28, Lim discloses the optoelectronic semiconductor chip according to claim 27, wherein the reflector comprises (further) the epitaxial semiconductor columns
(133/130A), which are part of a two-dimensional photonic crystal ([0092]) for the electromagnetic radiation (light).
Re claim 29, Lim discloses the optoelectronic semiconductor chip according to claim 28, wherein the hollow spaces (125) are arranged between the epitaxial semiconductor columns of the reflector (133/130A).
Re claim 32, Lim discloses the optoelectronic semiconductor chip according to claim 26, wherein the active semiconductor area (140) comprises a nitride compound semiconductor material (e.g. InGaN/GaN; [0043]) and is configured to generate the
electromagnetic radiation of a red spectral range ([0124]-[0125]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 21-23 are rejected under 35 U.S.C. 103 as being unpatentable over Lim in view of Ohmae et al (US 2015/0228846 A1).
Re claim 21, Lim discloses the method according to claim 18.
But, fails to disclose wherein the epitaxial semiconductor columns (on the reflector areas are exposed when the active semiconductor layer (140) over the reflector areas (at left 161 and inwardly left of right 161 of each chip) is removed.
However,
Ohmae discloses in FIGS. 3 and 27 a method comprising: patterning an active layer (17 as in FIG. 3; [0169]) to form a mesa (20; [0169]) which exposes epitaxial semiconductor structures (15; [0151] and [0201]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Lim, by using the patterning of Ohmae, to pattern active layer to form a mesa, wherein the epitaxial semiconductor columns (on the reflector areas are exposed when the active semiconductor layer (140) over the reflector areas (at left 161 and inwardly left of right 161 of each chip) is removed, which reduces the contact resistance to the epitaxial semiconductor columns.
Re claims 22-23, Lim discloses the method according to the claim 21, further comprising filling hollow spaces (at 120/124; [0052] and [0073]) between the epitaxial semiconductor columns (132) with a dielectric (e.g. SiOx; [0033]); and wherein the epitaxial semiconductor columns (132) and the dielectric (120) form a two-dimensional photonic crystal ([0083]) for the electromagnetic radiation (light) of the active semiconductor areas (140 as in each chip in FIG. 18 from FIG. 9).
Claims 24-25 are rejected under 35 U.S.C. 103 as being unpatentable over Lim in view of Yang et al (US 2007/0082486 A1, hereafter Yang).
Re claims 24-25, Lim discloses the method according to claim 18.
But, fails to disclose wherein removing the active semiconductor layer (140 in FIGS. 9 and 18) over the reflector areas (at left 161 and inwardly left of right 161 of each chip) comprises completely removing the epitaxial semiconductor columns (133) over the reflector areas at least against a growth direction so that cut-outs are formed, which are adjacent to the active semiconductor areas (140 as in each chip in FIG. 18 from FIG. 9); and further comprising applying a reflective layer sequence reflecting the electromagnetic radiation of the active semiconductor areas to side surfaces of the cut-outs in the embodiment of FIG. 18.
However,
A. Yang discloses in FIGS. 3a-3h a method comprising: removing the active semiconductor layer (35b in FIG. 3b; [0024] and [0040]) over the reflector areas (at left 161 and inwardly left of right 161 of each chip) comprises completely removing the epitaxial semiconductor columns (35a/35b/35c of 35 at H; [0040]) over the reflector areas (10-500 µm of H on 31; [0040]) at least against a growth direction (vertically on 31) so that cut-outs (patterned 35) are formed, which are adjacent to the active semiconductor areas (width of each 35).
And,
B. Lim discloses in the embodiment of FIG. 19 applying a reflective layer sequence (155/156; [0102]-[0103]) reflecting the electromagnetic radiation (light) of the active semiconductor areas (140 of each chip 101B; [0111]) to side surfaces (as in FIG. 10; [0083]) of the cut-outs (each chip 101B).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Lim, by using the patterning of Yang and the alternative active semiconductor areas of Lim, to remove the active semiconductor layer (140 in FIGS. 9 and 18) over the reflector areas (at left 161 and inwardly left of right 161 of each chip) comprising completely removing the epitaxial semiconductor columns (133) over the reflector areas at least against a growth direction so that cut-outs are formed, which are adjacent to the active semiconductor areas (140 as in each chip in FIG. 18 from FIG. 9); and further comprising applying a reflective layer sequence reflecting the electromagnetic radiation of the active semiconductor areas to side surfaces of the cut-outs, providing completely divided into individual light emitting diodes which prevent yield reduction (Yang; [0003] and [0046]) for lateral light emitting devices with improved light extraction efficiency (Lim; [0112]-[0113]).
Claim 30 is rejected under 35 U.S.C. 103 as being unpatentable over Lim in view of Chan et al (US 2012/0104426 A1, hereafter Chan).
Re claim 30, Lim discloses the optoelectronic semiconductor chip according to claim 26.
But, fails to disclose wherein the reflector (upper portion of 31) comprises a reflective layer sequence.
However,
Chan discloses in FIG. 3 an optoelectronic semiconductor chip comprising: wherein the reflector (12/42; [0041] and [0044]) comprises a reflective layer sequence (12/42; [0041] and [0044]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Lim, by using the reflector of Chan, wherein the reflector comprises a reflective layer sequence, as substitutional equivalent (MPEP § 2144.06) for reflecting light, where effectiveness of the reflectivity of the reflector and the emission angle of the cavity can be enhanced by tapering the cavity and reflector carried therein inwardly toward the interior of the cavity and to improve the color mixing of the light emitting devices for better image quality (Chan; [0041] and [0044]).
Claims 31 and 33-34 are rejected under 35 U.S.C. 103 as being unpatentable over Lim in view of Sizov et al (US 2020/0343230 A1, hereafter Sizov).
Re claims 31 and 33-34, Lim discloses the optoelectronic semiconductor chip according to claim 26.
But, fails to disclose wherein on the radiation exit surface an angle filter is arranged, which is configured to reflect the electromagnetic radiation that impinges on the angle filter at a predetermined angle; wherein the optoelectronic semiconductor chip has an edge length of at most 10 micrometers; and wherein the optoelectronic semiconductor chip is a micro-LED.
However,
Sizov discloses in FIG. 9A an optoelectronic semiconductor chip (LED 150 of 510; [0043] and [0076]) comprising: wherein on the radiation exit surface (190; [0064]) an angle filter (520; [0076]) is arranged, which is configured to reflect the electromagnetic radiation that impinges on the angle filter at a predetermined angle ([0076]); wherein the optoelectronic semiconductor chip (510) has an edge length of at most 10 micrometers (lateral dimension of LED 150; [0037] and [0043]); and wherein the optoelectronic semiconductor chip (LED 150 of 510) is a micro-LED ([0037]).
Thus, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the structure of Lim, by adding the angle filter of Sizov, and using the micro-LEDs of Sizov, the angle filter is arranged the radiation exit surface, which is configured to reflect the electromagnetic radiation that impinges on the angle filter at a predetermined angle; wherein the optoelectronic semiconductor chip has an edge length of at most 10 micrometers; and wherein the optoelectronic semiconductor chip is a micro-LED, counteracting the tendency of light to otherwise be trapped by overcoat layer interfaces by total internal reflection (TIR) effects (Sizov; [0076]).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
US-20100120228-A1 discloses separation of LED active layers.
US-20100012969-A1 discloses LEDs with coalesced semiconductor pillars.
US-20030141507-A1 discloses LEDs patterned with photonic crystal structures.
US-20060270078-A1 discloses LED package cavities with reflecting sidewalls.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERIC W JONES whose telephone number is (408) 918-9765. The examiner can normally be reached M-F 7:00 AM - 6:00 PM PT.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, N. Drew Richards can be reached at (571) 272-1736. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/ERIC W JONES/
Primary Examiner, Art Unit 2892
Prosecution Insights