Prosecution Insights
Last updated: August 06, 2026
Application No. 18/730,779

SYSTEM AND METHODS FOR MANUFACTURING A CRISSCROSS MATRIX OF SOLAR CELLS

Non-Final OA §102§103§112
Filed
Jul 21, 2024
Priority
Feb 01, 2022 — provisional 63/305,307 +1 more
Examiner
HAN, JONATHAN
Art Unit
Tech Center
Assignee
Solarwat Ltd.
OA Round
1 (Non-Final)
84%
Grant Probability
Favorable
1-2
OA Rounds
4m
Est. Remaining
93%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
1066 granted / 1274 resolved
+23.7% vs TC avg
Moderate +10% lift
Without
With
+9.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
24 currently pending
Career history
1300
Total Applications
across all art units

Statute-Specific Performance

§101
1.3%
-38.7% vs TC avg
§103
55.5%
+15.5% vs TC avg
§102
32.0%
-8.0% vs TC avg
§112
9.2%
-30.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1274 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claim 1 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. With respect to claim 1, “a flat surface” is referenced multiple times (lines 26, 33, 41, 47, 55, 63). It is unclear as to whether this is the same flat surface in each instance or a new flat surface. For the sake of prosecution, either interpretation is acceptable. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-2 and 7-15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Golub et al. (U.S. Patent No. 3,330,700; hereinafter Golub) With respect to claim 1, Golub discloses a method for manufacturing a PV solar cells matrix array (SCMA) of generally quadrangular solar cells (100, 102) [10] (see Figure 10), having a rear side (122), a front side (120), an upper side covered by an upper conductive contact grid (130) having a first electric pole (FEP) ([P-layer] see Column 1, 61-66), and a lower side covered by a lower conductive contact grid (132) having a having a second electric pole (SEP) being opposite to said FEP ([N layer], see Column 1, lines 67-71), wherein each row of the SCMA includes m solar cells, and each column of the array of solar cells includes n solar cells, all of which are electrically interconnect both in series and in parallel (see Figure 9-10), the method comprising the steps of: a) providing n−1 flexible, parallel-and-serial connection conductors (200, 300) [20] (see Column 3, lines 30-31), each comprising an upper horizontal surface (210) [20c], a generally vertical surface (220) [20b], and a bottom horizontal surface (230) [20a], wherein said flexible, parallel-and-serial connection conductors are single layer parallel-and-serial connection conductors (200) (See Figure 9); wherein said vertical surface of each of said single layer parallel-and-serial connection conductor is configured to be attached to either the front side, the rear side or both the front and rear sides, of each of said m placed solar cells (see Figure 10); wherein said upper horizontal surface of each said single layer parallel-and-serial connection conductors (200), except for the first row, is configured to be conductively attached to the respective upper conductive contact grid of the previous solar cell; and wherein said bottom horizontal surface of each said single layer parallel-and-serial connection conductors, except for the last row, is configured to be conductively attached to the respective lower conductive contact grid of the next solar cell (see Column 3, lines 44-49 and Figure 10), b) providing mXn PV solar cells (see Figure 10); c) assembling the array of m×n PV solar cells wherein, proceeding with either: i) placing a stuck row of m of said solar cells onto a flat surface [12], placing said vertical surface of a single layer parallel-and-serial connection conductor adjacent to said front side of said placed stuck row of m of solar cells, and wherein said upper horizontal surface (210) of said placed single layer parallel-and-serial connection conductor is placed adjacent to said upper conductive contact grid (130) of the said placed stuck row of m of said solar cells; ii) placing the next stuck row of m of said solar cells onto a flat surface, wherein the rear end of said lower conductive contact grid (132) of said placed stuck row of m of said solar cells is placed over and adjacent to bottom horizontal surface (230); iii) placing said vertical surface of said first single layer parallel-and-serial connection conductor adjacent to said front side of said placed stuck row of m of said solar cells; iv) repeat steps vi-vii until reaching the last stuck row of m of said solar cells; v) placing the nth stuck row of m of said solar cells onto a flat surface, wherein the rear end of said lower conductive contact grid (132) of said last placed stuck row of m of said solar cells is placed over and adjacent to bottom horizontal surface (230) (see Column 3, lines 30-34 and 42-43), or with: i) providing a first single layer parallel-and-serial connection conductor; ii) placing a stuck row of m of said solar cells onto a flat surface, wherein said vertical surface of said provided single layer parallel-and-serial connection conductor is placed adjacent to said front side of said placed stuck row of m of said placed solar cells, and wherein said lower horizontal surface of the last placed single layer parallel-and-serial connection conductor is placed adjacent said lower conductive contact grid (132) of the last placed stuck row of m of said solar cells, except for the last row; iii) placing the next stuck row of m of said solar cells onto a flat surface, wherein the rear end of said upper conductive contact grid (130) of said placed stuck row of m of said solar cells is placed below and adjacent to upper horizontal surface (210); iv) placing said vertical surface of said first single layer parallel-and-serial connection conductor adjacent to said front side of said placed stuck row of m of said solar cells; v) repeat steps vi-vii until reaching the last stuck row of m of said solar cells; placing the n.sup.th stuck row of m of said solar cells onto a flat surface, wherein the front end of said upper conductive contact grid (130) of said placed stuck row of m of said solar cells is placed below and adjacent to upper horizontal surface (210), d) soldering said assembled array of m×n PV solar cells (see Column 3, lines 40-49, Column 3, line 58- Column 4, line 8 and Figure 10). With respect to claim 2, Golub discloses wherein said parallel-and-serial connection conductor (200) is made of conductive material (see Column 1, line 72). With respect to claim 7, Golub discloses wherein said soldering of the assembled array of m×n PV solar cell is performed using low temperature soldering, or by using high temperature soldering, or a combination of both high temperature soldering and low temperature soldering (See Column 2, line 55-72 and Column 3, line 38-Column 4, line 8; note: high temperature is disadvantageous due to damage). With respect to claim 8, Golub discloses wherein said flat surface is a receptor conveyor (see Column 3, line 58-66). With respect to claim 9, Golub discloses wherein said upper conductive contact grid (130) further includes a conductive pad [P layer] (see Column 3, lines 42-43), and wherein the respective parallel and serial conductor (200, 300) is configured to be conductively attached to said plus conductive pad (see Figure 10). With respect to claim 10, Golub discloses wherein said lower conductive contact grid (132) further includes a conductive pad [N layer] (see Column 3, lines 41-42), and wherein the respective parallel and serial conductor (200, 300) is configured to be conductively attached to said minus conductive pad (see Figure 10) With respect to claim 11, Golub discloses wherein a non-conductive region j is kept between the front end of said lower conductive contact grid (132) and the front side of the body of the respective PV solar cell (See Figure 13; insulating layer [13] and adhesive [14] are present within the nonconductive region). With respect to claim 12, Golub discloses wherein a non-conductive region k is kept between the rear end of upper lower conductive contact grid (130) and the rear side of the body of the respective PV solar cell (See Figure 13). With respect to claim 13, Golub discloses wherein said PV solar cells are regular solar cells (see Column 1, lines 63-64). With respect to claim 14, Golub discloses wherein said PV solar cells are cut from regular solar cells (see Column 1, lines 63-64). With respect to claim 15, Golub discloses wherein said upper conductive contact grid (130) is configured to face the incoming light (See Figure 13). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 3-6 is/are rejected under 35 U.S.C. 103 as being unpatentable over Golub in view of Inoue (U.S. Patent No. 5,391,235) With respect to claim 3, Golub fails to disclose wherein said conductive material is cupper or silver. In the same field of endeavor, Inoue teaches wherein said conductive material is cupper or silver (see Column 8, lines 29-36). Implementation of copper or silver conductive material as taught by Inoue allows for high conductivity and low resistivity conductivity amongst cells (see Inoue Column 8, lines 29-36). With respect to claim 4, Golub fails to disclose wherein said parallel-and-serial connection conductor is a multi-layer, parallel and serial conductor foil (300). In the same field of endeavor, Inoue teaches wherein said parallel-and-serial connection conductor [110] is a multi-layer [111/112], parallel and serial conductor foil (300) (see Figure 2). Implementation of a multilayer connection conductor allows for high conductivity while isolating conductive material from short circuiting (see Inoue Column 8, lines 8-36). Therefore, it would have been obvious to one of ordinary skill in the art at the time of invention that the combination of references would arrive at the claimed invention With respect to claim 5, the combination of Golub and Inoue discloses wherein said multi-layer, parallel and serial conductor foil comprises: a. an upper non-conductive polymer foil (310) with an adhesive lower side (312); b. a metal foil (320) that is solder ready coated; and c. a lower non-conductive polymer foil (330) with an adhesive upper side (332), wherein said three layers are glued together in a staggering manner such that parts of the adhesive lower side (312) and the adhesive upper side (332) are left untouched (see Column 8, lines 8-59). With respect to claim 6, the combination of Golub and Inoue discloses wherein either said upper non-conductive polymer foil, said lower non-conductive polymer foil (330), or both are transparent (see Inoue Column 7, lines 18-25). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Zimmermann et al. (U.S. Publication No. 2015/0263183 A1) discloses solar cell interconnect system. Paulson et al. (U.S. Patent No. 8,697,980 B2) discloses solar cell interconnect system Hachtmann et al. (U.S. Publication No. 2007/0283997 A1) discloses a solar cell interconnect system Any inquiry concerning this communication or earlier communications from the examiner should be directed to JONATHAN HAN whose telephone number is (571)270-7546. The examiner can normally be reached 9.00-5.00PM PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, STEVEN LOKE can be reached at 571-272-1657. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JONATHAN HAN/Primary Examiner, Art Unit 2818
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Prosecution Timeline

Jul 21, 2024
Application Filed
Jul 14, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Prosecution Projections

1-2
Expected OA Rounds
84%
Grant Probability
93%
With Interview (+9.6%)
2y 4m (~4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1274 resolved cases by this examiner. Grant probability derived from career allowance rate.

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