Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Detailed Action
This office action is in response to applicant’s communications filed on 05/31/24. Claims 1-20 are pending in this application.
Information Disclosure Statements
The Information Disclosure Statement filed on 03/25/25 has been received and is being considered.
Claim Rejections Under 35 U.S.C. §112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Where applicant acts as his or her own lexicographer to specifically define a term of a claim contrary to its ordinary meaning, the written description must clearly redefine the claim term and set forth the uncommon definition so as to put one reasonably skilled in the art on notice that the applicant intended to so redefine that claim term. Process Control Corp. v. HydReclaim Corp., 190 F.3d 1350, 1357, 52 USPQ2d 1029, 1033 (Fed. Cir. 1999). The term “msec” in claims 4, 8 is used by the claim to mean “microsecond,” while the accepted meaning is undefined. The term is indefinite because the specification does not clearly redefine the term. Appropriate correction is required.
Claim Rejections Under 35 U.S.C. §103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-12 are rejected under 35 U.S.C. §103 as being unpatentable over Florez (US 20230166529 A1) and further in view of Scanlan (US 20160172306 A1).
Regarding claim 1, Florez discloses a method of forming an integrated circuit, comprising:
forming an alphanumeric character having a plurality of linear segments on a surface (see fig 1)comprising, or fixed relative to, a second side of the surface opposite the first side,
wherein each linear segment in the plurality of linear segments has a start point and an end point (see figs 4 and 5 disclosing start and end points),
the forming an alphanumeric character comprising controlling a tip of a laser to point to a series of laser pulse target positions along a path of the surface while enabling the laser to selectively apply light pulses to form a surface depression corresponding to each light pulse and along at least a portion of the path (see para [0019] and figs 4 and 5 disclosing pulsed laser beams),
the path traversing from a first linear segment of the plurality of linear segments to a final linear segment of the plurality of linear segments ( see fig 5 disclosing linear path),
without any segment of the plurality of segments having a start point overlapping a start point of a previously-formed segment (see fig 5 disclosing overlap).
However, Florez does not explicitly disclose forming circuitry relative to a first side of a surface; and the surface is a first side of a semiconductor device. However, Scanlan, at least at figs 3a-3f discloses laser engraving on a top surface of a semiconductor device having circuitry, see e.g. fig 3f. Florez and Scanlan are in the same or similar fields of endeavor. It would have been obvious to combine Florez with Scanlan. Florez and Scanlan may be combined by forming the etch of Florez on a semiconductor device, as taught in Scanlan. One having ordinary skill in the art would be motivated to combine Florez and Scanlan in order to mark semiconductor dies, see Scanlan at least at para [0086].
Regarding claim 2, Florez and Scanlan disclose the method of claim 1, wherein the forming an alphanumeric character occurs without any segment of the plurality of segments having an end point overlapping a start point of a previously-formed segment (see fig 5 disclosing overlap).
Regarding claim 3, Florez and Scanlan disclose the method of claim 1, wherein the forming an alphanumeric character further comprises: communicating an on-signal to the laser, in response to which and after an on-delay (see para [0071] disclosing on/off delays), the laser emits light pulses at a plurality of the laser pulse target positions (see figs 4 and 5 disclosing laser positions); and communicating an off-signal to the laser, in response to which and after an off-delay, the laser stops emitting light, to conclude formation of a linear segment (see para [0071] and figs 4 and 5).
Regarding claim 4, Florez and Scanlan disclose the method of claim 3: and Florez further discloses wherein the on-delay is at least 70 msec; and wherein the off-delay is at least 95 msec (see para [0018] disclosing on/off delays).
Regarding claim 5, Florez and Scanlan disclose the method of claim 1, wherein the laser tip translates relative to the surface at a same rate while the laser is enabled (see paras [0043] and [0068] disclose moving target and laser).
Regarding claim 6, Florez and Scanlan disclose the method of claim 5, wherein the laser tip translates relative to the surface at a different rate while the laser is disabled(see para [0018] disclosing on/off delays) and(see paras [0043] and [0068] disclose moving target and laser).
Regarding claim 7, Florez discloses a method of forming an integrated circuit, comprising:
selecting an alphanumeric character from a parameter set characterizing a plurality of alphanumeric characters, each alphanumeric character in the parameter set having a start point (see figs 4 and 5 disclosing start and end points), an end point, and
a plurality of segments between the start point and the end point(see figs 4 and 5 disclosing start and end points, with segments in between); and
forming the selected alphanumeric character on a surface comprising, or fixed relative to, a second side of the semiconductor layer opposite the first side (see figs 4 and 5 disclosing forming characters), comprising the steps of:
controlling a tip of a laser to advance along a series of laser target positions along a path from the start point to the end point (see figs 4 and 5 where laser is positioned from one to the next);
enabling laser pulses from the laser after the tip of the laser begins to advance (see figs 4 and 5 disclosing pulsed progression); and
disabling laser pulses from the laser before the tip of the laser reaches a position to point to the end point(see figs 4 and 5 disclosing pulsed progression and end point); and
wherein the controlling step controls the tip of the laser to prevent the tip from pointing to a position along the path in which a prior pulse has occurred in forming the selected alphanumeric character (see fig 4 disclosing spacing where characters do not overlap).
However, Florez does not explicitly disclose forming circuitry over or extending into to a first side of a semiconductor layer. However, Scanlan, at least at figs 3a-3f discloses laser engraving on a top surface of a semiconductor device having circuitry, see e.g. fig 3f. Florez and Scanlan are in the same or similar fields of endeavor. It would have been obvious to combine Florez with Scanlan. Florez and Scanlan may be combined by forming the etch of Florez on a semiconductor device, as taught in Scanlan. One having ordinary skill in the art would be motivated to combine Florez and Scanlan in order to mark semiconductor dies, see Scanlan at least at para [0086].
Regarding claim 8, Florez and Scanlan disclose the method of claim 7 wherein the enabling step occurs at least 70 msec after the tip of the laser begins to advance (see para [0018] disclosing on/off delays) and(see paras [0043] and [0068] disclose moving target and laser).
Regarding claim 9, Florez and Scanlan disclose the method of claim 7 wherein the disabling step occurs at least 95 msec laser before the tip of the laser reaches a position to point to the end point(see para [0018] disclosing on/off delays) and(see paras [0043] and [0068] disclose moving target and laser).
Regarding claim 10, Florez and Scanlan disclose the method of claim 7: wherein the enabling step occurs at least 70 msec after the tip of the laser begins to advance; and wherein the disabling step occurs at least 95 msec laser before the tip of the laser reaches a position to point to the end point(see para [0018] disclosing on/off delays) and(see paras [0043] and [0068] disclose moving target and laser). This office action notes that variations in timing is obvious to one having ordinary skill in the art at a time prior to the effective filing time of the present application.
Regarding claim 11, Florez and Scanlan disclose the method of claim 7, wherein the plurality of segments each comprises a plurality of line segments, and wherein the forming step further comprises disabling the laser from pulsing while controlling the tip to advance along an entirety of a line segment in the plurality of line segments(see para [0018] disclosing on/off delays) and(see paras [0043] and [0068] disclose moving target and laser). This office action notes that figs 4 and 5 disclosing pulsing along a pattern.
Regarding claim 12, Florez and Scanlan disclose the method of claim 7, wherein the enabling step comprises enabling a series of laser pulses to form corresponding surface depressions on the surface, wherein no two pulses in the formation of the alphanumeric character overlap the surface so as to form corresponding surface depressions that overlap in area by 25 percent or more (see figs 4 and 5 disclosing overlap of about 1/4).
Claims 13- are rejected under 35 U.S.C. §103 as being unpatentable over Florez (US 20230166529 A1) and Scanlan (US 20160172306 A1) and further in view of Gu (US 7705268 B2).
Regarding claim 13, Florez discloses an integrated circuit (IC), comprising:
a plurality of alphanumeric characters formed relative to a side of a surface (see fig 4 and 5 disclosing characters), wherein
each character in the plurality of alphanumeric characters comprises a plurality of surface depressions along a path defining the character
However, Florez does not disclose wherein each surface depression is 2.5 µm or less. However, Gu is directed towards surface etching and at least at (claim 1 and col 4, ln 35-40 disclose 1um).
However, Florez does not explicitly disclose circuitry positioned relative to a first side of a semiconductor layer. However, Scanlan, at least at figs 3a-3f discloses laser engraving on a top surface of a semiconductor device having circuitry, see e.g. fig 3f. Florez, Scanlan and Gu are in the same or similar fields of endeavor. It would have been obvious to combine Florez with Scanlan. Florez and Scanlan may be combined by forming the etch of Florez on a semiconductor device, as taught in Scanlan. One having ordinary skill in the art would be motivated to combine Florez and Scanlan in order to mark semiconductor dies, see Scanlan at least at para [0086]. Florez, Scanlan and Gu may be combined by forming the etch of Florez and Scanlon to an etch depth, as taught in Scanlan. One having ordinary skill in the art would be motivated to combine Florez and Scanlan and Gu in order to mark semiconductor dies, see Gu at least at description.
Regarding claim 14, Florez, Scanlon and Gu disclose the IC of claim 13 wherein each character in the plurality of alphanumeric characters comprises a plurality of lines, each line comprising a plurality of the surface depressions (see figs 4 and 5 disclosing depressions along lines).
Regarding claim 15, Flores, Scanlon and Gu disclose the IC of claim 13 wherein each of the plurality of the surface depressions comprises a circular outer boundary (see figs 4 and 5 disclosing circular boundaries).
Regarding claim 16, Florez, Scanlon and Gu disclose the IC of claim 15 wherein each of the plurality of surface depressions overlaps at least one neighboring surface depression in an area of overlapping range from 30 to 70 percent (see para [0070] disclosing overlap of .45).
Regarding claim 17, Florez, Scanlon and Gu disclose the IC of claim 15 wherein each of the plurality of surface depressions overlaps at least one neighboring surface depression in an overlapping area of no more than 70 percent (see para [0070] disclosing overlap of no greater than .45).
Regarding claim 18, Florez, Scanlon and Gu disclose the IC of claim 13, wherein each character in the plurality of alphanumeric characters comprises a plurality of piecewise linear markings, each piecewise linear marking intersecting only at one or both ends with a respective different piecewise linear marking in the plurality of piecewise linear markings (see figs 4 and 5 disclosing piecewise linear patterns, wherein each circular pattern connects linearly with the next).
Regarding claim 19, Florez, Scanlon and Gu disclose the IC of claim 13, wherein each character in the plurality of alphanumeric characters comprises a plurality of piecewise linear markings, wherein at least one piecewise linear marking passes through a gap between endpoints of two other piecewise linear markings in the plurality of piecewise linear markings(see figs 4 and 5 disclosing piecewise linear patterns, wherein each circular pattern connects linearly with the next, disclosing also connecting endpoints).
Regarding claim 20, Florez, Scanlon and Gu disclose the IC of claim 13, wherein none of the surface depressions overlaps another surface depression by more than 70%(see para [0070] disclosing overlap of no greater than .45).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to EDWARD CHIN whose telephone number is (571)270-1827. The examiner can normally be reached M-F 9AM-5PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached at (571) 270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/EDWARD CHIN/Primary Examiner, Art Unit 2893
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