Prosecution Insights
Last updated: July 17, 2026
Application No. 18/732,147

Optical Sensor Integration

Non-Final OA §103
Filed
Jun 03, 2024
Priority
Jun 12, 2023 — provisional 63/472,352
Examiner
BERRY, PAUL ANTHONY
Art Unit
Tech Center
Assignee
Artilux Inc.
OA Round
1 (Non-Final)
88%
Grant Probability
Favorable
1-2
OA Rounds
1y 2m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
35 granted / 40 resolved
+27.5% vs TC avg
Minimal -4% lift
Without
With
+-3.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 4m
Avg Prosecution
29 currently pending
Career history
90
Total Applications
across all art units

Statute-Specific Performance

§103
92.3%
+52.3% vs TC avg
§102
3.2%
-36.8% vs TC avg
§112
4.5%
-35.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 40 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 5-8, 10-15 and 18-20 are rejected under 35 U.S.C. 103 as being unpatentable over Agranov et al. (US 2020/0412980 A1, hereinafter Agranov ‘980) in view of Hsieh et al. (US 2022/0155504 A1, hereinafter Hsieh ‘504), in view of the following arguments. With respect to Claim 1 Agranov ‘980 discloses a method for manufacturing one or more optical sensor packages (Fig 1-15B), comprising: forming a bonded wafer (1506/1502/1408/1410 of process 1500, Fig 15A, Para [0068 and 0185] disclose a wafer to wafer bonding process, hereinafter BW) by bonding (i) a device wafer (1502, Fig 15A, Para [0186], hereinafter DW) comprising a plurality of optical sensing pixels (1506, Fig 15A, Para [0186]) and (ii) a circuit wafer (1408/1410, Fig 15A, Para [0182], hereinafter CW) comprising application-specific-integrated-circuit (Para [0182] discloses 1410 as a pixel processing logic wafer) configured to operate the optical sensing pixels (Para [0182] discloses 1410 as a pixel processing logic wafer), wherein the bonded wafer (BW) includes a device-wafer surface (top surface of device wafer DW (1502) Fig 15A, hereinafter DWS) and a circuit-wafer surface (bottom surface of circuit wafer CW (1408/1410) shown in Fig, hereinafter CWS); forming (process details for BSI sensor 1506 shown in Fig 2 per Para [0068], microlens array 206 corresponds to microlens array of 1506) a plurality of microlens arrays (206, Fig 2, Para [0066]) over the device-wafer surface (top of 210 as shown in Fig 2), wherein each microlens of the microlens arrays (microlenses of 206) corresponds to a particular optical sensing pixel (Para [0066] discloses a separate microlens over each pixel); forming electrical contacts (1512/1514/1516, Fig 15B, Para [0187]) to establish electrical connections (Para [0187] discloses 1512/1514/1516 electrically connect radiation sensors to logic wafer 1410 (note, Para [0186] discloses Fig 15B is a modification of 14A and is described with reference to 14A, therefore 15A and 15B identifies logic wafer 1410 as 1510, Para [0187] identifies logic wafer 1410)) to the plurality of optical sensing pixels (1506) and the application-specific-integrated-circuit (logic wafer 1410). However, Agranov ‘980 fails to explicitly discloses forming a plurality of module-lens structures over the plurality of microlens arrays, wherein each module-lens structure corresponds to a particular microlens array of the plurality of microlens arrays; and Nevertheless, in a related endeavor (Fig 1-3 of Hsieh ‘504), Hsieh ‘504 teaches forming a plurality of module-lens structures (plurality of 16, Fig 3 of Hsieh ‘504, Para [0049]) over the plurality of microlens arrays (plurality of 24, Fig 3 of Hsieh ‘504, Para [0050]), wherein each module-lens structure (16) corresponds to a particular microlens array (Para [0049] discloses optical structure 10 contains structures 16 and a sensor (12) which contain a microlens array of 24 as shown in Fig 3 of Hsieh ‘504, therefore the structures 16 structure 10 correspond to the particular microlens array of structure 10) of the plurality of microlens arrays (plurality of 24). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Hsieh ‘504’s teaching of forming a plurality of module-lens structures over the plurality of microlens arrays, wherein each module-lens structure corresponds to a particular microlens array of the plurality of microlens arrays into Agranov ‘980’s method. Agranov ‘980 discloses a method for forming an optical sensing package comprising a bonded wafer of a sensing wafer and a circuit wafer that has a plurality of array of microlens and electrical connections. Agranov ‘980 also is open to the formed devices are used in camera applications in Para [0202] and Fig 18. Hsieh ‘504 teaches method to incorporate an optical image sensor into end application for a camera. The ordinary artisan would have been motivated to modify Agranov ‘980 in the manner set forth above, at least, because, as Hsieh ‘504 teaches in Para [0013], using the taught lens structures in conjunction with an optical lens sensor can reduce the overall height of the device package. As incorporated, the teaching of Hsieh ‘504 of a plurality of module-lens structures (16) over the plurality of microlens arrays (plurality of 24), wherein each module-lens structure (16) corresponds to a particular microlens array (24) of the plurality of microlens arrays (plurality of 24) would be used in the method of Agranov ‘980 such that module lens structures (16 of Hsieh ‘504) would correspond to a particular microlens array (206) of Agranov ‘980. With respect to Claim 2 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Agranov ‘980 further discloses wherein forming the plurality of microlens arrays (206) over the device-wafer surface (top of 210 as shown in Fig 2) further comprises polishing the device-wafer surface (device wafer surface DWS described above) to a predetermined thickness before forming the plurality of microlens arrays (206)(Para [0186] discloses thinning layer 1502 prior to forming microlens array of 1506). With respect to Claim 3 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Agranov ‘980 discloses further wherein the plurality of microlens arrays (206) include a first spacer structure (208, Fig 2, Para [0066]) and a microlens surface (bottom surface of 206 as shown in Fig 2), wherein the first spacer structure (208) is formed between the device-wafer surface (top of 210 as shown in Fig 2 which is analogous to device wafer surface DWS when microlens array is assembled in process of Fig 15A) and the microlens surface (bottom surface of 206 as shown in Fig 2). With respect to Claim 5 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Agranov ‘980 as modified by Hsieh ‘504 further teaches wherein the plurality of module-lens structures (plurality of 16 of Agranov ‘980 as modified by Hsieh ‘504 as described above) include a module-lens surface (bottom of 16 as shown in Fig 3 of Hsieh ‘504) And Hsieh ‘504 further teaches a second spacer structure (42, Fig 3 of Hsieh ‘504, Para [0056]) formed between the device-wafer surface (top of 18 as shown in Fig 3 of Hsieh ‘504) and the module-lens surface (bottom of 16 as shown in Fig 3 of Hsieh ‘504), and wherein a thickness of the second spacer structure (42) corresponds to a focal length associated with the module-lens surface (bottom of 16 as shown in Fig 3 of Hsieh ‘504)(Para [0056] discloses that the thickness of 42 is set considering the path and distance of the incident light, therefore the thickness corresponds to the focal length). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Hsieh ‘504’s further teaching of a second spacer structure formed between the device-wafer surface and the module-lens surface, and wherein a thickness of the second spacer structure corresponds to a focal length associated with the module-lens surface into Agranov ‘980 as modified by Hsieh ‘504’s method. The ordinary artisan would have been motivated to further modify Agranov ‘980 in the manner set forth above, at least, because, as Hsieh ‘504 teaches in Para [0056], using the second spacer can help reduce the refractive index underneath the micro lens which one of ordinary skill in the art will recognize can help to direct light to the senor region. As incorporated, the further teaching of Hsieh ‘504 of a second spacer structure (42) formed between the device-wafer surface and the module-lens surface, and wherein a thickness of the second spacer structure corresponds to a focal length associated with the module-lens surface would be used in the method to create the module of Agranov ‘980 as modified by Hsieh ‘504. With respect to Claim 6 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 5, and Hsieh ‘504 further discloses wherein forming the plurality of module-lens structures (16) further comprises forming a band pass filter (14, Fig 3 of Hsieh ‘504, Para [0049]) (i) over the module-lens surface or (ii) between the second spacer structure (42) and the module-lens surface (bottom of 16 as shown in Fig 3 of Hsieh ‘504)(Fig 3 of Hsieh ‘504 discloses 14 is between bottom of 16 and spacer 42). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Hsieh ‘504’s further teaching of wherein forming the plurality of module-lens structures further comprises forming a band pass filter between the second spacer structure and the module-lens surface into Agranov ‘980 as modified by Hsieh ‘504’s method. The ordinary artisan would have been motivated to modify Agranov ‘980 as modified by Hsieh ‘504 in the manner set forth above, at least, because as Hsieh ‘504 teaches in Para [0013], the use of a bandpass filter enables the overall height of the module to be reduced thereby enabling the module to use less vertical real estate in the end device. As incorporated, the method of forming a bandpass filter (14) between the second spacer (42) and module lens surface (16) further taught by Hsieh ‘504 would be used in the method of Agranov ‘980 as modified by Hsieh ‘504 to form a module-lens structure. With respect to Claim 7 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 5, but Agranov ‘980 as modified by Hsieh ‘504 does not explicitly disclose wherein the thickness of the second spacer structure ranges from 100µm to 3000µm. However, the examiner notes that in the applicants disclosure teaches wherein the recited second spacer structure thickness has the advantage of corresponding to a focal length associated with the module-lens surface. Having this mind, Hsieh ‘504 teaches in Para [0056] “considering the path and distance of the incident light, the low-refractive-index material layer 42 (second space structure as described above) with an appropriate thickness is utilized. Therefore, it would have been obvious to a person of ordinary skill in the art to arrive at the recited limitation of the second spacer structure through routine optimization, to obtain the well-known advantage of having a thickness corresponding to a focal length associated with the module-lens surface. See MPEP§2144.05 (II)(A),(B). With respect to Claim 8 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 5, and Agranov ‘980 as modified by Hsieh ‘504 further discloses wherein each of the plurality of module-lens structures (each of 16) comprise a curved lens or a metalens (Para [0063] of Hsieh ‘504 discloses 16 as metalenses). With respect to Claim 10 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Hsieh ‘504 further discloses wherein forming the plurality of module-lens structures (plurality of 16) over the plurality of microlens arrays (plurality of arrays 24) further comprises arranging a module lens structure (16) of the plurality of module-lens structures (plurality of 16) in a housing (45, Fig 3 of Hsieh ‘504, Para [0059]), and bonding the housing (45) to the bonded wafer (12/18/36, Fig 3 of Hsieh ‘504, Para [0059]). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Hsieh ‘504’s further teaching of wherein forming the plurality of module-lens structures over the plurality of microlens arrays further comprises arranging a module lens structure of the plurality of module-lens structures in a housing, and bonding the housing to the bonded wafer into Agranov ‘980 as modified by Hsieh ‘504’s method. The ordinary artisan would have been motivated to further modify Agranov ‘980 as modified by Hsieh ‘504 in the manner set forth above, at least, because, as one of ordinary skill in the art would recognize, arranging the module lens structure in a housing would provide mechanical protection to the device and would further recognize bonding that structure to a bonded wafer would enable additional connection and functionality of the module lens structure. As incorporated, the further teaching of Hsieh ‘504 of forming the plurality of module-lens structures (plurality of 16) over the plurality of microlens arrays (plurality of arrays 24) further comprises arranging a module lens structure (16) of the plurality of module-lens structures (plurality of 16) in a housing (45), and bonding the housing to the bonded wafer (12/18/36) would be used to further complete the method of Agranov ‘980 as modified by Hsieh ‘504. With respect to Claim 11 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Agranov ‘980 as modified by Hsieh ‘504 further discloses wherein forming the plurality of module-lens structures (plurality of 16 of Hsieh ‘504 as incorporated in Agranov ‘980 as described above) over the plurality of microlens arrays (plurality of 24) further comprises bonding (disclosed in Para [0056 and 0057] of Hsieh ‘504) a module lens structure (16 of Hsieh ‘504 as incorporated in Agranov ‘980 as described above, Fig 3 of Hsieh ‘504, Para [0049]) of the plurality of module-lens structures (plurality of 16 of Hsieh ‘504 as incorporated in Agranov ‘980 as described above) to the bonded wafer (BW) and Hsieh ‘504 further teaches using one or more layers of spacer materials (44/42, Fig 3 of Hsieh ‘504, Para [0056 and 0057]) including one or more of polymer or oxide (Para [0057] discloses 44 as polymer). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Hsieh ‘504’s further teaching of one or more layers of spacer materials including one or more of polymer into Agranov ‘980 as modified by Hsieh ‘504’s method. The ordinary artisan would have been motivated to further modify Agranov ‘980 as modified by Hsieh ‘504 in the manner set forth above, at least, because using a polymer material in the spacer layer, as one of ordinary skill in the art would recognize, is a well-known process and material to provide mechanical and environmental protection to the device structure. As incorporated, teaching of Hsieh ‘504 of using a polymer material as a spacer material would be used as the material of layer (44) in the method of Agranov ‘980 as modified by Hsieh ‘504. With respect to Claim 12 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Agranov ‘980 discloses further wherein forming (disclosed in Para [0187]) the electrical contacts (1512/1514/1516) further comprises forming the electrical contacts (1512/1514/1516) over the circuit-wafer surface (CWS)(Fig 15B discloses 1512/1514/1516 over CWS). With respect to Claim 13 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Agranov ‘980 further discloses wherein forming (disclosed in Para [0187]) the electrical contacts (1512/1514/1516) further comprises forming the electrical contacts (1512/1514/1516) over the device-wafer surface (DWS). With respect to Claim 14 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Agranov ‘980 discloses further wherein forming the electrical contacts (disclosed in Para [0187]) further comprises: forming through-silicon-vias (TSV) (1512a/1512b/1514a/1514b, Fig 15B, Para [0187]) in the circuit wafer (CW)(Fig 15B discloses 1512/1514 through CW) or the device wafer; and forming electrical bond pads (bond pads 1512/1514) over the through-silicon-vias (1512b/1514b)(bond pads 1512/1514 over 1512a/1512b/1514a/1514b disclosed in Fig 15B). With respect to Claim 15 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitation of the method of claim 1, and Agranov ‘980 discloses further wherein forming the electrical contacts (disclosed in Para [0187]) further comprises polishing the circuit wafer (CW) to a predetermined thickness prior to forming the electrical contacts (1512/1514/1516)(Para [0187] discloses 1512/1514/1516 formed after thinning of 1408/1410 (CW)). With respect to Claim 18 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Hsieh ‘504 discloses further comprising forming wire bonds (38, Fig 3 of Hsieh ‘504, Para [0059]) between the electrical contacts (contacts of 12, Para [0059] of Hsieh ‘504 discloses 38 connected to 12) and a package substrate (36, Fig 3 of Hsieh ‘504, Para [0059]). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Hsieh ‘504’s further teaching of forming wire bonds between the electrical contacts and a package substrate into Agranov ‘980 as modified by Hsieh ‘504’s method. The ordinary artisan would have been motivated to modify Agranov ‘980 as modified by Hsieh ‘504 in the manner set forth above, at least, because wiring bonding a device to a circuit board is a well-known method, with a high expectation of success, to connect a device to a substrate, which in this case would enable the optical sensor to be connected to an end device. As incorporated, the teaching of the wire bonds (38) between the electrical contacts (contacts of 12) and a substrate (36) as taught by Hsieh ‘504 would be used as further method steps in the method of Agranov ‘980 as modified by Hsieh ‘504. With respect to Claim 19 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 18, and Agranov ‘980 as modified by Hsieh ‘504 discloses further wherein the package substrate (36 of Hsieh ‘504 as incorporated in Agranov ‘980 as described above) comprises a printed circuit board or a silicon substrate (Para [0059] of Hsieh ‘504 discloses 36 as a printed circuit board). With respect to Claim 20 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, and Agranov ‘980 further discloses wherein the device wafer (DW) and the circuit wafer (CW) comprise silicon (Para [0182] discloses 1402 (DW) and 1408 (CW) as silicon), And in a separate embodiment (Fig 16A-16B of Agranov ‘980) Agranov ‘980 teaches and wherein the plurality of optical sensing pixels (1602, Fig 16A, Para [0189]) comprise germanium (Para [0189] of Agranov ‘980 discloses photosensitive material of device wafer 1604 is SiGe). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Agranov ‘980’s further teaching of the plurality of optical sensing pixels comprise germanium into Agranov ‘980 as modified by Hsieh ‘504’s method. Agranov ‘980 in Para [0085] discloses the pixel array as silicon-based. The ordinary artisan would have been motivated to modify Agranov ‘980 as modified by Hsieh ‘504 in the manner set forth above, at least, because as Agranov ‘980 teaches in Para [0189] using SiGe in the optical sensing pixels enables the pixels to be used in an IR sensor thereby expanding the potential end applications for the module. As incorporated, the further teaching of plurality of optical sensing pixels comprise germanium bonding interface of Agranov ‘980 would be used as the material of the optical sensing pixels (1506) of Agranov ‘980 as modified by Hsieh ‘504. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Agranov ‘980 in view of Hsieh ‘504 in further view of Negoro et al. (US 2023/0396899 A1, hereinafter Negoro ‘899) in view of the following arguments. With respect to Claim 4 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, but Agranov ‘980 as modified by Hsieh ‘504 fails to explicitly disclose wherein the plurality of microlens arrays comprise polymer materials or one or more layers of metalens. Nevertheless, in a related endeavor (Fig 1 of Negoro ‘899), Negoro ‘899 teaches wherein the plurality of microlens arrays (255, Fig 1 of Negoro ‘899, Para [0246]) comprise polymer materials or one or more layers of metalens (Para [0246] of Negoro ‘899 discloses 255 formed of a resin). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Negoro ‘899’s teaching of wherein the plurality of microlens arrays comprise polymer materials into Agranov ‘980 as modified by Hsieh ‘504’s method. Agranov ‘980 as modified by Hsieh ‘504 discloses a method for forming an optical sensing package comprising a bonded wafer of a sensing wafer and a circuit wafer that has a plurality of array of microlens and electrical connections, but Agranov ‘980 does not explicitly disclose the material the microlens is formed from. Negoro ‘899 teaches an imaging device with a microlens array and teaches that microlens array formed as a polymer material. The ordinary artisan would have been motivated to modify Agranov ‘980 as modified by Hsieh ‘504 in the manner set forth above, at least, because as Negoro ‘899 teaches in Para [0246] using a microlens array formed from a polymer resin creates a microlens with a high light transmitting property with respect to light with an intended wavelength. As incorporated, the method of using a polymer resin used to make a microlens taught by Negoro ‘899 would be used to form the microlens (206) of Agranov ‘980 as modified by Hsieh ‘504. Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Agranov ‘980 in view of Hsieh ‘504 in further view of Yap et al. (US 11,251,209 B1, hereinafter Yap ‘209) in view of the following arguments. With respect to Claim 9 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 5, but Agranov ‘980 as modified by Hsieh ‘504 fails to explicitly disclose wherein the second spacer structure comprises a polymer material, a dielectric material, or silicon. Nevertheless, in a related endeavor (Fig 19 of Yap ‘209), Yap ‘209 teaches wherein the second spacer structure comprises a polymer material (Fig 19 and Col 14, Lines 41-48 of Yap ‘209 disclose a low refractive index layer 1946 comprises polymer). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Yap ‘209 teaching of wherein the second spacer structure comprises a polymer material into Agranov ‘980 as modified by Hsieh ‘504’s device. Agranov ‘980 as modified by Hsieh ‘504 discloses a method for forming an optical sensing package comprising a bonded wafer of a sensing wafer and a circuit wafer that has a plurality of array of microlens and electrical connections. Further, Agranov ‘980 as modified by Hsieh ‘504 is open to the material of the second spacer, it discloses it as a low refractive index material. Yap ‘209 teaches a method to create an optical sensor and specifically teaches a low refractive index material can be made of a polymer resin. The ordinary artisan would have been motivated to modify Agranov ‘980 as modified by Hsieh ‘504 in the manner set forth above, at least, because, as a person of ordinary skill in the art would recognize, depositing a resin polymer in a module can be an inexpensive and quick manufacturing process. As incorporated, the teaching of Yap ‘209 to use a polymer resin as the low refractive index second spacer would be used as the material of the second spacer (42) of Agranov ‘980 as modified by Hsieh ‘504. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Agranov ‘980 in view of Hsieh ‘504 in further view of Chiou et al. (US 2021/0273013 A1, hereinafter Chiou ‘013) in view of the following arguments. With respect to Claim 16 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, but Agranov ‘980 as modified by Hsieh ‘504 fails to explicitly disclose further comprises dicing the bonded wafer after forming the electrical contacts. Nevertheless, in a related endeavor (Fig 5-18 of Chiou ‘013), Chiou ‘013 teaches dicing (344, Fig 17 of Chiou ‘013, Para [0074]) the bonded wafer (100/200/3000, Fig 17 of Chiou ‘013, Para [0074]) after forming the electrical contacts (104/306/62, Fig 17 of Chiou ‘013, Para [0054])(electrical contacts formed in Fig 9 and dicing of wafer conducted in Fig 17). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Chiou ‘013’s teaching of dicing the bonded wafer after forming the electrical contacts into Agranov ‘980 as modified by Hsieh ‘504’s method. Agranov ‘980 as modified by Hsieh ‘504 discloses a method for forming an optical sensing package comprising a bonded wafer of a sensing wafer and a circuit wafer that has a plurality of array of microlens and electrical connections and then incorporating that package into a module lens structure package. The ordinary artisan would have been motivated to modify Agranov ‘980 as modified by Hsieh ‘504 in the manner set forth above, at least, because, a person of ordinary skill in the art would recognize, forming the electrical contacts in the devices at wafer level, that is prior to dicing, would enable a more efficient process as it will save manufacturing time forming a plurality of contacts across a wafer instead of forming electrical contacts on each device. As incorporated, the teaching of dicing the wafer after forming electrical connections as taught by Chiou ‘013 would be used in the method of Agranov ‘980 as modified by Hsieh ‘504. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Agranov ‘980 in view of Hsieh ‘504 in further view of Gang (US 2021/0066368 A1, hereinafter Gang ‘368) in view of the following arguments. With respect to Claim 17 Agranov ‘980 as modified by Hsieh ‘504 discloses all limitations of the method of claim 1, but Agranov ‘980 as modified by Hsieh ‘504 fails to explicitly disclose further comprises dicing the bonded wafer prior to forming the plurality of module-lens structures. Nevertheless, in a related endeavor (Fig 5A-5F of Gang ‘368), Gang ‘368 teaches further comprises dicing (cutting process disclosed in Para [0044] of Gang ‘368) the bonded wafer (10/30, Fig 5A and 5B of Gang ‘368, Para [0041]) prior to forming the plurality of module-lens structures (600, Fig 5F of Gang ‘368, Para [0049]). (dicing of wafer disclosed in Fig 5B of Gang ‘368, prior to formation of module lens structures 600 disclosed in Fig 5F of Gang ‘368). Therefore, it would have been obvious to one with ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Gang ‘368’s teaching of dicing the bonded wafer prior to forming the plurality of module-lens structures into Agranov ‘980 as modified by Hsieh ‘504’s method. Agranov ‘980 as modified by Hsieh ‘504 teaches a forming a plurality of optical sensors at a wafer level and teaches forming a module level lens structure with an individual sensor but Agranov ‘980 as modified by Hsieh ‘504 is silent on how the individual sensor was separated from the wafer. Gang ‘368 teaches forming an optical sensor on a wafer and further teaches cutting the wafer to form individual sensor for further packaging processes. The ordinary artisan would have been motivated to modify Gang ‘368 teaches in the manner set forth above, at least, because Gang ‘368 teaches a well-known method (dicing or cutting) for separating a plurality of sensors created at wafer level, so that they can be further packaged into one or more types of end optical sensor devices. As incorporated, the teaching of Gang ‘368 of dicing the bonded wafer prior to forming the plurality of module-lens structures would be used in the method of Agranov ‘980 as modified by Hsieh ‘504 so that (1506/1502/1408/1410) of Agranov ‘980 as modified by Hsieh ‘504 would be diced before forming the module lens structures (plurality of 16 of Hsieh ‘504 as incorporated above). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to PAUL A. BERRY whose telephone number is (703)756-5637. The examiner can normally be reached M-F 8-5 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PAUL A BERRY/Examiner, Art Unit 2898 /JULIO J MALDONADO/Supervisory Patent Examiner, Art Unit 2898
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Prosecution Timeline

Jun 03, 2024
Application Filed
Jul 10, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
88%
Grant Probability
84%
With Interview (-3.8%)
3y 4m (~1y 2m remaining)
Median Time to Grant
Low
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