DETAILED ACTION
Specification
The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed.
The following title is suggested: Semiconductor package having through-silicon via protruding into metal layer on leadframe die paddle
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-8 and 11-18 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2009/0278244 A1 (“Dunne”) in view of US 2014/0203412 A1 (“Wang”).
Dunne teaches, for example:
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Dunne teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention:
1. A semiconductor package (see e.g. 200 in Fig. 3 or 400 in Fig. 4), comprising:
a leadframe (e.g. 205) comprising a die pad (e.g. 206) and a plurality of lead terminals (e.g. 208 and 218) disposed along a perimeter of the die pad;
an integrated circuit (IC) die (e.g. 211) mounted on the die pad, the IC die comprising an active front surface (e.g. 212; see e.g. para 42) and a passive rear surface (e.g. 213) opposite to the active front surface,
wherein a plurality of input/output (I/O) pads (e.g. 243, see e.g. para 42; see also unlabeled pads connecting to wires 234) is disposed on the active front surface,
wherein the IC die comprises
a semiconductor substrate (e.g. 211),
at least one circuit block (see e.g. “… for integrated circuitry formed on active semiconductor surface 212”… in e.g. para 42) fabricated on the semiconductor substrate, and
at least one through substrate via (e.g. 110) extending beyond the passive rear surface (it extends below the bottom of 211 as shown in Figs. 2 and 4) and extending through a thickness of the semiconductor substrate (the TSVs extend completely through 211, as shown in Figs. 2 and 4);
a plurality of bond wires (e.g. 234 and/or 236) extending between the plurality of I/O pads and the plurality of lead terminals, respectively.
Dunne does not explicitly teach a molding compound encapsulating the IC die, the bond wires, and the leadframe. However, Dunne does disclose that “packaging material, such as a plastic encapsulant, is not shown” (para 42). One of ordinary skill in the art would understand the need for a packaging material and have found it obvious to form a packaging material to encapsulate the IC die, the bond wires, and the leadframe.
In any case, Wang explicitly teaches a molding compound (e.g. 18; see e.g. para 19, 50) encapsulating the IC die 2, the bond wires 16, and the leadframe 14 (see e.g. Fig. 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the invention of Wang to the invention of Dunne. The motivation to do so is that the combination produces the predictable results of forming a packaging material, made of molding compound, by a molding process (see e.g. para 50) such that it will protect the IC die and the bond wires.
It has been established that “the [obviousness] analysis need not seek out precise teachings directed to the specific subject matter of the challenged claim” because the Office or “a court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” KSR Int’ Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). It is also well settled that a reference stands for all of the specific teachings thereof as well as the inferences one of ordinary skill in the art would have reasonably been expected to draw therefrom. See In re Fritch, 972 F.2d 1260, 1264-65 (Fed. Cir. 1992).
Dunne and Wang together further teach and/or would have suggested as obvious at the time of invention to one of ordinary skill in the art:
2. The semiconductor package according to claim 1, wherein the at least one circuit block is a part of a CMOS (see e.g. Dunne, para 50) power amplifier (see e.g. Dunne, para 6-8).
3. The semiconductor package according to claim 2, wherein the IC die is mounted on the die pad by using a conductive adhesive layer (see e.g. Dunne, para 46).
4. The semiconductor package according to claim 3, wherein the at least one TSV comprises a protruding tip extending into the conductive adhesive layer, and wherein the at least one circuit block is electrically connected to the die pad through the at least one TSV (see e.g. Figs. 2 and 4 for the tip 216 extending into 200 or 222; because the TSV is conductive, and the metal layer is conductive, the circuit would electrically connect to the grounding enhancing layer, see e.g. para 39).
5. The semiconductor package according to claim 3, wherein the conductive adhesive layer comprises anisotropic conductive film, silver paste, or conductive die attach film (see e.g. para 40, 46, etc.).
6. The semiconductor package according to claim 1, wherein the at least one TSV comprises a conductive core layer and a liner layer around the conductive core layer (see e.g. Fig. 1A, wherein the “electrically conductive filler material 124 and the liner 125 are explicitly shown and labeled).
7. The semiconductor package according to claim 4, wherein the passive rear surface and the protruding tip is covered with a back-side metal layer (see e.g. Figs. 2 and 4).
8. The semiconductor package according to claim 1, wherein a bottom surface of the die pad is exposed from the molding compound (see e.g. Wang, Fig. 1).
Dunne teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention:
11. A method for forming a semiconductor package (see e.g. 200 in Fig. 3 or 400 in Fig. 4), comprising:
providing a leadframe (e.g. 205) comprising a die pad (e.g. 206) and a plurality of lead terminals (e.g. 208 and 218) disposed along a perimeter of the die pad;
mounting an integrated circuit (IC) die (e.g. 211) onto the die pad, the IC die comprising an active front surface (e.g. 212; see e.g. para 42) and a passive rear surface (e.g. 213) opposite to the active front surface,
wherein a plurality of input/output (I/O) pads (e.g. 243, see e.g. para 42; see also unlabeled pads connecting to wires 234) is disposed on the active front surface,
wherein the IC die comprises
a semiconductor substrate (e.g. 211),
at least one circuit block (see e.g. “… for integrated circuitry formed on active semiconductor surface 212”… in e.g. para 42) fabricated on the semiconductor substrate, and
at least one through substrate via (TSV) (e.g. 110) extending beyond the passive rear surface (it extends below the bottom of 211 as shown in Figs. 2 and 4) and extending through a thickness of the semiconductor substrate (the TSVs extend completely through 211, as shown in Figs. 2 and 4);
forming a plurality of bond wires (e.g. 234 and/or 236) extending between the plurality of I/O pads and the plurality of lead terminals, respectively.
Dunne does not explicitly teach forming a molding compound to encapsulate the IC die, the bond wires, and the leadframe. However, Dunne does disclose that “packaging material, such as a plastic encapsulant, is not shown” (para 42). One of ordinary skill in the art would understand the need for a packaging material and have found it obvious to form a packaging material to encapsulate the IC die, the bond wires, and the leadframe.
In any case, Wang explicitly teaches a molding compound (e.g. 18; see e.g. para 19, 50) encapsulating the IC die 2, the bond wires 16, and the leadframe 14 (see e.g. Fig. 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the invention of Wang to the invention of Dunne. The motivation to do so is that the combination produces the predictable results of forming a packaging material, made of molding compound, by a molding process (see e.g. para 50) such that it will protect the IC die and the bond wires.
It has been established that “the [obviousness] analysis need not seek out precise teachings directed to the specific subject matter of the challenged claim” because the Office or “a court can take account of the inferences and creative steps that a person of ordinary skill in the art would employ.” KSR Int’ Co. v. Teleflex Inc., 550 U.S. 398, 418 (2007). It is also well settled that a reference stands for all of the specific teachings thereof as well as the inferences one of ordinary skill in the art would have reasonably been expected to draw therefrom. See In re Fritch, 972 F.2d 1260, 1264-65 (Fed. Cir. 1992).
Dunne and Wang together further teach and/or would have suggested as obvious at the time of invention to one of ordinary skill in the art:
12. The method according to claim 11, wherein the at least one circuit block is a part of a CMOS (see e.g. Dunne, para 50) power amplifier (see e.g. Dunne, para 6-8).
13. The method according to claim 12, wherein the IC die is mounted on the die pad by using a conductive adhesive layer (see e.g. Dunne, para 46).
14. The method according to claim 13, wherein the at least one TSV comprises a protruding tip extending into the conductive adhesive layer, and wherein the at least one circuit block is electrically connected to the die pad through the at least one TSV (see e.g. Figs. 2 and 4 for the tip 216 extending into 200 or 222; because the TSV is conductive, and the metal layer is conductive, the circuit would electrically connect to the grounding enhancing layer, see e.g. para 39).
15. The method according to claim 13, wherein the conductive adhesive layer comprises anisotropic conductive film, silver paste, or conductive die attach film (see e.g. para 40, 46, etc.).
16. The method according to claim 11, wherein the at least one TSV comprises a conductive core layer and a liner layer around the conductive core layer (see e.g. Fig. 1A, wherein the “electrically conductive filler material 124 and the liner 125 are explicitly shown and labeled).
17. The method according to claim 14, wherein the passive rear surface and the protruding tip is covered with a back-side metal layer (see e.g. Figs. 2 and 4).
18. The method according to claim 11, wherein a bottom surface of the die pad is exposed from the molding compound (see e.g. Wang, Fig. 1).
Claim(s) 9 and 19 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2009/0278244 A1 (“Dunne”) in view of US 2014/0203412 A1 (“Wang”) and US 2020/0402893 A1 (“Chang”).
Dunne and Wang teach and/or would have suggested as obvious at the time of invention to one of ordinary skill in the art claims 1 and 11, as discussed above, but do not explicitly teach wherein the IC die is a WiFi chip.
Chang teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention, in combination with Dunne and Wang wherein the IC die is a WiFi chip (see e.g. para 50, 52).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the invention of Chang to the invention of Dunne and Wang. The motivation to do so is that the combination produces the predictable results of providing known functions (e.g. Wifi, Bluetooth, and/or memory) to the processing abilities of the chip (see e.g. para 50).
Claim(s) 10 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 2009/0278244 A1 (“Dunne”) in view of US 2014/0203412 A1 (“Wang”) and US 2022/0208665 A1 (“Dadvand”).
Dunne and Wang teach and/or would have suggested as obvious at the time of invention to one of ordinary skill in the art claims 1 and 11, as discussed above, but do not explicitly teach wherein the plurality of bond wires comprises gold wires or copper wires.
Dadvand teaches and/or would have suggested as obvious to one of ordinary skill in the art at the time of invention, in combination with Dunne and Wang wherein the plurality of bond wires comprises gold wires or copper wires (see e.g. para 7).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to add the invention of Dadvand to the invention of Dunne and Wang. The motivation to do so is that the combination produces the predictable results of using materials for the wires that are cheaper and have improved electrical performance (see e.g. para 7).
Applicant has not disclosed that the claimed material is for a particular unobvious purpose, produces an unexpected result, or is otherwise critical, which are criteria that have been held to be necessary for material limitations to be prima facie unobvious. The claimed material is considered to be a "preferred" or "optimum" material out of a plurality of well known materials that a person of ordinary skill in the art at the time the invention was made would have found obvious to provide to the invention of the cited prior art reference, using routine experimentation and optimization of the invention. In re Leshin, 125 USPQ 416 (CCPA 1960).
Conclusion
Conclusion / Prior Art
The prior art made of record, because it is considered pertinent to applicant's disclosure, but which is not relied upon specifically in the rejections above, is listed on the Notice of References Cited.
US 2009/0278245 A1 (“Bonifield”) teaches a package having TSVs extended beyond the chip (see e.g. cover figure).
Conclusion / Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kevin Parendo who can be contacted by phone at (571) 270-5030 or by direct fax at (571) 270-6030. The examiner can normally be reached Monday-Friday from 9 am to 4 pm ET.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Billy Kraig, can be reached at (571) 272-8660. The fax number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Kevin Parendo/Primary Examiner, Art Unit 2896
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