Prosecution Insights
Last updated: October 26, 2026
Application No. 18/732,958

VERTICAL CHANNEL TRANSISTORS HAVE ENHANCED SOURCE-TO-DRAIN CURRENT PATHS THEREIN

Non-Final OA §103§112
Filed
Jun 04, 2024
Priority
Jul 07, 2023 — RE 10-2023-0088624
Examiner
IMTIAZ, S M SOHEL
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
512 granted / 564 resolved
+30.8% vs TC avg
Moderate +7% lift
Without
With
+6.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
42 currently pending
Career history
603
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
61.9%
+21.9% vs TC avg
§102
17.2%
-22.8% vs TC avg
§112
19.0%
-21.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 564 resolved cases

Office Action

§103 §112
DETAILED ACTION This office action is in response to application filed on 06/04/2024. Currently claims 1-20 are pending in the application. Information Disclosure Statement The information disclosure statement (IDS) submitted on 06/04/2024 was filed before the mailing date of the office action. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement was considered by the examiner. Claim Objections Claim 2 is objected to because of the following informalities: Regarding Claim 2, in line 1, “extends lengthwise is a vertical direction” should read “extends lengthwise in a vertical direction.” Appropriate correction is required. Claim Rejections - 35 USC § 112 (b) The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 2-4, 12 and 20 are rejected under 35 U.S.C. 112 (b), as being indefinite for failing to particularly pointing out and distinctly claim the subject matter which the inventor or a joint inventor, regard as their invention. Regarding claim 3, the claim recites “the vertical direction.” There is insufficient antecedent basis for this limitation in the claim. Claim 3 depends from claim 1, which does not recite a vertical direction; “a vertical direction” is introduced only in claim 2, from which claim 3 does not depend. Claim 4 recites “the vertical direction” as well and inherits the deficiency of claim 3. For examination purposes, “the vertical direction” is interpreted as “a vertical direction relative to a surface of the substrate.” Regarding claims 2, 12, and 20, each claim requires that the first metal oxide comprise an “InxGayZnzO” material, where 0≤x<1, 0≤y<1, and 0≤z<1 (claim 20: x, y, z equal to or greater than 0 and less than 1). As written, the ranges permit x = y = z = 0, in which case the recited material contains no metal and is not a metal oxide, contradicting the requirement of the parent claims that the channel layer comprise a “first metal oxide.” Further, no relationship among x, y, and z (e.g., x+y+z) is defined, so the stoichiometric scope of the formula cannot be ascertained. The metes and bounds of the claims are therefore unclear. For examination purposes, the limitation is interpreted as an In-Ga-Zn oxide in which at least one of x, y, and z is greater than zero. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 1-3 and 5-9 under 35 U.S.C. 103 as being unpatentable over US 2022/0254896 A1 (Ramaswamy) and further in view of US 2018/0315858 A1 (Kobayashi). Regarding claim 1, Ramaswamy teaches, a vertical channel transistor (116; transistor; Figs. 1A-1B; [0030] – [0042]), comprising: a substrate (112; substrate) having a bit line thereon (118; first conductive material) (Fig. 1A-1B; [0032]); a channel layer (142, 144; channel material, channel region; Figs. 1A-1B; [0031]) comprising a first metal oxide, on the bit line (Ramaswamy’s channel material 142 of an oxide semiconductor (e.g., IGZO), extending vertically over the first conductive material 118); PNG media_image1.png 468 384 media_image1.png Greyscale PNG media_image2.png 454 514 media_image2.png Greyscale a lower insertion layer (source contact 102; Figs. 1A-1B; [0031]) extending between the bit line and a first end of the channel layer, and comprising a second metal oxide (Ramaswamy’s source contact 102, disposed on top of the first conductive material 118, and in contact with the bottom of channel material 142, and formed of indium tin oxide (ITO)); an upper source/drain region (150; drain region; Figs. 1A-1B; [0031]) electrically connected to a second end of the channel layer (Ramaswamy’s drain region 150 including drain contact 104 disposed on top of channel material 142); an insulated gate line (126; gate electrode; Figs. 1A-1B; [0036]) on the channel layer (Ramaswamy’s gate electrode 126, configured as an access line (word line), isolated from channel material 142 by second insulative material 140); But Ramaswamy does not explicitly teach, (i) the second metal oxide has a greater bonding energy relative to the first metal oxide, (ii) a lower source/drain region extending between the first end of the channel layer and the lower insertion layer, and comprising a first metal dopant that is a reduced form of the first metal oxide, (iii) the upper source/drain region comprising the first metal dopant. However, in analogous art, Kobayashi teaches, a metal oxide layer (150; metal oxide layer; Kobayashi Fig. 4A; [0072]) in contact with an oxide semiconductor layer (120; oxide semiconductor layer, IGZO; Kobayashi Fig. 4A; [0072], [0081]), wherein the metal oxide layer (150) includes, as a main component, an oxide of a second metal (Al, Ti, Mo, or W) whose bond dissociation energy with oxygen is higher than that of the first metal included in the oxide semiconductor layer (120) ([0092]). PNG media_image3.png 510 616 media_image3.png Greyscale Kobayashi further teaches that, upon contact and heat treatment (annealing at 200° C to 500° C), oxygen in the oxide semiconductor layer (120) is drawn out by the metal oxide layer (150), such that oxygen deficiencies are generated and the resistance is reduced in the source region (122; source region; Kobayashi Fig. 4A; [0146]) and the drain region (123; drain region; Kobayashi Fig. 4A; [0146]) of the oxide semiconductor layer (120) ([0145] – [0146]) in contact with the metal oxide layer (150), while the channel region (121; channel region; Kobayashi Fig. 4A; [0165]) remains of higher resistivity. The oxygen-deficient source/drain regions comprise the metal of the oxide semiconductor in a reduced (oxygen-depleted) form, i.e., a first metal dopant that is a reduced form of the first metal oxide. Applied the teaching to Ramaswamy, the lower end portion of channel material 142 in contact with source contact 102 becomes the claimed “lower source/drain region extending between the first end of the channel layer and the lower insertion layer,” and the upper end portion of channel material 142 under drain contact 104 becomes part of the claimed “upper source/drain region … comprising the first metal dopant.” Further, ITO, the material of Ramaswamy’s source contact 102, is itself one of the second metal oxides that applicant identifies as having the claimed greater bonding energy (claim 2); a material and its properties are inseparable (MPEP 2112.01(II)). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Ramaswamy and Kobayashi before him/her, to form the contact layer(s) of Ramaswamy that abut the IGZO channel of a metal oxide having a greater oxygen bonding energy than the channel oxide, and to thereby reduce the abutting end portion(s) of the channel into oxygen-deficient source/drain region(s), as taught by Kobayashi, (1) because doing so lowers the resistance of the source/drain portions of the oxide semiconductor adjacent the contacts and reduces contact resistance, which is the very problem Ramaswamy seeks to address at the contact/channel interface; (2) since the modification amounts to a simple substitution of one known contact-interface material and technique for another to obtain predictable results (MPEP 2143(I)(B)); and (3) with a reasonable expectation of success, yielding the predictable result of a vertical channel transistor having low-resistance source/drain regions at the end(s) of the vertical oxide channel. Absent this teaching in Ramaswamy, a person with ordinary skill in the art would be motivated to reach out to Kobayashi while forming the vertical transistor of Ramaswamy. Regarding claim 2, the combination of Ramaswamy and Kobayashi teaches, the transistor of claim 1, wherein the channel layer extends lengthwise [in] a vertical direction relative to a surface of the substrate (Ramaswamy’s channel region 144 extending from primary surface 114 of substrate 112 substantially vertically Figs. 1A-1B; [0031]); the first metal oxide comprises at least one InxGayZnzO material ([0031]), the second metal oxide is selected from among … indium tin oxide (Ramaswamy’s source contact 102, disposed on top of the first conductive material 118, and in contact with the bottom of channel material 142, and formed of indium tin oxide (ITO)); Regarding claim 3, the combination of Ramaswamy and Kobayashi teaches, the transistor of claim 1, wherein Ramaswamy teaches “the lower insertion layer comprises a first region overlapping the lower source/drain region in the vertical direction; and wherein the first region comprises the second metal oxide,” which is the portion of Ramaswamy’s ITO source contact 102 directly beneath the bottom end of channel material 142 ([0031]), which, as modified by Kobayashi, underlies the reduced lower source/drain region (122; source region; Kobayashi Fig. 4A; ([0145] – [0146]). Regarding claim 5, the combination of Ramaswamy and Kobayashi teaches, the transistor of claim 1, wherein Kobayashi teaches “the lower source/drain region includes oxygen vacancies therein,” which is Kobayashi’s source region 122 in which oxygen deficiencies are generated by the metal oxide layer 150 (122; source region; Kobayashi Fig. 4A; [0146]). Regarding claim 6, the combination of Ramaswamy and Kobayashi teaches, the transistor of claim 1, wherein Ramaswamy teaches the source contact 102 in contact with channel material 142 (102; source contact; Ramaswamy Figs. 1A–1B; [0031]), and Kobayashi teaches “the lower insertion layer contacts the lower source/drain region,” which is Kobayashi’s metal oxide layer 150 in contact with source region 122 (150; metal oxide layer; Kobayashi Fig. 4A; [0072]), (122; source region; Kobayashi Fig. 4A; [0146]). Regarding claim 7, the combination of Ramaswamy and Kobayashi teaches, the transistor of claim 1, wherein Ramaswamy teaches “an upper insertion layer, which extends on the upper source/drain region and comprises a third metal oxide,” which is Ramaswamy’s drain contact 104 disposed on top of channel material 142 and formed of ITO (104; drain contact; Ramaswamy Figs. 1A–1B; [0034]), and Kobayashi teaches the metal oxide layer “that has a greater bonding energy relative to the first metal oxide,” i.e., an oxide of a second metal having a higher bond dissociation energy with oxygen than the first metal of the oxide semiconductor, in contact with drain region 123 (150; metal oxide layer; Kobayashi Fig. 4A; [0072]), (123; drain region; Kobayashi Fig. 4A; [0146]). The motivation set forth for claim 1 applies equally to the upper contact. Regarding claim 8, the combination of Ramaswamy and Kobayashi teaches, the transistor of claim 7, wherein Kobayashi teaches “the upper source/drain region includes oxygen vacancies therein,” which is Kobayashi’s drain region 123 having oxygen deficiencies (123; drain region; Kobayashi Fig. 4A; [0146]). Regarding claim 9, the combination of Ramaswamy and Kobayashi teaches, the transistor of claim 7, wherein Ramaswamy teaches drain contact 104 disposed on top of and contacting channel material 142 (104; drain contact; Ramaswamy Figs. 1A-1B; [0034]), and Kobayashi teaches “the upper insertion layer is disposed in contact with the upper source/drain region,” which is Kobayashi’s metal oxide layer 150 in contact with drain region 123 (150; metal oxide layer; Kobayashi Fig. 4A; [0072]), (123; drain region; Kobayashi Fig. 4A; [0146]). Claims 11–17 under 35 U.S.C. 103 as being unpatentable over US 2022/0254896 A1 (Ramaswamy) and further in view of US 2018/0315858 A1 (Kobayashi). Regarding claim 11, Ramaswamy teaches, a semiconductor device (116; transistor; Figs. 1A-1B; [0030] – [0042]), comprising: a substrate (112; substrate; Fig. 1A-1B; [0032]); a bit line (118; first conductive material) extending in a first horizontal direction (from left to right on the visible plane) on the substrate (112) (Fig. 1A-1B; [0032]); PNG media_image1.png 468 384 media_image1.png Greyscale PNG media_image2.png 454 514 media_image2.png Greyscale a pair of gate lines (126; gate electrode; Figs. 1A-1B; [0036]) extending on the bit line (118) in a second horizontal direction (inside the plane) intersecting with the first horizontal direction and spaced apart from each other in the first horizontal direction (Ramaswamy’s dual-sided gate electrode 126 with electrodes provided along each of the opposing sidewalls of the channel, the gate electrode 126 being configured as an access line (word line) arranged perpendicular to the first conductive material 118; the electrodes on opposite sidewalls of the channel are thus spaced apart in the bit-line direction); a channel layer (142, 144; IGZO channel material, channel region; Figs. 1A-1B; [0031]) extending between the pair of gate lines (126) and in a vertical direction, and comprising a first metal oxide (IGZO); a gate insulation layer (140; second insulative material; Figs. 1A-1B; [0038]) extending between each of the pair of gate lines (126) and the channel layer (142/144), and extending in the vertical direction; an upper insertion layer (104; drain contact; Ramaswamy Figs. 1A-1B; [0034]) extending on the channel layer (142/144), and comprising a second metal oxide (formed of ITO); But Ramaswamy does not explicitly teach, (i) the second metal oxide has a greater bonding energy relative to the first metal oxide, (ii) an upper source/drain region extending between the channel layer and the upper insertion layer, and comprising a first metal dopant that is a reduced form of the first metal oxide, However, in analogous art, Kobayashi teaches, a metal oxide layer (150; metal oxide layer; Kobayashi Fig. 4A; [0072]) in contact with an oxide semiconductor layer (120; oxide semiconductor layer, IGZO; Kobayashi Fig. 4A; [0072], [0081]), wherein the metal oxide layer (150) includes, as a main component, an oxide of a second metal (Al, Ti, Mo, or W) whose bond dissociation energy with oxygen is higher than that of the first metal included in the oxide semiconductor layer (120) ([0092]). PNG media_image3.png 510 616 media_image3.png Greyscale Kobayashi further teaches that, upon contact and heat treatment (annealing at 200° C to 500° C), oxygen in the oxide semiconductor layer (120) is drawn out by the metal oxide layer (150), such that oxygen deficiencies are generated and the resistance is reduced in the source region (122; source region; Kobayashi Fig. 4A; [0146]) and the drain region (123; drain region; Kobayashi Fig. 4A; [0146]) of the oxide semiconductor layer (120) ([0145] – [0146]) in contact with the metal oxide layer (150), while the channel region (121; channel region; Kobayashi Fig. 4A; [0165]) remains of higher resistivity. The oxygen-deficient source/drain regions comprise the metal of the oxide semiconductor in a reduced (oxygen-depleted) form, i.e., a first metal dopant that is a reduced form of the first metal oxide. Applied the teaching to Ramaswamy, the lower end portion of channel material 142 in contact with source contact 102 becomes the claimed “lower source/drain region extending between the first end of the channel layer and the lower insertion layer,” and the upper end portion of channel material 142 under drain contact 104 becomes part of the claimed “upper source/drain region … comprising the first metal dopant.” Further, ITO, the material of Ramaswamy’s source contact 102, is itself one of the second metal oxides that applicant identifies as having the claimed greater bonding energy; a material and its properties are inseparable (MPEP 2112.01(II)). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Ramaswamy and Kobayashi before him/her, to form the contact layer(s) of Ramaswamy that abut the IGZO channel of a metal oxide having a greater oxygen bonding energy than the channel oxide, and to thereby reduce the abutting end portion(s) of the channel into oxygen-deficient source/drain region(s), as taught by Kobayashi, (1) because doing so lowers the resistance of the source/drain portions of the oxide semiconductor adjacent the contacts and reduces contact resistance, which is the very problem Ramaswamy seeks to address at the contact/channel interface; (2) since the modification amounts to a simple substitution of one known contact-interface material and technique for another to obtain predictable results (MPEP 2143(I)(B)); and (3) with a reasonable expectation of success, yielding the predictable result of a vertical channel transistor having low-resistance source/drain regions at the end(s) of the vertical oxide channel. Absent this teaching in Ramaswamy, a person with ordinary skill in the art would be motivated to reach out to Kobayashi while forming the vertical transistor of Ramaswamy. Regarding claim 12, the combination of Ramaswamy and Kobayashi teaches, the device of claim 11, the first metal oxide comprises at least one InxGayZnzO material, which is Ramaswamy’s IGZO channel material (142, 144; channel material, channel region; Ramaswamy Figs. 1A–1B; [0031]), and “the second metal oxide is selected from among … indium tin oxide … (Ramaswamy’s source contact 102, disposed on top of the first conductive material 118, and in contact with the bottom of channel material 142, and formed of indium tin oxide (ITO)). Regarding claim 13, the combination of Ramaswamy and Kobayashi teaches, the device of claim 11, “wherein the upper source/drain region has oxygen vacancies therein”, which is Kobayashi’s drain region 123 having oxygen deficiencies (123; drain region; Kobayashi Fig. 4A; [0146]). Regarding claim 14, the combination of Ramaswamy and Kobayashi teaches, the device of claim 11, wherein Ramaswamy teaches drain contact 104 on top of and contacting channel material 142 (104; drain contact; Ramaswamy Figs. 1A–1B; [0034]), and Kobayashi teaches “the upper insertion layer contacts the upper source/drain region,” which is Kobayashi’s metal oxide layer 150 in contact with drain region 123 (150; metal oxide layer; Kobayashi Fig. 4A; [0146]), (123; drain region; Kobayashi Fig. 4A; [0146]). Regarding claim 15, the combination of Ramaswamy and Kobayashi teaches, the device of claim 11, wherein Ramaswamy teaches source contact 102 at the bottom end of channel material 142 opposite drain contact 104 (102; source contact; Ramaswamy Figs. 1A–1B; [0031]), and Kobayashi teaches “a lower source/drain region spaced apart from the upper source/drain region with the channel layer extending therebetween, said lower source/drain region comprising the first metal dopant,” which is Kobayashi’s oxygen-deficient source region 122 spaced from drain region 123 by channel region 121 (122; source region; Kobayashi Fig. 4A; [0146]), (121; channel region; Kobayashi Fig. 4A; [0165]). As applied, the bottom end portion of Ramaswamy’s channel material 142 in contact with source contact 102 becomes the lower source/drain region. Regarding claim 16, the combination of Ramaswamy and Kobayashi teaches, the device of claim 15, wherein Ramaswamy teaches “a lower insertion layer extending between the lower source/drain region and the bit line, said lower insertion layer comprising a third metal oxide,” which is Ramaswamy’s ITO source contact 102 between first conductive material 118 and channel material 142 (102; source contact; Ramaswamy Figs. 1A–1B; [0031]), and Kobayashi teaches the metal oxide “having a greater bonding energy relative to the first metal oxide” (150; metal oxide layer; Kobayashi Fig. 4A; [0072]). Regarding claim 17, the combination of Ramaswamy and Kobayashi teaches, the device of claim 16, wherein Ramaswamy teaches source contact 102 contacting channel material 142 (102; source contact; Ramaswamy Figs. 1A–1B; [0031]), and Kobayashi teaches “the lower insertion layer contacts the lower source/drain region,” which is Kobayashi’s metal oxide layer 150 in contact with source region 122 (150; metal oxide layer; Kobayashi Fig. 4A; [0072]), (122; source region; Kobayashi Fig. 4A; [0146]). Claims 18–20 under 35 U.S.C. 103 as being unpatentable over US 2022/0254896 A1 (Ramaswamy) in view of US 2018/0315858 A1 (Kobayashi). Regarding claim 18, Ramaswamy teaches, a semiconductor device, comprising: PNG media_image1.png 468 384 media_image1.png Greyscale PNG media_image2.png 454 514 media_image2.png Greyscale a memory cell device (storage element; Figs. 1A-1B; [0030]); and a vertical transistor (116; transistor; Figs. 1A-1B; [0030]) electrically connected to the memory cell device; a substrate (112; substrate; (Fig. 1A-1B; [0032]); a bit line (118; first conductive material) extending in a first horizontal direction (from left to right on the visible plane) on the substrate (112) (Fig. 1A-1B; [0032]); a pair of gate lines (126; gate electrode; Figs. 1A-1B; [0036]) extending on the bit line (118) in a second horizontal direction (inside the plane) intersecting with the first horizontal direction and spaced apart from each other in the first horizontal direction (Ramaswamy’s dual-sided gate electrode 126 with electrodes provided along each of the opposing sidewalls of the channel, the gate electrode 126 being configured as an access line (word line) arranged perpendicular to the first conductive material 118; the electrodes on opposite sidewalls of the channel are thus spaced apart in the bit-line direction); a channel layer (142, 144; IGZO channel material, channel region; Figs. 1A-1B; [0031]) extending between the pair of gate lines (126) and in a vertical direction, and comprising a first metal oxide (IGZO); a gate insulation layer (140; second insulative material; Figs. 1A-1B; [0038]) extending between each of the pair of gate lines (126) and the channel layer (142/144), and extending in the vertical direction; a lower insertion layer (source contact 102; Figs. 1A-1B; [0031]) disposed between the bit line and the channel layer, extending in the first horizontal direction, and comprising a second metal oxide (Ramaswamy’s source contact 102, disposed on top of the first conductive material 118 and in contact with the bottom of channel material 142, and formed of indium tin oxide (ITO) an upper insertion layer (104; drain contact; Ramaswamy Figs. 1A-1B; [0034]) disposed on the upper source/drain region (150; drain region; Figs. 1A-1B; [0031]) … and comprising a third metal oxide (ITO; [0035]),” But Ramaswamy does not explicitly teach, a lower source/drain region disposed between the channel layer and the lower insertion layer, contacting the lower insertion layer, and comprising a first metal dopant that is a reduced form of the first metal oxide; an upper source/drain region spaced apart from the lower source/drain region with the channel layer therebetween and comprising the first metal dopant; the upper insertion layer contacting the upper source/drain region; the second metal oxide has greater bonding energy than the first metal oxide; the third metal oxide has greater bonding energy than the first metal oxide. However, in analogous art, Kobayashi teaches, a metal oxide layer (150; metal oxide layer; Kobayashi Fig. 4A; [0072]) in contact with an oxide semiconductor layer (IGZO), wherein the metal oxide layer (150) includes, as a main component, an oxide of a second metal (Al, Ti, Mo, or W) whose bond dissociation energy with oxygen is higher than that of the first metal included in the oxide semiconductor layer (120; oxide semiconductor layer, IGZO; Kobayashi Fig. 4A; [0072], [0081]). PNG media_image3.png 510 616 media_image3.png Greyscale Kobayashi further teaches that, upon contact and heat treatment (annealing at 200° C to 500° C), oxygen in the oxide semiconductor layer (120) is drawn out by the metal oxide layer (150), such that oxygen deficiencies are generated and the resistance is reduced in the source region (122; source region; Kobayashi Fig. 4A; [0146]) and the drain region (123; drain region; Kobayashi Fig. 4A; [0146]) of the oxide semiconductor layer (120) ([0145] – [0146]) in contact with the metal oxide layer (150), while the channel region (121; channel region; Kobayashi Fig. 4A; [0165]) remains of higher resistivity. The oxygen-deficient source/drain regions comprise the metal of the oxide semiconductor in a reduced (oxygen-depleted) form, i.e., a first metal dopant that is a reduced form of the first metal oxide. Kobayashi’s metal oxide layer 150 is in contact with both source region 122 and drain region 123, which are spaced apart by channel region 121. Applied the teaching to Ramaswamy, the bottom and top end portions of channel material 142 in contact with source contact 102 and drain contact 104, respectively, become the claimed lower and upper source/drain regions, each in contact with the respective insertion layer. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention, having the teachings of Ramaswamy and Kobayashi before him/her, to form the contact layer(s) of Ramaswamy that abut the IGZO channel of a metal oxide having a greater oxygen bonding energy than the channel oxide, and to thereby reduce the abutting end portion(s) of the channel into oxygen-deficient source/drain region(s), as taught by Kobayashi, (1) because doing so lowers the resistance of the source/drain portions of the oxide semiconductor adjacent the contacts and reduces contact resistance, which is the very problem Ramaswamy seeks to address at the contact/channel interface; (2) since the modification amounts to a simple substitution of one known contact-interface material and technique for another to obtain predictable results (MPEP 2143(I)(B)); and (3) with a reasonable expectation of success, yielding the predictable result of a vertical channel transistor having low-resistance source/drain regions at the end(s) of the vertical oxide channel. Absent this teaching in Ramaswamy, a person with ordinary skill in the art would be motivated to reach out to Kobayashi while forming the vertical transistor of Ramaswamy. Regarding claim 19, the combination of Ramaswamy and Kobayashi teaches, the device of claim 18, wherein Kobayashi teaches “both the lower source/drain region and the upper source/drain region have oxygen vacancies therein,” which is Kobayashi’s source region 122 and drain region 123 each having oxygen deficiencies (122; source region; Kobayashi Fig. 4A; [0146]), (123; drain region; Kobayashi Fig. 4A; [0146]). Regarding claim 20, the combination of Ramaswamy and Kobayashi teaches, the device of claim 18, wherein Ramaswamy teaches “the first metal oxide comprises one or more selected from InxGayZnzO,” which is Ramaswamy’s IGZO channel material (142, 144; channel material, channel region; Ramaswamy Figs. 1A–1B; [0031]), and “the second metal oxide and the third metal oxide are each selected from among … indium tin oxide …,” which is Ramaswamy’s ITO source contact 102 and ITO drain contact 104 (102; source contact; Ramaswamy Figs. 1A–1B; [0031]), (104; drain contact; Ramaswamy Figs. 1A–1B; [0034]); Kobayashi additionally teaches aluminum oxide, titanium oxide, molybdenum oxide, or tungsten oxide (150; metal oxide layer; Kobayashi Fig. 4A; [0092]). Allowable Subject Matter Claims 4 and 10 are objected to as being dependent upon rejected base claims but would be allowable if rewritten in independent forms including all of the limitations of the base claims and any intervening claims and, for claim 4, if rewritten to overcome the rejection under 35 U.S.C. 112(b) set forth in this Office action. Regarding claim 4, the closest prior art of record, US 2022/0254896 A1 (Ramaswamy) and US 2018/0315858 A1 (Kobayashi), alone or in combination, fails to disclose, “wherein the lower insertion layer further comprises a second region that does not overlap the lower source/drain region in the vertical direction; and wherein the second region comprises a second metal dopant that is a reduced form of the second metal oxide,” in combination with the other limitations of claims 1 and 3. Kobayashi’s metal oxide layer 150 is formed by reactive sputtering as a metal oxide throughout, and neither reference teaches a lower insertion layer having a non-overlapping region containing the reduced (metallic) form of the insertion-layer oxide, which is material to the inventive concept of the application. Regarding claim 10, the closest prior art of record, US 2022/0254896 A1 (Ramaswamy) and US 2018/0315858 A1 (Kobayashi), alone or in combination, fails to disclose, “wherein the insulated gate line comprises a gate insulation layer having an L-shaped cross-section; and wherein a vertical portion of the gate insulation layer contacts the channel layer, and a horizontal portion of the gate insulation layer contacts the lower insertion layer,” in combination with the other limitations of claim 1. Ramaswamy’s second insulative material 140 is provided along the sidewalls of channel material 142 and does not include a horizontal portion contacting source contact 102, which is material to the inventive concept of the application. Examiner’s Note (Additional Prior Arts) The examiner included a few prior arts which were not used in the rejection but are relevant to the disclosure. US 2021/0375868 A1 (Karda) - An integrated assembly having a first semiconductor material between two regions of a second semiconductor material. The second semiconductor material is a different composition than the first semiconductor material. Hydrogen is diffused within the first and second semiconductor materials. The conductivity of the second semiconductor material increases in response to the hydrogen diffused therein to thereby create a structure having the second semiconductor material as source/drain regions, and having the first semiconductor material as a channel region between the source/drain regions. A transistor gate is adjacent the channel region and is configured to induce an electric field within the channel region. Some embodiments include methods of forming integrated assemblies. US 2023/0269931 A1 (Lee) - vertical-channel transistor over a bit line with an IGZO channel layer and source/drain contacts at the lower and upper ends of the vertically elongated channel region. US 2019/0035937 A1 (Yamazaki) - source/drain conductive material more likely to bond to oxygen than the metal of the oxide semiconductor, generating oxygen vacancies and a low-resistance region at the interface. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to S M SOHEL IMTIAZ whose telephone number is (408) 918-7566. The examiner can normally be reached on 8AM-5PM, M-F, PST. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine S. Kim can be reached at 571-272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /S M SOHEL IMTIAZ/Primary Patent Examiner Art Unit 2812 10/05/2026
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Prosecution Timeline

Jun 04, 2024
Application Filed
Oct 07, 2026
Non-Final Rejection mailed — §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
98%
With Interview (+6.9%)
2y 3m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 564 resolved cases by this examiner. Grant probability derived from career allowance rate.

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