DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Acknowledgement
Applicant’s response, dated 01/14/2026 to a non-final Office Action dated 10/16/2025 has been entered. Accordingly, claims 1-20 remain pending.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 4 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
In the present instance, claim 4 recites that the effective dopant dose “deviates less than 10%, less than 5%, or less than 1%”. The claim recites a broad limitation (“less than 10%”) as an alternative to narrower limitations (“less than 5%” and “less than 1%”) that are entirely subsumed within the broader limitation. The claim is considered indefinite because there is a question or doubt as to whether the boundaries introduced by such narrower language are (a) merely exemplary of the remainder of the claim, and therefore not required, or (b) a required feature of the claim. To overcome this rejection, Applicant may amend claim 4 to recite only a single limitation (e.g., “less than 10%”) and move the narrower alternative limitations to separate dependent claims.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 1-6 and 8-14, and 17-20 are rejected under 35 U.S.C. 103 as being unpatentable over Saito, U.S. Pat. Pub. 2008/0211020, hereafter Saito.
Regarding claim 1, Saito discloses (Fig. 5) a superjunction (par. [0030]) transistor device, comprising:
a drift region [53],[54] with a plurality of first regions [53] of a first doping type (n) and a plurality of second regions [54] of a second type (p) in a semiconductor body [10],
wherein the first regions [53] and the second regions [54] are arranged alternately in the semiconductor body (see Fig. 5A),
wherein the second regions [54] comprise wide regions [5] having a first width and narrow regions [54] having a second width (Fig. 5A, 5B),
wherein the wide regions and the narrow regions are arranged alternately (one wide region and one narrow region alternate), and
Saito does not explicitly state wherein the first width is at least 1.05 times the second width. However, Saito shows varying widths in the drawings. It would have been obvious to a person of ordinary skill in the art prior to the effective filing date of the instant application to modify the relative widths of the wide and narrow regions of Saito to be at least 1.05 times different, because optimizing the relative dimensions of p-type and n-type pillars in a superjunction device is a known design choice to balance charge carriers, optimize the depletion region, and minimize on-state resistance while maintaining breakdown voltage. Modification of a size or relative dimension is normally considered to be obvious and within the ability of one having ordinary skill in the art (MPEP § 2144.04.IV.A).
Regarding claim 2, Saito discloses everything as applied above. The limitation “ wherein the first width (of 53) is at least 1.1 times the second width [54]” is further obvious over Saito, who shows rough dimensions in the drawings. Furthermore, modification of a size or relative dimension is normally considered to be obvious and within the ability of one having ordinary skill in the art (MPEP, 2144.04.IV.A).
Regarding claim 3, Saito discloses everything as applied above. The limitation “wherein the first width is less than 5 times the second width” is further obvious over Saito, who shows rough dimensions in the drawings. Furthermore, modification of a size or relative dimension is normally considered to be obvious and within the ability of one having ordinary skill in the art (MPEP, 2144.04.IV.A).
Regarding claim 4, Saito discloses everything as applied above. Saito does not explicitly disclose
wherein an effective dopant dose of second type dopant [p] atoms in the wide regions [5] deviates less than 10% from an effective dopant dose of second type dopant atoms in the narrow regions [54].
However, it would have been obvious to one of ordinary skill in the art prior to effective fining date of the instant application to come up with an effective doping dose, because concentration in a super-junction MOSFET is optimized (MPEP, 2144.05.II.A, and case law therein)
Regarding claim 5, Saito discloses everything as applied above. Saito further discloses wherein a wide region [5] and a neighboring narrow region [54] of the second regions are separated by a respective one of the first regions [53].
Regarding claim 6, Saito discloses everything as applied above. Saito further discloses (par. [0009]) wherein each of the first regions and each of the second regions extends in a vertical direction of the semiconductor body [10], and wherein a dimension of the first regions and of the second regions in the vertical direction is dependent on a voltage blocking capability of the superjunction transistor device (par. [0005])
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Regarding claim 8, Saito discloses everything as applied above. Saito further discloses (Fig. 5B) wherein the respective width of each of the second regions [53] varies along a vertical direction of the semiconductor body [2].
Regarding claim 9, Saito discloses everything as applied above. Saito further discloses (Fig. 5B) wherein the first widths of individual wide regions [53] deviate from each other and the second widths [54] of individual narrow regions [54] deviate from each other along a vertical direction of the semiconductor body [10].
Regarding claim 10, Saito discloses everything as applied above. Saito further discloses (Fig. 1) wherein the first regions [53] and the second regions [54] are arranged alternately in a first lateral direction of the semiconductor body [10], and wherein the first regions [53] and the second regions [54] are elongated in a second lateral direction of the semiconductor body [10].
Regarding claim 11, Saito discloses everything as applied above. Saito further discloses (Fig. 5A, 5B) wherein the second lateral direction (horizontal direction in Fig. 5A) is essentially perpendicular to the first lateral direction (2 lateral directions can be perpendicular).
Regarding claim 12, Saito discloses everything as applied above. Saito further discloses (Fig. 5) wherein the first regions [53] are connected to a drain node [1] of the superjunction transistor device, and wherein the second regions [54] are connected to a source node (top electrode above [6]) of the superjunction transistor device.
Regarding claim 13,Saito discloses everything as applied above. Saito further discloses (Figs 5A, 5B) wherein the first regions [53] are connected to the drain node [1] via a drain region [2] of the first doping type (n).
Regarding claim 14, Saito discloses everything as applied above. Saito further discloses (Figs 5A, 5B) wherein the drain region [2] adjoins the first regions [53].
Regarding claim 17, Saito discloses everything as applied above. Saito further discloses further comprising:
a control structure (top source electrode [9]) connected between a source node of the superjunction transistor device and the first regions [53].
Regarding claim 18, Saito discloses everything as applied above. Saito further discloses (Fig. 5) wherein the control structure includes a gate node [8] and is configured to control a conducting channel between the source node [9] and the first regions [53] dependent on a voltage between the gate node [8] and the source node [9].
Regarding claim 19, Saito discloses everything as applied above. Saito further discloses (Fig. 5) wherein the control structure [8] is at least partially integrated in the semiconductor body [10].
Regarding claim 20, Saito discloses everything as applied above. Saito further discloses ‘The superjunction transistor device of claim 17, wherein the control structure further includes a pn-junction between the first regions [53] and the source node [6].
Claims 7 and 15-16 are rejected under 35 U.S.C. 103 as being unpatentable over Saito, U.S. Pat. Pub. 2008/0211020, hereafter Saito, in view of Peake et. al., U.S. Pat. Put. 2013/0146967, hereafter Peake.
Regarding claim 7, Saito discloses everything as applied above. Saito fails to explicitly disclose
wherein each of the first regions and each of the second regions extends in a vertical direction of the semiconductor body, and wherein a dimension of the first regions and of the second regions in the vertical direction is in a range of several 10 micrometers to several 100 micrometers.
However, Peake discloses (Fig. 1) a contact in micrometer range. It would have been obvious to one having ordinary skill in the art prior toe effective filing date of this application to modify the contacts of Saito with micrometer size because it was held that resizing components is within the ability of one having ordinary skill in the art (MPEP, 2144.04.IV.A)
Claims 15-17 are rejected under 35 U.S.C. 103 as being unpatentable over Saito, U.S. Pat. Pub. 2008/0211020, hereafter Saito, in view of Examiner’s Official Notice.
Regarding claim 15, Saito discloses everything as applied above. Saito fails to explicitly disclose wherein a buffer region of the first doping type is arranged between the drain region and the first regions, and wherein a doping concentration of the buffer region is lower than a doping concentration of the drain region.
However, the Examiner takes an Official Notice that Buffer layers are commonly arranged in power devices because this helps to prevent faults and cracks
Regarding claim 16, Saito discloses everything as applied above. Saito fails to explicitly disclose
wherein the buffer region includes two or more differently doped sub-regions. However, the Examiner takes an Official Notice that Buffer layers are commonly arranged in power devices because this helps to prevent faults and cracks.
Response to Arguments
Applicant amendments and arguments regarding the rejection of claims 2-3 under 35 U.S.C. 112(b) have been fully considered and are persuasive. The rejection has been withdrawn.
Applicant’s arguments regarding prior art rejections of claims 1-20 have been fully considered and are in part persuasive. Applicant argues, pp.7-8 that including a base [5] region in the p-type pillar of the drift region [4].
The Examiner introduces an NPL reference, which is not a prior art, but clarifies he Examiner’s position “Basic Power MOSFET Structure”, https://en.eeworld .com.cn/mp/EEWorld/a315818.jspx.
As seen in Figs 1 and 2, in one interpretation in the original type superjunction MOSFET the base is extended down into the n-drift region becoming the p-pillar (see p. 1, bottom paragraph). The NPL reference also shows Applicant’s newer type superjunction structure.
The non-final rejection has been modified. The concentration denoted in Figs 5a and 5b of Saito shows a similar concentration in the base region and the pillar, the 2 regions 5 and 4 are alternatively arranged.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to VICTOR V BARZYKIN whose telephone number is (571)272-0508. The examiner can normally be reached Monday-Friday, 9am-5pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, BRITT HANLEY can be reached at (571)270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VICTOR V BARZYKIN/Examiner, Art Unit 2893
/Britt Hanley/Supervisory Patent Examiner, Art Unit 2893
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