Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Specification
The specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 09/19/2025 was filed in a timely manner; thus, the submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Group I, claims #1-10 in the reply filed on 08/21/26 is acknowledged.
Claims #1-10 will be further examined.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) #1-3, 6-8,10, is/are rejected under 35 U.S.C. 102(a)(2) as being unpatentable by Katkar et al., (U.S. Pub. No, 2016/0044781), hereinafter referred to as "Katkar".
Katkar shows, with respect to claim #1, device comprising: a substrate (fig. #1-4, item 152, 153); an interposer (circuit panel/interposer) (fig. #1-4, item 112); a die (Below; fig. Ex2, item D1) (paragraph 0066) disposed between the substrate and the interposer (paragraph 0066); a conductive structure (fig. #1-4, item 159) disposed between the substrate and the interposer (paragraph 0067), the conductive structure (fig. #1-4, item 159) comprising one or more walls (Below; fig. Ex1, item IW1 and OW1) defining one or more openings (Below; fig. Ex1, item 170a) (paragraph 0067), the one or more walls electrically connected to the substrate (fig. #1-4, item 152, 153) via a first plurality of terminals (fig. #1-3, item 170) and to the interposer (circuit panel/interposer) (fig. #1-4, item 112) via a second plurality of terminals (Below; fig. Ex2, item ST1); and a plurality of interconnects (fig. #1-4, item 170) disposed within the one or more openings (Below; fig. Ex1, item 170b) and electrically isolated from the conductive structure (paragraph 0034, 0042, 0065), the plurality of interconnects electrically connecting the substrate and the interposer (paragraph 0024, 0067).
[AltContent: textbox (Inner Wall; IW1)]
[AltContent: textbox (Y; 140)][AltContent: textbox (X; 142)][AltContent: arrow][AltContent: arrow][AltContent: connector][AltContent: textbox (170a)][AltContent: arrow][AltContent: textbox (170b)][AltContent: arrow][AltContent: textbox (Outer Wall; OW1)][AltContent: arrow][AltContent: textbox (Ex1)]
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[AltContent: textbox (Gaps; GS1)][AltContent: connector][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: arrow][AltContent: textbox (Die; D1)][AltContent: textbox (Second Terminals;ST1)][AltContent: arrow][AltContent: textbox (Ex2)]
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Katkar shows, with respect to claim #2, a device wherein the conductive structure comprises a metal or a metal alloy having a dielectric coating (paragraph 0068).
Katkar shows, with respect to claim #3, a device wherein one or more gaps (Above; fig. Ex2, item GS1) separate each of the plurality of interconnects (Above; fig. Ex2, item 170) from physical contact with the one or more walls (Above; fig. Ex1, item IW1 and OW1) (paragraph 0067).
Katkar shows, with respect to claim #6, a device wherein: the plurality of interconnects comprises a plurality of sets of interconnects (fig. #1-4, item 170); each opening of the one or more openings (above; fig. Ex1, item 170a) is separated from an adjacent opening of the one or more openings by one of the one or more walls (paragraph 0067); and each set of interconnects of the plurality of sets of interconnects is disposed within a corresponding opening of the one or more openings (above; fig. Ex1, item IW1 and OW1).
Katkar shows, with respect to claim #7, a device wherein: a first wall of the one or more walls (Below; fig. Ex3, item OW3, Y direction) (paragraph 0063, 0067) separates a first opening (Below; fig. Ex3, item 170c) of the one or more openings from a second opening (Below; fig. Ex3, item 170d) of the one or more openings (paragraph 0067); a first set of interconnects (Below; fig. Ex4, item 170d1) is disposed within the first opening (Below; fig. Ex3, item #1); a second set of interconnects (Below; fig. Ex4, item 170d2) is disposed within the second opening (Below; fig. Ex3, item #2); a first subset of the first plurality of terminals (Below; fig. Ex4, item 170d1) is disposed on a first surface of the first wall (Below; fig. Ex4, item FS4); and a second subset of the second plurality of terminals (Below; fig. Ex4, item 170d2) is disposed on a second surface of the first wall (Below; fig. Ex4, item SS4), the second surface opposite to the first surface.
[AltContent: textbox (#1)][AltContent: arrow][AltContent: textbox (Outer Wall; OW3)][AltContent: textbox (170d)][AltContent: textbox (170c)][AltContent: arrow][AltContent: arrow]
[AltContent: textbox (#2)][AltContent: arrow][AltContent: arrow][AltContent: textbox (Y; 140)][AltContent: textbox (Ex3)][AltContent: connector][AltContent: textbox (X; 142)]
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[AltContent: textbox (Second Wall; SW4)][AltContent: textbox (2nd Interconnect; 170d2)][AltContent: textbox (1st Interconnect; 170d1)]
[AltContent: arrow][AltContent: arrow]
[AltContent: textbox (4th Terminals; T4)][AltContent: arrow][AltContent: textbox (3rd Terminals; T3)][AltContent: arrow][AltContent: connector][AltContent: textbox (Ex4)][AltContent: textbox (Second Surface; SS4)][AltContent: arrow][AltContent: arrow][AltContent: textbox (First Surface; FS4)][AltContent: arrow][AltContent: connector]
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Katkar shows, with respect to claim #8, a second conductive structure (Above; fig. Ex3, item #2) disposed between the substrate (fig. #1-4, item 152, 153) and the interposer (circuit panel/interposer) (fig. #1-4, item 112), the second conductive structure (Above; fig. Ex4, item 170d2) comprising one or more additional walls (Above; fig. Ex4, item SW4) defining one or more additional openings (Above; fig. Ex3, item #2), the one or more additional walls electrically connected to the substrate via a third plurality of terminals (Above; fig. Ex3, item T3) and to the interposer via a fourth plurality of terminals (Above; fig. Ex3, item T3); and a second plurality of interconnects disposed within the one or more additional openings and electrically isolated from the second conductive structure (paragraph 0024, 0063, 0067).
Katkar shows, with respect to claim #10, a device wherein the conductive structure and the plurality of interconnects (Above; fig. Ex4, item 170d1) are disposed on a first end of the die, and wherein the second conductive structure and the second plurality of interconnects (Above; fig. Ex4, item 170d2) are disposed on a second end of the die that is opposite to the first end (paragraph 0024, 0063, 0067).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim #4, 5, 9 are rejected under 35 U.S.C. 103 as being unpatentable over Katkar et al., (U.S. Pub. No, 2016/0044781), hereinafter referred to as "Katkar", and in view of Jeng et al., (U.S. Pub. No, 2025/0357296), hereinafter referred to as "Jeng".
Katkar substantially shows the claimed invention as shown in the rejection of claim #1 above.
Katkar fails to show, with respect to claim #4, a device wherein the conductive structure is electrically connected to a common ground via the substrate and the interposer.
Jeng teaches, with respect to claim #4, a device wherein the conductive structure is electrically connected to a common ground via the substrate and the interposer (paragraph 0075).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, with respect to claim #4, to modified the invention of Katkar as modified by the invention of Jeng, which teaches, wherein the conductive structure is electrically connected to a common ground via the substrate and the interposer, to incorporate a structural condition that would offer the advantageous of reducing signal delay and loss, as taught by Jeng.
Katkar fails to show, with respect to claim #5, a device wherein the conductive structure is electrically connected to a common source voltage via the substrate and the interposer.
Jeng teaches, with respect to claim #5, a device wherein the conductive structure is electrically connected to a common source voltage via the substrate and the interposer (paragraph 0072).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, with respect to claim #5, to modified the invention of Katkar as modified by the invention of Jeng, which teaches, wherein the conductive structure is electrically connected to a common source voltage via the substrate and the interposer, to incorporate a structural condition that would improve efficiency, and reduce costs, while balancing safety, compatibility, and infrastructure constraints, as taught by Jeng.
Katkar, with respect to claim #9, substantially shows the claimed invention including wherein the conductive structure (Above; fig. Ex1) is electrically connected to a first reference voltage/(electrically connected) via one or more conductors associated with a first portion of the substrate (fig. #1-4, item 152, 153) (paragraph 0023, 0067) and one or more conductors (fig. #1-3, item 159) associated with a first portion of the interposer (circuit panel/interposer) (fig. #1-4, item 112).
The Examiner notes that Katkar, with respect to claim #9, does not explicitly state that the conductive structure is electrically connected to a first reference voltage wherein the second conductive structure is electrically connected to a second reference voltage that is different than the first reference voltage via one or more conductors associated with a second portion of the substrate and one or more conductors associated with a second portion of the interposer
Jeng teaches, with respect to claim #9, wherein the conductive structure is electrically connected to a first reference voltage wherein the second conductive structure is electrically connected to a second reference voltage that is different than the first reference voltage via one or more conductors associated with a second portion of the substrate and one or more conductors associated with a second portion of the interposer (paragraph 0071-0072).
It would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention, with respect to claim #9, to modify the invention of Katkar as modified by the invention Jeng, which teaches, wherein the conductive structure is electrically connected to a first reference voltage wherein the second conductive structure is electrically connected to a second reference voltage that is different than the first reference voltage via one or more conductors associated with a second portion of the substrate and one or more conductors associated with a second portion of the interposer, to incorporate a structural condition that would provide power to needed directional feeds, as taught by Jeng.
EXAMINATION NOTE
The rejections above rely on the references for all the teachings expressed in the text of the references and/or one of ordinary skill in the art would have reasonably understood or implied from the texts of the references. To emphasize certain aspects of the prior art, only specific portions of the texts have been pointed out. Each reference as a whole should be reviewed in responding to the rejection, since other sections of the same reference and/or various combinations of the cited references may be relied on in future rejections in view of amendments.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Andre’ Stevenson whose telephone number is (571) 272 1683 (Email Address, Andre.Stevenson@USPTO.GOV). The examiner can normally be reached on Monday through Friday from 7:30 am to 4:30 pm. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Zandra Smith can be reached on 571-272 2429. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Andre’ Stevenson Sr./
Art Unit 2899
09/08/2026
/Brent A. Fairbanks/Supervisory Patent Examiner, Art Unit 2899
Prosecution Insights