DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 6/6/2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Election/Restrictions
Applicant’s election without traverse of Species II in the reply filed on 9/15/2026 is acknowledged.
Claims 2 and 9-14 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected Species, there being no allowable generic or linking claim. Election was made without traverse in the reply filed on 9/15/2026.
Claim Objections
Claim 1 is objected to because of the following informalities:
Claim 1 recites the limitation “the electrically conductive via structure” in lines 8-9 of the claim, which the Examiner suggests amending to removing the “structure” term, because it appears the claimed element was originally introduced with the specific language “electrically conductive via”.
Appropriate correction is required.
A. Prior-art rejections based at least in part by Hsu
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 4 and 6 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsu et al. (US 2020/0127089 A1, hereinafter “Hsu”).
Regarding independent claim 1, Figure 6 of Hsu discloses an interconnect structure comprising:
an electrically conductive structure 43 (“conductive material”- ¶0019) embedded in a first interlayer dielectric layer 15 (“dielectric layer”- ¶0017);
an electrically conductive via 45 (“conductive material”- ¶0022) embedded in a second interlayer dielectric layer 30 (“cover layer…TEOS”- ¶0017), wherein the electrically conductive via 45 is in direct physical contact with the electrically conductive structure 43; and
a dual partial liner 41/44 (collectively 41 and 44) located on a portion of a sidewall of the electrically conductive via 45, wherein the dual partial liner 41/44 comprises a first partial liner 41 (“conductive barrier layer”- ¶0018) and a second partial liner 44 (“spacer material layer”- ¶0021), wherein the first partial liner 41 extends under the second partial liner 44 and the electrically conductive via structure 45 extends over both the first partial liner 41 and the second partial liner 44 and contacts a sidewall of the second interlayer dielectric layer 30, since via 45 extends over the side surfaces of liners 41, 45 and indirectly contacts the sidewall of layer 30.
Regarding claim 4, Figure 6 of Hsu discloses wherein the electrically conductive via 45 has a topmost surface that is substantially coplanar with a topmost surface of the second interlayer dielectric layer 30.
Regarding claim 6, Figure 6 of Hsu discloses wherein the electrically conductive via 45 contacts an inner sidewall of both the second partial liner 44 and the first partial liner 41, since via indirectly contacts the inner sidewall of liner 41.
B. Prior-art rejections based at least in part by Hsu (different interpretation)
Claim Rejections - 35 USC § 102
Claims 1 and 7 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hsu (different interpretation).
Regarding independent claim 1, Figure 6 of Hsu discloses an interconnect structure comprising:
an electrically conductive structure 43 (“conductive material”- ¶0019) embedded in a first interlayer dielectric layer 14 (“etching stop layer… silicon nitride”- ¶0017);
an electrically conductive via 45 (“conductive material”- ¶0022) embedded in a second interlayer dielectric layer 30 (“cover layer…TEOS”- ¶0017), wherein the electrically conductive via 45 is in direct physical contact with the electrically conductive structure 43; and
a dual partial liner 41/44 (collectively 41 and 44) located on a portion of a sidewall of the electrically conductive via 45, wherein the dual partial liner 41/44 comprises a first partial liner 41 (“conductive barrier layer”- ¶0018) and a second partial liner 44 (“spacer material layer”- ¶0021), wherein the first partial liner 41 extends under the second partial liner 44 and the electrically conductive via structure 45 extends over both the first partial liner 41 and the second partial liner 44 and contacts a sidewall of the second interlayer dielectric layer 30, since via 45 extends over the side surfaces of liners 41, 45 and indirectly contacts the sidewall of layer 30.
Regarding claim 7, Figure 6 of Hsu discloses the interconnect structure further comprising a dielectric cap 15 (“dielectric layer”- ¶0017) located between the first interlayer dielectric layer 14 and the second interlayer dielectric layer 30, wherein the electrically conductive via 45 and the dual partial liner 43 extend through the dielectric cap 15.
Allowable Subject Matter
Claims 15-20 are allowed.
Regarding independent claim 15, Figure 6 of Hsu discloses an interconnect structure comprising:
an electrically conductive structure 43 (“conductive material”- ¶0019) embedded in a first interlayer dielectric layer 15 (“dielectric layer”- ¶0017);
an electrically conductive via 45 (“conductive material”- ¶0022) embedded in a second interlayer dielectric layer 30 (“cover layer…TEOS”- ¶0017), wherein the electrically conductive via 45 is in direct physical contact with the electrically conductive structure 43; and
a dual partial liner 41/44 (collectively 41 and 44) located on a portion of a sidewall of the electrically conductive via 45 wherein the dual partial liner 41/44 comprises a first partial liner 41 (“conductive barrier layer”- ¶0018) and a second partial liner 44 (“spacer material layer”- ¶0021), wherein the first partial liner 41 extends under the second partial liner 44 and has a topmost surface that is vertically offset from a topmost surface of the second partial liner 44.
Hsu does not expressly disclose wherein the first partial liner has a topmost surface located above a topmost surface of the second partial liner.
Thus, regarding independent claim 15, the claim is allowed, because the prior art of record including Hsu, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the first partial liner extends under the second partial liner and has a topmost surface that is vertically offset and located above a topmost surface of the second partial liner”.
Claims 16-20 are allowed as being dependent on allowed claim 15
Claims 3, 5 and 8 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Regarding claim 3, the prior art of record including Hsu, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the first partial liner has a topmost surface that is vertically offset and located above a topmost surface of the second partial liner”.
Regarding claim 5, the prior art of record including Hsu, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein the first partial liner is in direct contact with the electrically conductive structure and the second partial liner is entirely separated from the electrically conductive structure by the first partial liner”.
Regarding claim 8, the prior art of record including Hsu, either singularly or in combination, does not disclose or suggest the combination of limitations including, but not limited to, “wherein a bottom portion of the first partial liner that extends beneath the second partial liner has a width that is greater than a width of the first partial liner that extends along a sidewall of the second partial liner”.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure:
Wang et al. (US 2019/0164824 A1), which discloses an interconnect structure comprising a dial partial liner surrounding a conductive via.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JAY C CHANG whose telephone number is (571)272-6132. The examiner can normally be reached Mon- Fri 12pm-10pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Eliseo Ramos-Feliciano can be reached at (571)-272-7925. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JAY C CHANG/Primary Examiner, Art Unit 2817
