Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on June 7, 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Response to Amendment
The Amendment filed April 7, 2026 has been entered. Claims 1-20 remain pending in the application. Claims 1, 8, & 15 have been amended. Claims 16-20 are new. Applicant’s amendments to the Claims have overcome each and every 35 U.S.C. § 112(b) rejection(s) previously set forth in the Non-Final Office Action mailed January 22, 2026, hereafter referred to as the Non-Final Office Action.
Response to Arguments
Applicant’s arguments, see pp. 8-10 of Applicant’s remarks, filed April 7, 2026, with respect to the rejection(s) of amended independent claim(s) 1 and 8 under 35 U.S.C. 103 over Loder (US 2022/04313035) in view of Kapaun (US 2022/0376601), have been entered, fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Takamatsu et al. (US2021/0148993A1). Please see below for updated new ground(s) of rejection(s).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-2, 8, & 16-17 are rejected under 35 U.S.C. 103 as being unpatentable over Loder et al. (US 2022/0413035 A1, Pub. Date Dec. 29, 2022, hereinafter, Loder), in view of Kapaun et al. (US 2022/0376601 A1, Pub. Date Nov. 24, 2022, hereinafter, Kapaun), and further in view of Takamatsu et al. (US 2021/0148993 A1, Pub. Date May 20, 2021, hereinafter, Takamatsu).
Regarding independent claim 1, Loder, teaches:
A method for detecting an insulation fault in an unearthed electrical system (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], & [0135]: discloses a method for detecting insulation faults in an unearthed system (insulated high voltage bus)), the system comprising a first rail and a second rail, each rail having an insulation resistance ([0001], [0014] & [0015]-[0019]: discloses a high-side (first) rail and a low-side (second) rail with respective insulation resistances), the method comprising:
in an initial stage ([Abstract], [0043], & [0047]: discloses performing the method over multiple stages, including a “current” (initial) stage and “next” (subsequent) stages):
connecting the first rail to a relative ground through a first resistive component, wherein the first rail has an initial stage first rail voltage in the initial stage ([0032]-[0033], [0040], [0043]-[0044], [0047], & [0062]: discloses connecting rails to ground via resistive components (primary/secondary resistance circuits) in specific states (stages) and measuring the voltage); and
in a subsequent stage ([0032]-[0033], [0043]-[0044], [0047]-[0048], & [0118]-[0123]: discloses transitioning to a subsequent stage (e.g., from State 3 to State 0, or State 0 to State 1):
connecting the second rail to the relative ground through a second resistive component, wherein the first rail has a subsequent stage first rail voltage ([0032]-[0033], [0043]-[0044], [0047]-[0048], [0059]-[0060], [0097]-[0099], & [0118]-[0126]: discloses switching the resistance circuit to connect the second (low-side) rail in the subsequent state (e.g., State 1 connects low-side RSL), measures the first rail voltage (UMH1) during the subsequent stage where the second rail is connected); and
Loder, in combination with Kapaun, are silent in regard to:
charging a capacitor to a capacitor voltage using the first rail, wherein the capacitor is connected to the first rail via an isolation device, and wherein the capacitor voltage is indicative of the initial stage first rail voltage; and
determining if a fault has occurred by using the capacitor voltage and the subsequent stage first rail voltage.
However, Takamatsu, further teaches:
charging a capacitor to a capacitor voltage using the first rail, wherein the capacitor is connected to the first rail via an isolation device, and wherein the capacitor voltage is indicative of the initial stage first rail voltage (Figs. 1 & 4; [0052]-[0053] & [0067]); and
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the multi-stage insulation fault monitoring device of Loder to include the flying capacitor and isolation device sampling circuitry taught by Takamatsu, according to known methods. A POSITA would have been motivated to implement Takamatsu’s isolated flying capacitor circuit into Loder’s multi-stage measurement system to safely isolate the downstream measurement controllers from the high-voltage bus during the sequential sampling stages. This combination constitutes the application of a known technique (Takamatsu’s isolated flying capacitor sampling) to a known device (Loder’s multi-stage fault monitor) ready for improvement, yielding the predictable result (KSR) of acquiring and holding the initial stage rail voltage for use in Loder’s subsequent fault determination calculations.
However, Loder, in combination with Takamatsu, further teach:
determining if a fault has occurred by using the capacitor voltage and the subsequent stage first rail voltage (Loder: [0055]-[0057], [0060], [0068]-[0070], [0097]-[0099], [0124], & [0167]: calculates resistance/faults by comparing the voltage from the prior (initial) stage and the voltage from the current (subsequent) stage, refer to Eq. (3) using UMH0 (prior/initial voltage) and UMH1 (current/subsequent voltage); Takamatsu: [0075]-[0076]: teaches utilizing the specific voltage stored in the flying capacitor (V0) from the initial stage to calculate the final insulation resistance and trigger a fault determination).
It is recognized that the citations and evidence provided above are derived from potentially different embodiments of a single reference. Nevertheless, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to employ combinations and sub-combinations of these complementary embodiments, and otherwise motivate experimentation and optimization, by modifying the multi-stage voltage measurement system of Loder with the isolated flying capacitor measurement circuit taught by Takamatsu. The motivation to do so would be to safely isolate the sensitive downstream measurement controllers (e.g., like Loder’s A/D converters or logic controllers) from the high-voltage bus during the sequential sampling stages. As taught by Takamatsu ([0018] & [0053]), using isolated switching elements (e.g., optical MOFETs) alongside a flying capacitor protects the measurement control device from high voltage exposure while capturing and storing the rail voltage for the subsequent comparison required by Loder’s resistance calculation formulas. This constitutes an optimization by applying a known technique (Takamatsu’s isolated flying capacitor sampling) to a known device (Loder’s multi-stage fault monitor) ready for improvement, yielding the predictable result (KSR) of safely acquiring and holding the initial stage rail voltage for use in Loder’s subsequent fault determination calculations.
Regarding dependent claim 2, Loder, teaches:
The method of claim 1 (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], & [0135]), wherein:
the second rail has a subsequent stage second rail voltage in the subsequent stage ([0047] & [0060]: discloses measuring the voltage of the second (low-side) rail during every stage (including subsequent stages like State 1, State 2, etc.), where UML1 represents the second rail voltage in the subsequent stage);
a difference between the subsequent stage first rail voltage and the subsequent stage second rail voltage is defined as a differential voltage ([0069], [0079], & [0102]: discloses calculating differences between values corresponding to the high-side and low-side rails to determine imbalance, refers to resistance differences, the voltage values ( VMH, VML) are the direct inputs for these determinations); and
the differential voltage is used in determining if a fault has occurred ([0069], [0079], & [0102]: uses the difference (asymmetry) to determine if a “mid-level” fault has occurred, controller uses the difference between values associated with the first and second rails to determine the fault).
Regarding independent claim 8, Loder, teaches:
A circuit for detecting an insulation fault in an unearthed electrical system (Fig. 1; [0001], [0012]-[0019], & [0135]), the system comprising a first rail and a second rail, each rail having an insulation resistance ([0001], [0012]-[0019], & [0135]: discloses a fault monitoring device for a high voltage bus (unearthed system) with high-side and low-side rails and insulation resistances), the circuit comprising ([0001], [0012]-[0019], & [0135]):
wherein the initial configuration comprises ([Abstract], [0043], & [0047]):
a first resistive component connected between the first rail and a relative ground, wherein the first rail has an initial first rail voltage in the initial configuration ([0032]-[0033], [0040], [0043]-[0044], [0047], & [0062]: discloses various states, i.e., third state (State 2) connects the high-side secondary resistance RSH to the high-side rail, corresponding to the initial configuration);
wherein the subsequent configuration comprises ([0032]-[0033], [0043]-[0044], [0047]-[0048], & [0118]-[0123]: discloses transitioning to a subsequent stage (e.g., from State 3 to State 0, or State 0 to State 1) a second resistive component connected between the second rail and a relative ground, wherein the first rail has a subsequent first rail voltage in the subsequent configuration and the second rail has a subsequent second rail voltage ([0032]-[0033], [0043]-[0044], [0047]-[0048], [0059]-[0060], [0097]-[0099], & [0118]-[0126]: discloses switching to a subsequent state (e.g., State 1, where the low-side secondary resistance RSL connects to the low-side rail) and both high-side VMH and low-side VML measurement voltages are determined in each stage, indicating subsequent rail voltages); and
Loder, in combination with Kapaun, are silent in regard to:
a capacitor connected to the first rail, wherein the capacitor has a capacitor voltage resulting from charging by the first rail in the initial configuration; and
an isolation device connected to the first rail and the capacitor, wherein the isolation device is configured to connect the capacitor to the first rail in the initial configuration;
wherein the circuit further comprises circuitry configured to use the capacitor voltage and the subsequent first rail voltage to determine if a fault has occurred.
However, Takamatsu, further teaches:
a capacitor connected to the first rail, wherein the capacitor has a capacitor voltage resulting from charging by the first rail in the initial configuration (Figs. 1 & 4; [0052]-[0053] & [0066]-[0067]); and
an isolation device connected to the first rail and the capacitor, wherein the isolation device is configured to connect the capacitor to the first rail in the initial configuration ([0052]-[0053]: teaches that the switches (e.g., S1 connecting positive rail to the capacitor) are isolated switching elements (e.g., optical MOSFETs));
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the multi-stage insulation fault monitoring circuit of Loder to include the timing components, flying capacitor, and isolation device sampling circuitry taught by Takamatsu, according to known methods. A POSITA would have been motivated to implement Takamatsu’s timing components, flying capacitor, and isolation device sampling circuitry into Loder’s multi-stage insulation fault monitoring circuit to safely isolate the downstream measurement controllers from the high-voltage bus during the sequential sampling stages. This combination constitutes the application of a known technique (Takamatsu’s isolated flying capacitor sampling) to a known device (Loder’s multi-stage fault monitor) ready for improvement, yielding the predictable result (KSR) of acquiring and holding the initial stage rail voltage for use in Loder’s subsequent fault determination calculations.
However, Loder, in combination with Takamatsu, further teach:
a timing component configured to output a timing signal that configures the circuit into an initial configuration or a subsequent configuration (Loder: [0047]-[0050] & [0069]-[0070]: discloses a controller (timing component) that controls switches to configure the circuit into different ”states” (configurations) over different “stages” (timing intervals); Takamatsu: [0066]-[0067]: confirms utilizing timed measurement periods to alternate circuit configurations);
wherein the circuit further comprises circuitry configured to use the capacitor voltage and the subsequent first rail voltage to determine if a fault has occurred (Loder: [0055]-[0057], [0060], [0068]-[0070], [0097]-[0099], [0124], & [0167]: calculates resistance/faults by comparing the voltage from the prior (initial) stage and the voltage from the current (subsequent) stage, refer to Eq. (3) using UMH0 (prior/initial voltage) and UMH1 (current/subsequent voltage); Takamatsu: [0075]-[0076]: teaches utilizing the specific voltage stored in the flying capacitor (V0) from the initial stage to calculate the final insulation resistance and trigger a fault determination).
It is recognized that the citations and evidence provided above are derived from potentially different embodiments of a single reference. Nevertheless, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains, to employ combinations and sub-combinations of these complementary embodiments, and otherwise motivate experimentation and optimization, by modifying the multi-stage insulation fault monitoring circuit of Loder to include the timing component, the flying capacitor, and isolation device circuitry taught by Takamatsu. The motivation to do so would be to safely isolate the sensitive downstream measurement controllers (e.g., like Loder’s A/D converters or logic controllers) from the high-voltage bus during the sequential timed sampling configurations. As taught by Takamatsu ([0018], [0052]-[0053] & [0066]), using isolated switching elements (e.g., optical MOFETs) alongside a flying capacitor protects the measurement control device from high voltage exposure while capturing and storing the rail voltage for the subsequent comparison required by Loder’s resistance calculation formulas. This constitutes an optimization by applying a known technique (Takamatsu’s isolated flying capacitor sampling) to a known device (Loder’s multi-stage fault monitor) ready for improvement, yielding the predictable result (KSR) of safely acquiring and holding the initial stage rail voltage in the capacitor for use in Loder’s subsequent stage fault determination calculations.
Regarding dependent claim 16, Loder, teaches:
The method of claim 1 (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], & [0135]), wherein: the second rail has an initial stage second rail voltage in the initial stage ([0046]-[0050]: teaches that during any given stage (“current stage” constitutes the initial stage), the system measures the voltage of both the first rail VMH and the second rail VML); a difference between the initial stage first rail voltage and the initial stage second rail voltage is defined as a differential voltage ([0082]-[0083] & [0085]); and the differential voltage is used in determining if a fault has occurred ([0083]-[0085] & [0112]).
Regarding dependent claim 17, Loder, teaches:
The method of claim 1 (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], & [0135]), wherein: the second rail has a subsequent stage second rail voltage in the subsequent stage ([0046]-[0050]: teaches that as the system advances through its sequence of states, continuously measures the low-side measurement voltage VML and the high-side measurement VMH at subsequent stages, constituting the subsequent stage second rail voltage), a difference between the initial stage first rail voltage and the subsequent stage second rail voltage is defined as a differential voltage ([0082]-[0085]: teaches mathematically combining the first rail voltage VMH and the second rail voltage VML, taking a difference between a prior stage voltage sample (the initial stage) and a current stage voltage sample (subsequent stage) to create a combined differential metric); and the differential voltage is used in determining if a fault has occurred ([0083]-[0085] & [0112]).
Claims 3-7 & 9-15 are rejected under 35 U.S.C. 103 as being unpatentable over Loder, in view of Kapaun, in view of Stoica et al. (US 2022/0252434 A1, Pub. Date Aug. 11, 2022, hereinafter Stoica), and further in view of Takamatsu.
Regarding dependent claim 3, Loder, teaches:
The method of claim 2 (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], & [0135]), wherein:
Loder, and Kapaun, are silent in regard to:
the differential voltage is scaled by a threshold scaling factor to determine a threshold voltage; and the threshold voltage is used in determining if a fault has occurred.
However, Stoica, further teaches:
the differential voltage is scaled by a threshold scaling factor to determine a threshold voltage ([0049] & [0061]: teaches scaling (amplifying) the differential voltage (difference between inputs) by a gain factor (scaling factor) within a common mode amplifier or compensation controller to determine a voltage level (Vdiff) used for fault diagnosis, scales the differential signal (Vdiff) to determine the control voltage (threshold voltage) for the compensation loop or for the comparator input); and the threshold voltage is used in determining if a fault has occurred ([0048] & [0051]: uses the scaled differential voltage (Vdiff) referred to as the determined threshold voltage for decision making, to determine if a fault exists by comparing it against a reference, and the scaled differential voltage Vdiff is the value used in the determination step to trigger the error signal).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the fault detection logic of Loder/Kapaun with the signal processing techniques of Stoica (scaling/amplifying the differential voltage), according to known methods. To improve the sensitivity of the system to small “mid-level” faults and to enable the detection of faults before they become critical, yielding expected predictable results (KSR).
Regarding dependent claim 4, Loder, teaches:
The method of claim 3 (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], [0096], & [0135]), wherein:
Loder, and Kapaun, are silent in regard to:
the capacitor voltage is scaled by a capacitor scaling factor to define a scaled capacitor voltage; and the scaled capacitor voltage is used in determining if a fault has occurred.
However, Stoica, further teaches:
the capacitor voltage is scaled by a capacitor scaling factor to define a scaled capacitor voltage ([0042], [0047], [0056]-[0057], [0063]-[0064], & [0068]: teaches scaling (amplifying) the voltage associated with a capacitor (Vtop and Vbot) using an amplifier with a specific gain (scaling factor) to produce a processed output signal); and the scaled capacitor voltage is used in determining if a fault has occurred ([0048]-[0051] & [0065]: discloses using the output of the amplifier (scaled voltage e.g., VDiff) to determine if a fault exists by comparing it to a threshold).
It would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the signal conditioning techniques of Stoica (e.g., scaling/amplifying the capacitor voltage) into the Loder/Kapaun system, according to known methods. To improve the Signal-to-Noise Ratio (SNR) and ensure that the small voltage signals across Kapaun’s measuring capacitor are robust to be accurately read by the controller or comparator for reliable fault determination, yielding expected predictable results (KSR).
Regarding dependent claim 5, Loder, teaches:
The method of claim 4 (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], [0096], & [0135]), further comprising:
Loder, and Kapaun, are silent in regard to:
measuring a voltage difference between the capacitor voltage or the scaled capacitor voltage and the subsequent stage first rail voltage to define a measured voltage; and using the measured voltage in determining if a fault has occurred.
However, Stoica, further teaches:
measuring a voltage difference between the capacitor voltage or the scaled capacitor voltage and the subsequent stage first rail voltage to define a measured voltage ([0057], [0061], & [0065]: teaches measuring the difference between the capacitor voltage (or averaged/scaled inputs) and a reference (corresponding to the rail/common mode) to define a measured voltage (Vdiff or Vout), where in this combination, the Vdiff/Vout represents the measured difference between the capacitor’s state and the rail state during the switching stage); and using the measured voltage in determining if a fault has occurred ([0048] & [0051]: uses the measured differential voltage (Vdiff or Vout) to determine if a fault exists by comparing it to a threshold).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify Lode’s voltage monitoring to include the specific differential measurement technique of Stoica applied to the capacitor of Kapaun, according to known methods. To precisely quantify the amount of change or the deviation occurring during stage transitions by defining a specific measured voltage (Vdiff) that represents the difference between the stored capacitor potential and the new rail voltage, improving the sensitive of the fault detection as taught by Stoica, yielding expected predictable results (KSR).
Regarding dependent claim 6, Loder, teaches:
The method of claim 5 (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], [0096], & [0135]),
Loder, and Kapaun, are silent in regard to:
wherein the measured voltage is compared against the threshold voltage to determine if a fault has occurred.
However, Stoica, further teaches:
wherein the measured voltage is compared against the threshold voltage to determine if a fault has occurred ([0038], [0048], & [0051]: discloses comparing the measured differential voltage (Vdiff or Vout) against a predetermined threshold voltage (Vref_leak) using a comparator to determine if a fault exists).
It would have been obvious to one of ordinary skill in the art before the effective filing date to implement the fault determination logic of Loder/Kapaun using the specific comparator circuitry of Stoica, according to known methods. For a precise, hardware-based or signal-processing-based method to execute the comparison step, ensuring that the measured voltage is accurately evaluated against a defined threshold voltage to trigger the fault alert, yielding expected predictable results (KSR).
Regarding dependent claim 7, Loder, teaches:
The method of claim 6 (Fig. 1; [0001], [0013]-[0014], [0017]-[0018], [0096], & [0135]), wherein, if the measured voltage is less than the threshold voltage ([0068]-[0069]), then a fault has occurred ([0068]-[0069]).
Regarding dependent claim 9, Loder, teaches:
The circuit of claim 8 (Fig. 1; [0001], [0012]-[0019], & [0135]),
Loder, and Kapaun, are silent in regard to:
wherein:
the circuit further comprises a first operational amplifier configured to output a difference between the subsequent first rail voltage and the subsequent second rail voltage as a differential voltage; and the differential voltage is used in determining if a fault has occurred.
However, Stoica, further teaches:
wherein:
the circuit further comprises a first operational amplifier (Fig. 3A; [0007] & [0047]: discloses using an operational amplifier (i.e., common mode amplifier) in a diagnostic circuit, figure illustrates element 31 as an amplifier receiving inputs from VTop and VBot) configured to output a difference between the subsequent first rail voltage and the subsequent second rail voltage as a differential voltage ([0047]-[0048] & [0057]: discloses the amplifier takes the VTop and VBot voltages and outputs a differential signal (VDiff)); and the differential voltage is used in determining if a fault has occurred ([0038] & [0047]-[0048]: discloses comparing the differential voltage (VDiff) to a threshold to generate an error signal).
It would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the operational amplifier configuration of Stoica into the fault monitoring device of Loder, according to known methods. To allow for rapid, continuous-time analog fault detection, as taught by Stoica’s continuous time controller, prior to, or in parallel with, the digital processing performed by Loder’s controller. To provide a faster reaction time to high-level faults and reduce the computational load on the digital controller by providing a pre-calculated analog differential voltage representing the leakage/fault condition, yielding expected predictable results (KSR).
Regarding dependent claim 10, Loder, teaches:
The circuit of claim 9 (Fig. 1; [0001], [0012]-[0019], & [0135]), wherein:
Loder, and Kapaun, are silent in regard to:
the differential voltage is scaled by a threshold scaling component to determine a threshold voltage; and the threshold voltage is used in determining if a fault has occurred.
However, Stoica, further teaches:
the differential voltage is scaled by a threshold scaling component to determine a threshold voltage ([0049] & [0061]: teaches scaling (amplifying) the differential voltage (difference between inputs) by a gain factor (scaling factor) within a common mode amplifier or compensation controller to determine a voltage level (Vdiff) used for fault diagnosis, scales the differential signal (Vdiff) to determine the control voltage (threshold voltage) for the compensation loop or for the comparator input); and the threshold voltage is used in determining if a fault has occurred ([0048] & [0051]: uses the scaled differential voltage (Vdiff) referred to as the determined threshold voltage for decision making, to determine if a fault exists by comparing it against a reference, and the scaled differential voltage Vdiff is the value used in the determination step to trigger the error signal).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the fault detection logic of Loder/Kapaun with the signal processing techniques of Stoica (scaling/amplifying the differential voltage), according to known methods. To improve the sensitivity of the system to small “mid-level” faults and to enable the detection of faults before they become critical, yielding expected predictable results (KSR).
Regarding dependent claim 11, Loder, teaches:
The circuit of claim 10 (Fig. 1; [0001], [0012]-[0019], & [0135]),
Loder, and Kapaun, are silent in regard to:
further comprising:
a scaling component configured to scale the capacitor voltage by a capacitor scaling factor to determine a scaled capacitor voltage;
wherein the scaled capacitor voltage is used in determining if a fault has occurred.
However, Stoica, further teaches:
further comprising:
a scaling component ([0042], [0056]-[0057], [0063], & [0068]: discloses an amplifier which acts as a scaling component (applying gain/scaling to the input)) configured to scale the capacitor voltage by a capacitor scaling factor to determine a scaled capacitor voltage ([0042], [0047], & [0063]-[0064]: discloses the amplifier takes the voltage from the capacitor (VTop/CTop) and scales (amplifies) it to generate an output signal (VDiff or Vout));
wherein the scaled capacitor voltage is used in determining if a fault has occurred ([0048]-[0051], & [0065]: discloses comparing the scaled output (VDiff or Vout) to a threshold to determine if a fault (leakage) has occurred).
It would have been obvious to one of ordinary skill in the art before the effective filing date to integrate the scaling/amplification circuitry of Stoica into the fault monitoring of Loder, and applied to the measuring capacitors taught by Kapaun, according to known methods. Stoica provides a robust analog amplifier/scaling component that extracts small leakage signals (faults) from the capacitor voltages and scales them (amplifies the difference) for precise comparison. To improve the Signal-to-Noise Ratio (SNR) and ensuring that the small voltage signals across Kapaun’s measuring capacitor are robust to be accurately read by the controller or comparator for reliable fault determination, yielding expected predictable results (KSR).
Regarding dependent claim 12, Loder, teaches:
The circuit of claim 11 (Fig. 1; [0001], [0012]-[0019], & [0135]),
Loder, is silent in regard to:
wherein:
the circuit further comprises a second operational amplifier configured to output a voltage difference between the capacitor voltage or the scaled capacitor voltage and the subsequent first rail voltage,
the second operational amplifier output being defined as a measured voltage; and the measured voltage is used in determining if a fault has occurred.
However, Kapaun, further teaches:
wherein:
the circuit further comprises a second operational amplifier ([0046] &[0048]: discloses a current sensor (typically comprises an op-amp/differential amplifier for shunt reading) in the fault detection circuit, a POSITA would recognize that reading a shunt resistor on a rail requires a differential amplifier (op-amp) configuration) configured to output a voltage difference between the capacitor voltage or the scaled capacitor voltage and the subsequent first rail voltage (Fig. 1; [0046], [0048], & [0051]: discloses the sensor is connected in series between the rail and the capacitor, the voltage measured across the sensor (shunt) is the difference between the rail voltage and the capacitor voltage, figure shows element 44 (sensor) connected directly between rail 16 and capacitor 46, voltage drop across sensor 44 is ∆V = VRail -VCapacitor),
the second operational amplifier output being defined as a measured voltage ([0013]-[0014] & [0048]: discloses the sensor output a signal (measured voltage/current) indicative of the fault); and the measured voltage is used in determining if a fault has occurred ([0006], [0013]-[0014], [0022], & [0051]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to incorporate the second operational amplifier, implemented as the differential amplifier/comparator reading the shunt in Kapaun, into the circuit of Loder, according to known methods. Where, in order to implement the shunt resistor measurement taught by Kapaun on a high-voltage rail, as in Loder, a differential amplifier (op-amp) is a standard practice to extract the small voltage difference across the shunt (representing the difference between the rail voltage and the capacitor voltage) while rejecting the high common-mode voltage of the rail. Stoica further provides evidence where operational amplifiers are used to process analog difference signals to determine fault conditions, and the combination allows Loder’s system to detect small fault currents that would otherwise be missed, as Kapaun notes that his topology allows fault current to be acquired reliably even at high load currents, and yield expected predictable results (KSR).
Regarding dependent claim 13, Loder, teaches:
The circuit of claim 12 (Fig. 1; [0001], [0012]-[0019], & [0135]),
wherein, if the measured voltage is less than the threshold voltage, then the comparator is configured to output a first signal which corresponds to a fault having occurred ([0068]-[0069] & [0090]-[0091]: discloses the logic where a value falling below (less than) a threshold indicates a fault).
Loder, and Kapaun, are silent in regard to:
further comprising:
a comparator configured to compare the measured voltage against the threshold voltage to determine if a fault has occurred;
However, Stoica, further teaches:
further comprising:
a comparator ([0051]: discloses the comparator in the diagnosis circuit) configured to compare the measured voltage against the threshold voltage to determine if a fault has occurred ([0051]: discloses the comparator compares the signal (measured voltage) to a reference threshold);
It would have been obvious to one of ordinary skill in the art before the effective filing date to implement the comparison logic of Loder using the hardware, comparator, of Stoica, according to known methods. Where Loder describes performing comparisons via a controller, for safety-critical high-voltage systems, using a dedicated analog comparator, as taught by Stoica and Kapaun, is a standard engineering technique to provide faster, continuous-time fault detection without the latency or processing overhead of a digital controller. Further, the comparator can be configured (e.g., by swapping inverting/non-inverting inputs) to trigger when the measured voltage is less than the threshold, as taught by Loder’s fault detection logic, and yield expected predictable results (KSR).
Regarding dependent claim 14, Loder, teaches:
An insulation monitoring device (Fig. 1; [0001], [0012]-[0019], & [0135]) for an aircraft electrical system ([0012]-[0014]) comprising the circuit of claim 9 (Fig. 1; [0001], [0012]-[0019], & [0135]).
Regarding dependent claim 15, Loder, teaches:
An aircraft electrical system comprising (Fig. 1; [0001], [0012]-[0019], & [0135]):
the circuit of claim 9 (Fig. 1; [0001], [0012]-[0019], & [0135]); and a first rail and a second rail ([0014]), each rail having an insulation resistance ([0018]: discloses that the high-side rail has an insulation resistance RIH and the low-side rail has an insulation resistance RIL).
Claims 18-19 are rejected under 35 U.S.C. 103 as being unpatentable over Loder, in view of Kapaun , in view of Takamatsu, and further in view of Tsuchiya et al. (US 2017/0234918 A1, Pub. Date Aug. 17, 2017, hereinafter, Tsuchiya).
Regarding dependent claim 18, Loder, teaches:
The circuit of claim 8 (Fig. 1; [0001], [0012]-[0019], & [0135]), wherein:
Loder, Kapaun, and Takamatsu, are silent in regard to:
the circuit further comprises an operational amplifier configured to output a difference between the initial first rail voltage and an initial stage second rail voltage as a differential voltage; and the differential voltage is used in determining if a fault has occurred.
However, Loder, in combination with Tsuchiya, further teaches:
the circuit further comprises an operational amplifier configured to output a difference between the initial first rail voltage and an initial stage second rail voltage as a differential voltage (Loder: [0082]-[0085]: teaches the method/logic of calculating the difference between the first and second rail voltages within a stage; Tsuchiya: Fig. 1; [0031]-[0032]: provides the hardware structure, teaching an operational amplifier configured to output the difference (difference voltage) between the measurement signals of the two rails); and the differential voltage is used in determining if a fault has occurred (Loder: [0082]-[0085] & [0112]; Tsuchiya: [0031]-[0032]: confirms the hardware difference voltage is used to evaluate an abnormality in the system).
It would have been obvious to one of ordinary skill in the art before the effective filing date to implement the differential voltage calculation logic taught by Loder using the operational amplifier hardware taught by Tsuchiya, according to known methods. Modifying the Loder/Takamatsu circuit to include an operational amplifier configured as a difference amplifier is a predictable use of known analog hardware to achieve the mathematical subtraction required by Loder. The motivation would be to unburden the digital controller by performing the voltage subtraction in hardware prior to analog-to-digital conversion, yielding the predictable result (KSR) of generating a dedicated differential voltage signal for evaluating faults.
Regarding dependent claim 19, Loder, teaches:
The circuit of claim 8 (Fig. 1; [0001], [0012]-[0019], & [0135]), wherein:
Loder, and Kapaun, are silent in regard to:
the circuit further comprises an operational amplifier configured to output a difference between the initial first rail voltage and the subsequent second rail voltage as a differential voltage; and
the differential voltage is used in determining if a fault has occurred.
However, Loder, in combination with Takamatsu, and Tsuchiya, further teach:
the circuit further comprises an operational amplifier configured to output a difference between the initial first rail voltage and the subsequent second rail voltage as a differential voltage (Loder: [0082]-[0085]: teaches the logic of calculating a difference between an initial stage voltage and a subsequent stage voltage; Takamatsu: [0052]-[0053]: teaches the flying capacitor required to hold the initial first rail voltage as an analog value into the subsequent stage; Tsuchiya: Fig. 1; [0031]-[0032]: provides the operational amplifier hardware configured to output the difference (difference voltage) between two analog rail measurement signals); and
the differential voltage is used in determining if a fault has occurred (Loder: [0082]-[0085] & [0112]; Tsuchiya: [0031]-[0032]: both references teach utilizing the calculated differential voltage (the difference voltage) to evaluate the system for faults or abnormalities).
It would have been obvious to one of ordinary skill in the art before the effective filing date to implement the cross-stage differential voltage calculation logic taught by Loder using the flying capacitor of Takamatsu to hold the initial first rail voltage, and feeding that held voltage alongside the subsequent second rail voltage into the operational amplifier hardware taught by Tsuchiya, according to known methods. The motivation would be to unburden the digital controller by performing the cross-stage voltage subtraction in hardware using known analog components, yielding the predictable result (KSR) of generating a differential voltage signal for evaluating faults.
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Loder, in view of Kapaun , in view of Takamatsu, in view of Tsuchiya, and further in view of Schaefer et al. (US 2021/0165026 A1, Pub. Date Jun. 3, 2021, hereinafter, Schaefer).
Regarding dependent claim 20, Loder, teaches:
The circuit of claim 8 (Fig. 1; [0001], [0012]-[0019], & [0135]),
Loder, in combination with Kapaun, Takamatsu, and Tsuchiya, are silent in regard to:
wherein the isolation device comprises a differential isolating amplifier that is referenced to a different relative ground.
However, Schaefer, further teaches:
wherein the isolation device comprises a differential isolating amplifier (Fig. 3a; [0051]-[0053]: teaches upgrading a standard measurement amplifier in an insulation monitoring circuit to an isolating device, a differential amplifier circuit 34 that incorporates galvanic isolation 32 within it) that is referenced to a different relative ground ([Abstract], [0008], & [0050]-[0054]).
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the differential amplifier taught by Tsuchiya to be a differential isolating amplifier as taught by Schaefer, according to known methods. The motivation to do so would be to safely isolate the downstream digital evaluation controllers from the high common-mode voltages of the unearthed electrical bus, as suggested by Schaefer. This modification constitutes the application of a known technique (galvanic isolation within a differential amplifier) to a known device ( the differential rail measurement circuit) to yield the predictable and desired result (KSR) of obtaining isolated differential voltage measurement(s) referenced to a safe, different relative ground.
Loder, in combination with Kapaun, and Takamatsu, are silent in regard to:
configured to measure a differential voltage
However, Tsuchiya, in combination with Schaefer, further teach:
configured to measure a differential voltage (Tsuchiya: [0031]-[0032]: established using a differential amplifier to measure the difference between the two rail voltages; Schaefer: [0050]: confirms the standard use of differential amplifiers to capture differential voltage measurements)
It would have been obvious to one of ordinary skill in the art before the effective filing date to modify the differential amplifier taught by Tsuchiya to be a differential isolating amplifier as taught by Schaefer, according to known methods. The motivation to do so would be to safely isolate the downstream digital evaluation circuits from the high common-mode voltages of the unearthed electrical bus, yielding the predictable result (KSR) of obtaining isolated differential voltage measurement(s) referenced to a safe, different relative ground, such as the logic ground.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/HUGO NAVARRO/ Examiner, Art Unit 2858 May 12, 2026
/EMAN A ALKAFAWI/Supervisory Patent Examiner, Art Unit 2858 5/15/2026
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