DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-4 and 10-15 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee (US 2023/0146562).
Regarding claim 1, Lee discloses, in at least figures 1A, 3, and related text, an electronic device, comprising:
a flexible substrate (110, [60]);
a conductive pattern layer (171/115, [110], [115]) formed on the flexible substrate (110, [60]);
at least one transistor (300, [114]) formed on the flexible substrate (110, [60]) and electrically connected to the conductive pattern layer (171/115, [110], [115]);
wherein the least one transistors (300, [114]) includes an active layer (130, [113]), a source electrode (171/CH1, [110]) and a drain electrode (172/CH2, [110]) respectively electrically connected to the active layer (130, [113]), at least one gate electrode (152, [58]), and an insulation layer (142, [83]) disposed between the active layer (130, [113]) and the gate electrode (152, [58]), wherein the active layer (130, [113]) defines a channel portion (130n, [69]) and the channel portion (130n, [69]) defines a gated channel (130n, [69]) which is overlapped with the gate electrode (152, [58]) in a projection direction perpendicular to the flexible substrate (110, [60]), and the channel portion (130n, [69]) defines a first direction (horizontal direction, figures) which is a direction a current flowing between the drain electrode (172/CH2, [110]) and the source electrode (171/CH1, [110]), and wherein the gated channel (130n, [69]) defines a plurality of edges coherent to the first direction (horizontal direction, figures); and
at least one guarding portion (151, [63]) arranged under the at least one transistor (300, [114]), wherein the at least one guarding portion (151, [63]) overlaps at least one of the edges of the gated channel (130n, [69]) in the projection direction perpendicular to the flexible substrate (110, [60]);
wherein a Young’s modulus of the flexible substrate (110, [60]) is less than a Young’s modulus of the guarding portions (151, [63]).
Regarding claim 2, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, the at least one guarding portion (151, [63]) is electrically insulated from the conductive pattern layer (171/115, [110], [115]).
Regarding claim 3, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, the at least one guarding portion (151, [63]) is electrically insulated from the at least one transistor (300, [114]).
Regarding claim 4, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, the at least one guarding portion (151, [63]) is disposed on the flexible substrate (110, [60]).
Regarding claim 10, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, the at least one transistor (300, [114]) is a thin film transistor.
Regarding claim 11, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, the at least one transistor (300, [114]) comprises a single-gate transistor or a multi-gate transistor ([58]).
Regarding claim 12, Lee discloses the electronic device as claimed in claim 11 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, the multi-gate transistor comprises a double-gate transistor ([58]), or a triple-gate transistor.
Regarding claim 13, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, the at least one transistor (300, [114]) is a top-gate transistor ([58]) or a bottom-gate transistor ([58]).
Regarding claim 14, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, the channel portion (130n, [69]) of the at least one transistor (300, [114]) further defines a second direction (II-II’ direction, figures) perpendicular to the first direction (I-I’ direction, figures), and the channel portion (130n, [69]) defines a width along the second direction (II-II’ direction, figures) in which the width is a fixed-width (figures).
Regarding claim 15, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee further discloses, in at least figures 1A, 3, and related text, an outermost contour of the at least one guarding portion (151, [63]) is square, polygon (figures), circle, or ellipse.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 5-8 and 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2023/0146562) in view of Huang (US 2021/0057461).
Regarding claim 5, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee does not explicitly disclose the at least one guarding portion is arranged under the flexible substrate.
Huang teaches, in at least figure 16 and related text, the device comprising the at least one guarding portion (140, [37]) is arranged under the flexible substrate (150, [39]), for the purpose of providing light-shielding layer for TFT on flexible substrate ([74]).
Lee and Huang are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lee with the specified features of Huang because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lee to have the at least one guarding portion being arranged under the flexible substrate, as taught by Huang, for the purpose of providing light-shielding layer for TFT on flexible substrate ([74], Huang).
Regarding claim 6, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee does not explicitly disclose the at least one guarding portion is integrated with the flexible substrate.
Huang teaches, in at least figure 16 and related text, the device comprising the at least one guarding portion (140, [37]) is integrated with the flexible substrate (150, [39]), for the purpose of providing light-shielding layer for TFT on flexible substrate ([74]).
Lee and Huang are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lee with the specified features of Huang because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lee to have the at least one guarding portion being integrated with the flexible substrate, as taught by Huang, for the purpose of providing light-shielding layer for TFT on flexible substrate ([74], Huang).
Regarding claim 7, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee does not explicitly disclose a support board stacked under the flexible substrate, wherein a Young’s modulus of the support board is less than the Young’s modulus of the at least one the guarding portion.
Huang teaches, in at least figure 16 and related text, the device comprising a support board (130, [36]) stacked under the flexible substrate (150, [39]), wherein a Young’s modulus of the support board (130, [36]) is less than the Young’s modulus of the at least one the guarding portion (140, [37]), for the purpose of providing light-shielding layer for TFT on flexible substrate ([74]).
Lee and Huang are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lee with the specified features of Huang because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lee to have the support board stacked under the flexible substrate, wherein a Young’s modulus of the support board is less than the Young’s modulus of the at least one the guarding portion, as taught by Huang, for the purpose of providing light-shielding layer for TFT on flexible substrate ([74], Huang).
Regarding claim 8, Lee in view of Huang discloses the electronic device as claimed in claim 7 as described above.
Huang further teaches, in at least figure 16 and related text, the at least one guarding portion (140, [37]) is disposed either on the flexible substrate (150, [39]) or on the support board (130, [36]), for the purpose of providing light-shielding layer for TFT on flexible substrate ([74]).
Regarding claim 16, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee does not explicitly disclose the at least one guarding portion is a porous structure, a honeycomb-like structure, a mesh, or a grille-like structure.
Huang teaches, in at least figures 15A, 16, and related text, the device comprising the at least one guarding portion (140, [37]) is a porous structure, a honeycomb-like structure, a mesh, or a grille-like structure (figures), for the purpose of providing light-shielding layer for TFT on flexible substrate ([74]).
Lee and Huang are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lee with the specified features of Huang because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lee to have the at least one guarding portion being a porous structure, a honeycomb-like structure, a mesh, or a grille-like structure, as taught by Huang, for the purpose of providing light-shielding layer for TFT on flexible substrate ([74], Huang).
Claim(s) 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2023/0146562) in view of Yamazaki (US 2017/0338315).
Regarding claim 17, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee does not explicitly disclose the at least one guarding portion fully overlaps with the gated channel of the channel portion in the projection direction perpendicular to the flexible substrate.
Yamazaki teaches, in at least figures 4A, 4B, and related text, the device comprising the at least one guarding portion (106, [177]) fully overlaps with the gated channel (108, [177]) of the channel portion in the projection direction perpendicular to the flexible substrate (102, [133]), for the purpose of providing a highly reliable semiconductor device ([10]).
Lee and Yamazaki are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lee with the specified features of Yamazaki because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lee to have the at least one guarding portion fully overlapping with the gated channel of the channel portion in the projection direction perpendicular to the flexible substrate, as taught by Yamazaki, for the purpose of providing a highly reliable semiconductor device ([10], Yamazaki).
Claim(s) 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2023/0146562) in view of Koide (US 2004/0239825).
Regarding claim 18, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee does not explicitly disclose a plurality of the transistors and a plurality of the guarding portions, wherein the at least one of the plurality of the guarding portions overlaps with the gated channels of at least two of the transistors in the projection direction perpendicular to the flexible substrate.
Koide teaches, in at least figures 2-4 and related text, the device comprising a plurality of the transistors (30, [50]) and a plurality of the guarding portions (15, [56]), wherein the at least one of the plurality of the guarding portions (15, [56]) overlaps with the gated channels (1a, [57]) of at least two of the transistors (30, [50]) in the projection direction perpendicular to the flexible substrate (10a, [56]), for the purpose of providing a liquid crystal device capable of reduced leakage current of a thin-film transistor to an extremely low level ([10]).
Lee and Koide are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lee with the specified features of Koide because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lee to have the plurality of the transistors and the plurality of the guarding portions, wherein the at least one of the plurality of the guarding portions overlaps with the gated channels of at least two of the transistors in the projection direction perpendicular to the flexible substrate, as taught by Koide, for the purpose of providing a liquid crystal device capable of reduced leakage current of a thin-film transistor to an extremely low level ([10], Koide).
Claim(s) 19-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Lee (US 2023/0146562) in view of Bibl (US 8,928,021).
Regarding claim 19, Lee discloses the electronic device as claimed in claim 1 as described above.
Lee does not explicitly disclose a plurality of lighting members individually from each other and disposed directly on the flexible substrate, and the lighting members are electrically connected to the conductive pattern layer.
Bibl teaches, in at least figures 8A, 8B, and related text, the device comprising a plurality of lighting members (100, col. 18/ lines 3-53) individually from each other and disposed directly on the flexible substrate (201, col. 18/ lines 3-53), and the lighting members (100, col. 18/ lines 3-53) are electrically connected to the conductive pattern layer (310, col. 18/ lines 3-53), for the purpose of providing micro LED devices to combine the performance, efficiency, and reliability of wafer-based LED devices with the high yield, low cost, mixed materials of thin film electronics, for both lighting and display applications (col. 5/ lines 45-50).
Lee and Bibl are analogous art because they both are directed to semiconductor device and one of ordinary skill in the art would have had a reasonable expectation of success to modify Lee with the specified features of Bibl because they are from the same field of endeavor.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to have modified the structure disclosed in Lee to have the plurality of lighting members individually from each other and disposed directly on the flexible substrate, and the lighting members being electrically connected to the conductive pattern layer, as taught by Bibl, for the purpose of providing micro LED devices to combine the performance, efficiency, and reliability of wafer-based LED devices with the high yield, low cost, mixed materials of thin film electronics, for both lighting and display applications (Bibl, col. 5/ lines 45-50).
Regarding claim 20, Lee in view of Bibl discloses the electronic device as claimed in claim 19 as described above.
Bibl further teaches, in at least figures 8A, 8B, and related text, one or ones of the lighting members (100, col. 18/ lines 3-53) are driven by the at least one transistor (100, col. 18/ lines 3-53), for the purpose of providing micro LED devices to combine the performance, efficiency, and reliability of wafer-based LED devices with the high yield, low cost, mixed materials of thin film electronics, for both lighting and display applications (col. 5/ lines 45-50).
Allowable Subject Matter
Claim 9 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims because the prior art of record neither anticipates nor render obvious the limitations of the base claims 1, 7, and 9 that recite "the at least one guarding portion is integrated with the support board" in combination with other elements of the base claims 1, 7, and 9.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to TONG-HO KIM whose telephone number is (571)270-0276. The examiner can normally be reached Monday thru Friday; 8:30 AM to 5PM.
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/TONG-HO KIM/Primary Examiner, Art Unit 2811
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