DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I and Species 2 in the reply filed on 7/21/26 is acknowledged.
Based on Applicant’s clarification regarding claim 7 in the Remarks (pp 6-7), Examiner now considers claim 7 as part of the elected invention (I) and species (2). Claims 1-11 and 15-20 are pending in this application. Claims 12-14 are withdrawn.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the 2D buffer layer grown in stacks along a direction perpendicular to the plane where the substrate is located (subject matter of claim 8) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-11 and 15-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, the term “close” in line 4 is a relative term which renders the claim indefinite. The term “close” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For the purposes of examination, the examiner interprets “close” as - - closer - -. However, appropriate correction and/or clarification is requested. Claims 2-10 inherit the 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, rejections based on their dependencies on claim 1.
Regarding claim 11, the term “close” in line 5 is a relative term which renders the claim indefinite. The term “close” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For the purposes of examination, the examiner interprets “close” as - - closer - -. However, appropriate correction and/or clarification is requested.
Regarding claim 15, the term “close” in line 5 is a relative term which renders the claim indefinite. The term “close” is not defined by the claim, the specification does not provide a standard for ascertaining the requisite degree, and one of ordinary skill in the art would not be reasonably apprised of the scope of the invention. For the purposes of examination, the examiner interprets “close” as - - closer - -. However, appropriate correction and/or clarification is requested. Claims 16-20 inherit the 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, rejections based on their dependencies on claim 15.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 7, and 9-11 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Dong (CN 207925476(U); published 9/28/18; reference to English translation).
Regarding claim 1, Dong discloses an epitaxial structure of a semiconductor device, comprising:
A substrate (6, Fig. 1) ([0029]);
A nucleation layer (1, Fig. 1) located at a side of the substrate (6, Fig. 1), the nucleation layer (1, Fig. 1) comprising a plurality of nucleation units (1, Fig. 1), surfaces, closer to the substrate, of the plurality of nucleation units being communicated with each other, and surfaces, away from the substrate, of the plurality of nucleation units being separated from each other ([0029]); and
A buffer layer (2, Fig. 1) located at a side, away from the substrate, of the nucleation layer, the buffer layer comprising a three-dimensional (3D) buffer layer (2, Fig. 1), and the 3D buffer layer being formed on a surface, away from the substrate, of the nucleation layer ([0029]).
Regarding claim 7, Dong discloses the 3D buffer layer (2, Fig. 1) is grown directly along a direction perpendicular to a plane where the substrate (6, Fig. 1) is located.
Regarding claim 9, Dong discloses a nucleation unit (1, Fig. 1) is island-shaped ([0031]).
Regarding claim 10, Dong discloses a material of the substrate (6, Fig. 1) is silicon carbide ([0029]).
Regarding claim 11, Dong discloses a method comprising:
Providing a substrate (6, Fig. 1) ([0029]);
Forming a nucleation layer (1, Fig. 1) on a side of the substrate (6, Fig. 1), the nucleation layer (1, Fig. 1) comprising a plurality of nucleation units (1, Fig. 1), surfaces, closer to the substrate (6, Fig. 1), of the plurality of nucleation units (1, Fig. 1) being communicated with each other, and surfaces, away from the substrate, of the plurality of nucleation units being separated from each other; and
Forming a buffer layer (2, Fig. 1) on a side, away from the substrate, of the nucleation layer, the buffer layer comprising a 3D buffer layer (2, Fig. 1), and the 3D buffer layer being formed on a surface, away from the substrate, of the nucleation layer ([0029]).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 2-3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dong (CN 207925476(U); published 9/28/18; reference to English translation) as applied to claim 1 above, and further in view of Kim et al. (KR 20090016051; published 2/13/09; references to English translation; “Kim”).
Regarding claim 2, Dong discloses at least a nucleation unit (1, Fig. 1) with a cross-section perpendicular to a plane of the substrate (6, Fig. 1) ([0029]) but does not disclose the shape of the cross-section is a trapezoid. However, Kim discloses a nucleation unit (215, Fig. 6-7) having a cross-section which is in the shape of a trapezoid. This has the advantage of promoting growth of an overlying compound semiconductor (pp 11-12). Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Dong with a shape of the cross-section of at least a nucleation unit to be a trapezoid, as taught by Kim, so as to promote growth of an overlying layer.
Regarding claim 3, Dong and Kim disclose the first cross-section of at least a nucleation unit is a trapezoid (see claim 2 rejection above) but do not disclose the specific relationship between the edges, wherein a length of the first edge is P1, a length of the second edge is P2, where 1<P2/P1 ≤ 3; and, along the direction perpendicular to the plane where the substrate is located, a distance between the first edge and the second edge is T1, where 10 nm ≤ T1 ≤ 100 nm. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a relationship between edges of the cross-section of a nucleation unit to be 1<P2/P1 ≤ 3; and, along the direction perpendicular to the plane where the substrate is located, a distance between the first edge and the second edge is T1, where 10 nm ≤ T1 ≤ 100 nm, wherein a length of the first edge is P1 and a length of the second edge is P2, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Claim(s) 4-6 and 8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dong (CN 207925476(U); published 9/28/18; reference to English translation) as applied to claim 1 above, and further in view of Schultz et al. (U.S. 2018/0286954 A1; “Schultz”).
Regarding claim 4, Dong discloses the buffer layer (2, Fig. 1) comprises a three-dimensional (3D) buffer layer (2, Fig. 1) ([0029]) but does not disclose the buffer layer further comprises a two-dimensional (2D) buffer layer. However, Schultz discloses a buffer layer comprises a three-dimensional (3D) buffer layer and a two-dimensional (2D) buffer layer, and the 2D buffer layer is located at a side, away from a nucleation layer, of the 3D buffer layer ([0037]). This has the advantage of reducing defects in a subsequently formed compound semiconductor layer. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Dong with the buffer layer comprising a 2D buffer layer, as taught by Schultz, so as to improve the quality of a subsequently formed compound semiconductor layer.
Regarding claim 5, Dong and Schultz disclose the buffer layer comprises a 3D buffer layer and a 2D buffer layer (see claim 4 rejection above) but do not disclose when the thickness of the 3D buffer is T2 and a thickness of the 2D buffer is T3, ¼ ≤T2/(T2+T3)≤ ½. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a thickness of the 3D buffer (T2) and a thickness of the 2D buffer (T3) to follow the condition of ¼ ≤T2/(T2+T3)≤ ½, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 6, Dong and Schultz disclose the buffer layer comprises a 3D buffer layer and a 2D buffer layer (see claim 4 rejection above) but do not disclose when the thickness of the 3D buffer is T2 and a thickness of the 2D buffer is T3, 0.1 µm ≤ T2+T3 ≤ 10 µm. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a thickness of the 3D buffer (T2) and a thickness of the 2D buffer (T3) to follow the condition of 0.1 µm ≤ T2+T3 ≤ 10 µm, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 8, Dong and Schultz disclose the 2D buffer layer is first grown (first layer, Fig. 3) in 2D along a direction parallel to a plane where the substrate is located to form a planar thin film, and then is grown in stacks (third layer, Mth layer, Fig. 3) along a direction perpendicular to the plane where the substrate is located ([0038]-[0039]).
Claim(s) 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dong (CN 207925476(U); published 9/28/18; reference to English translation) in view of Ren et al. (U.S. 2017/0294528 A; “Ren”).
Regarding claim 15, Dong discloses an epitaxial structure of a semiconductor device, comprising:
A substrate (6, Fig. 1) ([0029]);
A nucleation layer (1, Fig. 1) located at a side of the substrate (6, Fig. 1), the nucleation layer (1, Fig. 1) comprising a plurality of nucleation units (1, Fig. 1), surfaces, closer to the substrate, of the plurality of nucleation units being communicated with each other, and surfaces, away from the substrate, of the plurality of nucleation units being separated from each other ([0029]); and
A buffer layer (2, Fig. 1) located at a side, away from the substrate, of the nucleation layer, the buffer layer comprising a three-dimensional (3D) buffer layer (2, Fig. 1), and the 3D buffer layer being formed on a surface, away from the substrate, of the nucleation layer ([0029]).
Yet, Dong does not disclose the semiconductor device further comprises a heterojunction structure located at a side, away from the substrate, of the epitaxial structure, and a gate, a source and a drain located at a side, away from the substrate, of the heterojunction structure, and the gate is located between the source and the drain. However, Ren discloses a semiconductor device further comprises a heterojunction structure located at a side, away from a substrate (13, Fig. 2), and a gate (4, Fig. 2), a source (3, Fig. 2) and a drain (5, Fig. 2) located at a side, away from the substrate, of the heterojunction structure, and the gate (4, Fig. 2) is located between the source (3, Fig. 2) and the drain (5, Fig. 2) ([0033], [0035]). This has the advantage of forming a HEMT device. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Dong with a heterojunction structure, a gate, a source, and a drain, as taught by Ren, so as to more fully form a HEMT device.
Claim(s) 16-17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dong (CN 207925476(U); published 9/28/18; reference to English translation) as modified by Ren et al. (U.S. 2017/0294528 A; “Ren”) as applied to claim 15 above, and further in view of Kim et al. (KR 20090016051; published 2/13/09; references to English translation; “Kim”).
Regarding claim 16, Dong and Ren disclose at least a nucleation unit (Dong: 1, Fig. 1) with a cross-section perpendicular to a plane of the substrate (Dong: 6, Fig. 1) (Dong: [0029]) but do not disclose the shape of the cross-section is a trapezoid. However, Kim discloses a nucleation unit (215, Fig. 6-7) having a cross-section which is in the shape of a trapezoid. This has the advantage of promoting growth of an overlying compound semiconductor (pp 11-12). Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Dong as modified by Ren with a shape of the cross-section of at least a nucleation unit to be a trapezoid, as taught by Kim, so as to promote growth of an overlying layer.
Regarding claim 17, Dong, Ren, and Kim disclose the first cross-section of at least a nucleation unit is a trapezoid (see claim 16 rejection above) but do not disclose the specific relationship between the edges, wherein a length of the first edge is P1, a length of the second edge is P2, where 1<P2/P1 ≤ 3; and, along the direction perpendicular to the plane where the substrate is located, a distance between the first edge and the second edge is T1, where 10 nm ≤ T1 ≤ 100 nm. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a relationship between edges of the cross-section of a nucleation unit to be 1<P2/P1 ≤ 3; and, along the direction perpendicular to the plane where the substrate is located, a distance between the first edge and the second edge is T1, where 10 nm ≤ T1 ≤ 100 nm, wherein a length of the first edge is P1 and a length of the second edge is P2, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Claim(s) 18-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Dong (CN 207925476(U); published 9/28/18; reference to English translation) as modified by Ren et al. (U.S. 2017/0294528 A; “Ren”) as applied to claim 15 above, and further in view of Schultz et al. (U.S. 2018/0286954 A1; “Schultz”).
Regarding claim 18, Dong and Ren disclose the buffer layer (Dong: 2, Fig. 1) comprises a three-dimensional (3D) buffer layer (Dong: 2, Fig. 1) (Dong: [0029]) but do not disclose the buffer layer further comprises a two-dimensional (2D) buffer layer. However, Schultz discloses a buffer layer comprises a three-dimensional (3D) buffer layer and a two-dimensional (2D) buffer layer, and the 2D buffer layer is located at a side, away from the nucleation layer, of the 3D buffer layer ([0037]). This has the advantage of reducing defects in a subsequently formed compound semiconductor layer. Therefore, it would have been obvious to one having ordinary skill in the art at the time the invention was effectively filed to modify the invention of Dong and Ren with the buffer layer comprising a 2D buffer layer, as taught by Schultz, so as to improve the quality of a subsequently formed compound semiconductor layer.
Regarding claim 19, Dong, Ren, and Schultz disclose the buffer layer comprises a 3D buffer layer and a 2D buffer layer (see claim 18 rejection above) but do not disclose when the thickness of the 3D buffer is T2 and a thickness of the 2D buffer is T3, ¼ ≤T2/(T2+T3)≤ ½. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a thickness of the 3D buffer (T2) and a thickness of the 2D buffer (T3) to follow the condition of ¼ ≤T2/(T2+T3)≤ ½, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Regarding claim 20, Dong, Ren, and Schultz disclose the buffer layer comprises a 3D buffer layer and a 2D buffer layer (see claim 18 rejection above) but do not disclose when the thickness of the 3D buffer is T2 and a thickness of the 2D buffer is T3, 0.1 µm ≤ T2+T3 ≤ 10 µm. However, it would have been obvious to one having ordinary skill in the art at the time the invention was made to select a thickness of the 3D buffer (T2) and a thickness of the 2D buffer (T3) to follow the condition of 0.1 µm ≤ T2+T3 ≤ 10 µm, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233.
Conclusion
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/REEMA PATEL/Primary Examiner, Art Unit 2812 9/16/2026
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