Prosecution Insights
Last updated: October 04, 2026
Application No. 18/740,316

FIELD EFFECT TRANSISTOR, DEVICE INCLUDING THE TRANSISTOR, AND METHODS OF FORMING AND USING SAME

Non-Final OA §102§103§112
Filed
Jun 11, 2024
Priority
Apr 09, 2012 — provisional 61/621,966 +6 more
Examiner
BODNAR, JOHN A
Art Unit
Tech Center
Assignee
INANOBIO, INC.
OA Round
1 (Non-Final)
83%
Grant Probability
Favorable
1-2
OA Rounds
3m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 83% — above average
83%
Career Allowance Rate
496 granted / 596 resolved
+23.2% vs TC avg
Moderate +12% lift
Without
With
+11.9%
Interview Lift
resolved cases with interview
Typical timeline
2y 7m
Avg Prosecution
27 currently pending
Career history
622
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
48.7%
+8.7% vs TC avg
§102
22.2%
-17.8% vs TC avg
§112
25.6%
-14.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 596 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION This application, 18/740316 attorney docket AD9667-US, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . The applicant or assignee is iNanoBio Inc. The instant application is a child of 14391661, now U.S. Patent # 9341592, which is a National Stage entry of PCT/US2013/035852 which claims Priority from Provisional Application 61621966, filed 04/09/2012, and from Provisional Application 61802235, filed 03/15/2013. Claims 1-12 are pending and are considered below. Note that examiner will use numbers in parentheses to indicate numbered elements in prior art figures, and brackets to point to paragraph numbers where quoted material or specific teachings can be found. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-8 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites the limitation " overlying the buried insulating region ". There is insufficient antecedent basis for this limitation in the claim. Dependent claims include the defect of the parent Claim 8 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 8 recites, “wherein the channel is formed as a bi-feature” The disclosure does not teach a meaning of bi-feature, and a definition was not found in the art. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of pre-AIA 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a) the invention was known or used by others in this country, or patented or described in a printed publication in this or a foreign country, before the invention thereof by the applicant for a patent. (b) the invention was patented or described in a printed publication in this or a foreign country or in public use or on sale in this country, more than one year prior to the date of application for patent in the United States. Claims 1-4, 6-9 and 11-12 are rejected under pre-AIA 35 U.S.C. 102a/b as being anticipated by Leiber et al. U.S. 2010/0327847. As for claim 1, Lieber teaches in figures 3b and 4 a device comprising: a substrate (30); an etch region (20) within a portion of the substrate; an insulating region (34) proximate the etch region; a semiconductor layer (44/40/42) overlying the insulating region; a source region (S) formed using a first portion of the semiconductor layer, the source region overlying the insulating region and overlying a first surface of the substrate; a drain region (D) formed using a second portion of the semiconductor layer, the drain region overlying the buried insulating region and overlying a second surface of the substrate; and a channel (44) formed using a third portion of the semiconductor layer, wherein the device comprises a nanopore. As for claim 2, Lieber teaches the device of claim 1, wherein the insulating region comprises a buried oxide ([0043]). As for claim 3, Lieber teaches the device of claim 1, further comprising a thin-film coating (48) comprising one or more of dielectric, organic, inorganic, and biological material. (SiN, [0049]) As for claim 4, Lieber teaches the device of claim 1, wherein the etch region comprises a conical or pyramidal or spherical shape. (conical, fig 1). As for claim 6, Lieber teaches the device of claim 1, and teaches the channel is continuous from the source region to the drain region. As for claim 7, Lieber teaches the device of claim 1, and teaches the channel is formed as a bi-feature having an opening of less than 1000 nm. (1.5-2 nm for ssDNA sensing [0055]) As for claim 8, Lieber teaches the device of claim 1, wherein the channel is formed as a bi-feature having an opening of less than 10 nm. (1.5-2 nm for ssDNA sensing [0055]). As for claim 9, Lieber teaches a method of forming a sensor device, the method comprising the steps of: providing a substrate (30); etching a portion of the substrate to form an etch region open to a first surface and a second surface to thereby form a nanopore (fig 3f); forming an insulating region (52) proximate the etch region; forming a thin film (graphene 36/40/42) overlying the insulating region; forming a source region (S) using the thin film on one side of the nanopore; and forming a drain region (D) using the thin film on a second side of the nanopore (formed by e-beam lithography [0047]), wherein a channel region is formed between the source region and the drain region. (fig 3B). As for claim 11, Lieber teaches the method of claim 9, wherein the thin film is formed using a technique selected from the group consisting of: molecular beam epitaxy and chemical vapor deposition. (CVD, 0047]). As for claim 12, Lieber teaches the method of claim 9, and teaches the thin film comprises one or more of: crystalline material, poly-crystalline material, amorphous material, a metal, and an insulator. (graphene is crystalline) Claim Rejections - 35 USC § 103 The following is a quotation of pre-AIA 35 U.S.C. 103(a) which forms the basis for all obviousness rejections set forth in this Office action: (a) A patent may not be obtained though the invention is not identically disclosed or described as set forth in section 102, if the differences between the subject matter sought to be patented and the prior art are such that the subject matter as a whole would have been obvious at the time the invention was made to a person having ordinary skill in the art to which said subject matter pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 5 is rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Lieber. As for claim 5, Lieber teaches the device of claim 1 but is silent on the operating frequency. However, “the device is operated at frequencies of: kilo hertz, megahertz, or giga hertz” is an intended use of the device, and the device of Leiber is not precluded from operating at any frequency. It has been held that a recitation with respect to the manner in which a claimed apparatus is intended to be employed does not differentiate the claimed apparatus from a prior art apparatus satisfying the claimed structural limitations. Ex Parte Masham, 2 USPQ F.2d 1647 (1987). Here the claim does not limit the structure of the device. Claim 10 is rejected under pre-AIA 35 U.S.C. 103(a) as being unpatentable over Lieber in view of Zeng et al (Zeng, A. S., Zheng, M. J., Ma, L., & Shen, W. Z. (2006). “Formation of uniform and square nanopore arrays on (100) InP surfaces by a two-step etching method.” Nanotechnology, 17(16), 4163-4167.) As for claim 10, Lieber teaches the method of claim 9, but does not teach the etching is along a crystalline plane of the substrate. However, Zeng teaches etching a nanopore along the 011 crystalline plane (abstract) It would have been obvious to one skilled in the art at the effective filing date of this application etch along the crystalline plane to reduce side branching and produce more uniform sidewalls. Zeng [introduction] One skilled in the art would have combined these elements with a reasonable expectation of success. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN A BODNAR whose telephone number is (571)272-4660. The examiner can normally be reached M-Th and every other Friday 7:30-5:30 Central time. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Yara Green can be reached at 571-270-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN A BODNAR/Primary Examiner, Art Unit 2893
Read full office action

Prosecution Timeline

Jun 11, 2024
Application Filed
Sep 22, 2026
Non-Final Rejection mailed — §102, §103, §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
83%
Grant Probability
95%
With Interview (+11.9%)
2y 7m (~3m remaining)
Median Time to Grant
Low
PTA Risk
Based on 596 resolved cases by this examiner. Grant probability derived from career allowance rate.

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