DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-3, 5, and 7-8 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kwon et al. (US 20150243720 A1, hereinafter Kwon)
With regards to claim 1, Kwon discloses a display device (FIGS. 1-6A) comprising:
a first TFT implemented as a Low-Temperature Polycrystalline Silicon (LTPS) TFT; (LTPS TFT, see FIG. 6A)
a second TFT implemented as an oxide TFT (oxide TFT, see FIG. 6A) stacked on the LTPS TFT; (see FIG. 6A, where the oxide TFT is stacked on the LTPS TFTF from left to right of the figure) and
a light emitting device (pixel circuit/OLED) formed next to a structure in which the first TFT and the second TFT are stacked, (See FIG. 1 and 2a)
wherein one electrode of the first TFT is connected to a gate of the second TFT, and one electrode of the second TFT is connected to the light emitting device. (See FIGS. 1, 2A, and 6A, showing the connections between the first TFT, the second TFT, and the OLED)
With regards to claim 2, Kwon discloses the display device of claim 1, wherein: the second TFT includes:
a first active layer (active layer 610) formed on a substrate; (substrate 602)
a first insulation layer (insulation layer 612) formed on the first active layer;
a first gate electrode (metal layer 614) formed on the first insulation layer;
a second insulation layer (insulation layer 616) formed on the first insulation layer and the first gate electrode;
a first electrode layer (left electrode layer 618) connected to any one of a source region and a drain region of the first active layer through a first via electrode formed to penetrate the first insulation layer and the second insulation layer and formed on the second insulation layer; and
a second electrode layer (right electrode layer 618) connected to the other of the source region and the drain region of the first active layer through a second via electrode formed to penetrate the first insulation layer and the second insulation layer and formed on the second insulation layer, and the first electrode layer is electrically connected to the light emitting device. (See FIGS. 1, 2A, and 6A, showing the connections)
With regards to claim 3, Kwon discloses the display device of claim 2, wherein: the first TFT includes:
a third insulation layer (insulation layer 604) formed on the first electrode layer and the second electrode layer;
a second active layer (poly-si active layer 608) formed on the third insulation layer;
a third electrode layer (right metal 614) formed on any one of a source region and a drain region of the second active layer;
a fourth electrode layer (left metal 614) formed on the other of the source region and the drain region of the second active layer;
a fourth insulation layer (insulation layer 616) formed on the third insulation layer, the third electrode layer, and the fourth electrode layer; and
a second gate electrode (metal oxide 610, see Paragraph [0080) formed on the fourth insulation layer to overlap the second active layer in a vertical direction, and the third electrode layer is electrically connected to the first gate electrode. (See FIG. 6A)
With regards to claim 5, Kwon discloses the display device of claim 3, further comprising:
a fifth insulation layer (dielectric 620) formed on the fourth insulation layer and the second gate electrode; and
a sixth electrode layer and a seventh electrode layer (electrodes 618 and 622) formed on the fourth insulation layer, wherein the light emitting device includes an anode connected to the sixth electrode layer and a cathode connected to the seventh electrode layer. (Paragraphs [0086]-[0090]: “Accordingly, the second metal layer 618 may serves as a signal line…By way of an example, the LTPS TFT shown in FIG. 6A may be a driving TFT in a pixel circuit, and the third metal layer 622 may serve as an anode of an OLED element.”)
With regards to claim 7, Kwon discloses the display device of claim 1, wherein: the light emitting device is a micro LED. (OLED, see FIG. 2A)
With regards to claim 8, Kwon discloses a method of manufacturing a display device, (FIGS. 1-6A) the method comprising:
forming a first TFT, which is an LTPS TFT, ; (LTPS TFT, see FIG. 6A) on a substrate; (substrate 602)
forming a second TFT, which is an Oxide TFT, ; (oxide TFT, see FIG. 6A) on the first TFT; and
forming a light emitting device (OLED) next to a structure in which the first TFT and the second TFT are stacked, wherein one electrode of the second TFT is connected to a gate of the first TFT, and one electrode of the first TFT is connected to the light emitting device. (See FIGS. 1, 2A, and 6A, showing the connections)
Allowable Subject Matter
Claims 4 and 6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Im (US 20150179679 A1) – two TFTs on the same substrate
Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEVEN M Page whose telephone number is (571)272-3249. The examiner can normally be reached M-F: 10:00AM-6:00PM.
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/STEVEN M PAGE/Primary Patent Examiner, Art Unit 2812
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