Prosecution Insights
Last updated: October 01, 2026
Application No. 18/741,066

METHOD AND TESTING SYSTEM FOR TESTING SEMICONDUCTOR CHIP PACKAGES

Non-Final OA §103
Filed
Jun 12, 2024
Priority
May 28, 2024 — continuation of PCTCN2024095740
Examiner
RAJAPUTRA, SURESH KS
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Yangtze Memory Technologies Co., Ltd.
OA Round
3 (Non-Final)
84%
Grant Probability
Favorable
3-4
OA Rounds
1m
Est. Remaining
97%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allowance Rate
404 granted / 483 resolved
+15.6% vs TC avg
Moderate +13% lift
Without
With
+13.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
19 currently pending
Career history
502
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
55.0%
+15.0% vs TC avg
§102
26.8%
-13.2% vs TC avg
§112
12.6%
-27.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 483 resolved cases

Office Action

§103
Notice of Pre-AIA or AIA Status 1. The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Detailed Action 2. This office action is in response to the filing with the office dated 09/08/2026. Request for Continued Examination 3. A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 09/08/2026 has been entered. Reply to Applicant’s arguments 4. Applicant’s arguments and claim amendments field with the office on 08/19/2026 were fully considered and found to be non-persuasive. Applicant’s arguments are directed to amended claim limitations. Please the rejection below for 1-20 rejected under 35 U.S.C. 103 as being unpatentable over Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and in further view of Mardi et al (US 20190128956 A1). Hence Applicant’s arguments regarding amended claims with respect to the previously cited Johnson et al (US 2014/0055156 A1) reference are moot. Claim Rejections – 35 U.S.C. 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. 5. Claims 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and in further view of Mardi et al (US 20190128956 A1). Regarding independent claim 1, Shao et al (US 20120092033 A1) teaches, A method performed by a testing system for testing a semiconductor chip package (figures 1-6, paragraphs [0011][0013], [0022]-[0024], the method taught by Shao et al is applicable to packaged and unpackaged semiconductor devices since it involves applying mechanical force to a device studying its electrical characteristics), the method comprising: fixing, by a mechanical testing sub-system of the testing system, the semiconductor chip package within the mechanical testing sub-system, such that the semiconductor chip package is aligned with pressure components of the mechanical testing sub-system and is electrically connected to an PNG media_image1.png 415 655 media_image1.png Greyscale electrical testing sub-system of the testing system (figures 1-6, paragraphs [0011],[0013],[0022]-[0024]); simultaneously performing, by the mechanical testing sub-system and the electrical testing sub-system, a first stage of a mechanical testing and an electrical testing on the PNG media_image2.png 445 469 media_image2.png Greyscale semiconductor chip package (figures 1-6, paragraphs [0011],[0013], [0022]-[0024]); and in response to determining, by a controller of the testing system, that a preset trigger condition of the mechanical testing or the electrical testing is reached, controlling the mechanical testing sub-system to switch the first stage of the mechanical testing to a second stage of the mechanical testing (figures 1-6, paragraphs [0011], [0013], [0022]-[0024]). Shao et al (US 2012/0092033 A1) does not explicitly teach a controller, however it is inherent that an integrated circuit testing system where electrical parameters of the device, amount of pulling force and degree of deformation are measured while a mechanical force is applied (paragraphs [0011] - [0013]), will have a controller to perform the operations. Goryu et al (US 11156654 B2) teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Shao et al and Goryu et al does not explicitly teach a socket, each conductive pin comprises a respective elastic member and is configured to move independently during deformation of the semiconductor chip package caused by the mechanical testing. However Goryu et al teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). It is inherent that a socket and pin arrangement is involved in performing the electrical measurement is performed during mechanical stress is applied to the package. PNG media_image3.png 349 234 media_image3.png Greyscale Mardi et al (US 20190128956 A1) teaches, [0058] The portion of the pusher pin hole 202 formed through the first section 702 of the workpress 106 includes a first diameter section 740 and a second diameter section 742. The first diameter section 740 exits the first section 702 at the bottom surface 116. The first diameter section 740 has a diameter that is less than a diameter of the second diameter section 742. The transition between the first and second diameter sections 742, 740 forms a step 744. The step 744 is sized to prevent the entire pusher pin 118 from passing completely out of the workpress 106 through the bottom surface 116, as further described below. With the pusher pins 118 installed in the workpress 106, a tip 714 of the pusher pin 118 extends beyond the PNG media_image4.png 690 397 media_image4.png Greyscale bottom surface 116 of the workpress 106 by a sufficient amount to allow the pusher pin 118 to engage the chip package assembly 160 and have sufficient travel to apply the desired amount of force to the top surface of the chip package assembly 160. As shown by the dashed line in FIG. 7, the tips 714 of the pusher pins 118 define the bottom 180 of the workpress 106. As the tips 714 of each pusher pin 118 may move independently and separately from the other pusher pins 118, the discrete independent movement and force generation of the pusher pins 118 distributed across the bottom 180 of the workpress 106 enable the bottom 180 to dynamically conform to the topography of the chip package assembly 160 as the workpress 106 is advanced towards the socket 120. [0059] The portion of the pusher pin hole 202 formed through the second section 704 of the workpress 106 includes a hole 720. The hole 720 may be a blind hole having a bottom 722, or may alternatively be formed completely through the second section 704 such that the mounting plate 130 forms the bottom 722 of the hole 720. The bottom 722 of the hole 720 extends a depth 750 from a bottom surface of the second section 704 of the workpress 106. The depth 750, along with the spring constant of the pusher pin 118, is generally selected to set the force that the pusher pin 118 will exert on the chip package assembly 160. Thus, the force generated by each pusher pin 118 disposed in the workpress 106 is controlled by selecting the PNG media_image5.png 701 271 media_image5.png Greyscale parameters of the depth 750 of the hole 720, along with the spring constant and the length of the each pusher pin 118. These parameters may be selected so that all the pusher pins 118 exert a uniform force per unit displacement, or that at least one or all of the pusher pins 118 exert different forces per unit displacement. [0066] FIG. 10 is another schematic partial side view of the workpress 106 of FIG. 1 having a conductive pusher pin 1018. The conductive pusher pin 1018 may be a commercially available spring pin that suitable for high frequency signal transmission through the pusher pin 1018. The pusher pin 1018 may also be constructed similar to any of the pusher pins 118 described below with reference to FIGS. 14-20, with the exception that the pusher pin 1018 is conductive tip to tip. [0073] Although FIGS. 11-13 provide example having the appearance of a uniform distribution of pusher pins 118, any pusher pins distribution described above, such as but not limited to that described with reference to FIGS. 2-6 may be utilized. Moreover, the pusher pins 118 are not limited to having a uniform stoke, spring constant or force per unit displacement, but rather any one or more of the pusher pins 118 disposed in the workpress assembly 104 may have one or more of the stoke, spring constant or force per unit displacement different than one or more other pusher pins 118 disposed within the same workpress assembly 104. [0074] FIG. 14 show a perspective of an exemplary pusher pin 118. The pusher pin 118, which may be adapted from a pogo pin, pusher pin, buckling pin, cobra pin, microelectromechanical (MEMS) pin and the like, includes a first plunger 712, a second plunger 716 and a spring 1402. In one example, the plungers 712, 716 may be displaced axially through a distance (e.g., stroke) of about 0.5 to about 2.5 millimeters. In one example, an electrically insulative (e.g., discontinuous) path is defined between the exposed opposite ends of the first and second plunger 712, 716 through the pusher pin 118. The electrically insulative path defined through the pusher pin 118 prevents the pusher pin 118 from inadvertently shorting circuits that may be in contact with the pusher pin 118 when in use. It is noted that the pusher pin 118 described herein although for use with DUTs, is not intended for use in locations that require communication of an electric signal, ground or power for which a conductive pusher pin, such as the conductive pusher pin 1018 or equivalent, is utilized. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al and Goryu et al by providing a socket and retractable conductive pin assembly as taught by Mardi et al [figures 11-14, paragraphs [0058], [0059], [00666], [0073], [0074]). One of the ordinary skill in the art would have been motivated to make such a modification so that the force generated by each pusher pin is controlled along with the spring constant and the length of the each pusher pin so that all the pusher pins exert a uniform force per unit displacement, or that at least one or all of the pusher pins exert different forces per unit displacement, as taught by Mardi et al (paragraph [0059]). Regarding dependent claim 2, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 2019/0128956 A1) teach the method according to claim 1. Shao et al (US 2012/0092033 A1) further teaches, wherein fixing, by the socket of the testing system, the semiconductor chip package within the mechanical testing sub-system comprises: mounting, the socket on the semiconductor chip package, such that conductive pins in the socket are in contact with solder balls of the semiconductor chip package, wherein the semiconductor chip package is supported by a lower press head of the pressure components (socket, conductive pins in contact with solder balls, and lower support are inherent). Goryu et al (US 11156654 B2) further teaches, the semiconductor chip package is attached with a strain gauge (FIG. 5 is a block diagram illustrating a schematic configuration example of a semiconductor device inspection apparatus according to this embodiment. As illustrated in FIG. 5, the semiconductor device inspection apparatus 100 includes a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107. In this configuration, the controller 101 is constituted, for example, by an information processing apparatus such as a central processing unit (CPU) and executes control of each member constituting the semiconductor device inspection apparatus 100 and various types of computations. In addition, the semiconductor device 20 to be inspected is placed on the stage 104 while being sandwiched between the two action units 103. The force sensor 105 is provided, for example, in at least one of the two action units 103 and measures the pressure imparted to the semiconductor device 20 by the two action units 103. Note that, in this description, the pressure includes the compressive force and the tensile force. In accordance with a command from the controller 101, the stress controller 102 controls the compressive force or the tensile force imparted to the semiconductor device 20 by the action unit 103, based on a pressure value detected by the force sensor 105. Consequently, the stress occurring inside the semiconductor device 20 (for example, a shear stress on a sliding surface in the SiC crystal) is controlled. Note that the stress controller 102 may output various items of information such as the pressure value detected by the force sensor 105 to the controller 101 as necessary. The probe 106 is a current probe for executing a current application test on the semiconductor device 20 and includes one or more electrodes that can be electrically connected to one or more terminals included in the semiconductor device 20 placed on the stage 104. In accordance with a command from the controller 101, the probe controller 107 supplies a current to the semiconductor device 20 via the probe 106 and detects the value of a voltage applied at that time and the value of a current flowing through the semiconductor device 20 to output to the controller 101. Accordingly, the controller 101 can specify the device characteristics (for example, a current-voltage characteristic) of the semiconductor device 20 from the input voltage value and current value (lines 17-60, column 5). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 3, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the method according to claim 2. Shao et al (US 2012/0092033 A1) further teaches, wherein simultaneously performing, by the mechanical testing sub-system and the electrical testing sub-system, the first stage of the mechanical testing and the electrical testing on the semiconductor chip package (figures 2-6) comprises: moving, by the mechanical testing sub-system, an upper press head of the pressure components to apply downward force to the semiconductor chip package to cause first deforming of the semiconductor chip package (figures 2-6, paragraphs [0011],[0013], [0022]-[0024]); recording, by the mechanical testing sub-system, mechanical data of the semiconductor chip package during the first deforming of the semiconductor chip package; and testing, by the electrical testing sub-system, an electrical function of the semiconductor chip package during the first deforming of the semiconductor chip package. (figures 2-6, paragraphs [0011], [0013], [0022]-[0024]). Regarding dependent claim 4, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the method according to claim 3. Shao et al (US 2012/0092033 A1) further teaches,, wherein: recording, by the mechanical testing sub-system, the mechanical data comprises at least one of: recording force data of the semiconductor chip package, recording displacement data of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]), and recording strain data of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]); and the preset trigger condition of the mechanical testing comprises at least one of: the force data reaching a force threshold value, the displacement data reaching a displacement threshold value, and the strain data reaching a strain threshold value (Figure 2, paragraphs [0011][0013], [0022]-[0024]). Shao et al is silent about a preset trigger condition. Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 5, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the method according to claim 3. Shao et al (US 2012/0092033 A1) further teaches, wherein: testing, by the electrical testing sub-system, the electrical function comprises testing at least one of: open/short conditions of the semiconductor chip package, current/voltage parameters of the semiconductor chip package, and performance parameters of the semiconductor chip package (paragraph [0016], [0018], [0032]); and the preset trigger condition of the electrical testing comprises: at least one solder ball of the semiconductor chip package being short, at least one current/voltage parameter of the semiconductor chip package reaching a current/voltage threshold value, and at least one performance parameter of the semiconductor chip package reaching a performance threshold value (paragraph [0016], [0018], [0032]). Shao et al is silent about a preset trigger condition. Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 6, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the method according to claim 5. Shao et al (US 2012/0092033 A1) further teaches, wherein controlling the mechanical testing sub-system to switch the first stage of the mechanical testing to the second stage of the mechanical testing comprises: controlling, by the controller, the mechanical testing sub-system to stop moving the upper press head downward and retract the upper press head upward (paragraphs [0011] - [0016]). Shao et al is silent about stop moving and retracting. Goryu et al (US 11156654 B2) teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 7, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the method according to claim 6. Shao et al (US 2012/0092033 A1) further teaches, further comprising controlling, by the controller, after controlling the mechanical testing sub-system to stop moving the upper press head downward and before controlling the mechanical testing sub-system to retract the upper press head upward, the mechanical testing sub-system to maintain a position of the upper press head for a period of time (paragraphs [0011-[0016]). Shao et al is silent about stop moving and retracting. Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 8, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the method according to claim 6. Shao et al (US 2012/0092033 A1) further teaches, further comprising: when the electrical function recovers, controlling, by the controller, the mechanical testing sub-system to move the upper press head downward to cause second deforming of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]); controlling, by the controller, the mechanical testing sub-system to record the mechanical data of the semiconductor chip package during the second deforming of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]); and controlling, by the controller, the electrical testing sub-system to test the electrical function of the semiconductor chip package during the second deforming of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]). Regarding dependent claim 9, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the method according to claim 8. Shao et al (US 2012/0092033 A1) further teaches, further comprising: controlling, by the controller, the mechanical testing sub-system to move the upper press head at a first downward rate to cause the first deforming of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]); and controlling, by the controller, the mechanical testing sub-system to move the upper press head at a second downward rate less than the first downward rate to cause the second deforming of the semiconductor chip package (Figure 2, paragraphs [0011],[0013], [0022]-[0024]). Shao teaches first and second deforming as shown in figure 2. Shao et al is silent about the movement of the mechanical press head at a first downward rate. Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package; In accordance with a command from the controller 101, the stress controller 102 controls the compressive force or the tensile force imparted to the semiconductor device 20 by the action unit 103, based on a pressure value detected by the force sensor 105. (lines 17-60, column 5). Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 10, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the method according to claim 3. Shao et al (US 2012/0092033 A1) further teaches, automatically extending or retracting the conductive pins during the first deforming of the semiconductor chip package to keep electric connections between the conductive pins and the solder balls of the semiconductor chip package (paragraphs [0031] - [0033]). PNG media_image1.png 415 655 media_image1.png Greyscale Regarding independent claim 11, Shao et al (US 2012/0092033 A1) teaches, A system for testing a semiconductor chip package (figures 1-6, paragraphs [0011][0013], [0022]-[0024], the method taught by Shao et al is applicable to packaged and unpackaged semiconductor devices since it involves applying mechanical force to a device studying its electrical characteristics, the system comprising: a mechanical testing sub-system configured for performing a mechanical testing on the PNG media_image2.png 445 469 media_image2.png Greyscale semiconductor chip package (figures 1-6, paragraphs [0011][0013], [0022]-[0024]; an electrical testing sub-system configured for performing an electrical testing on the semiconductor chip package (figures 1-6, paragraphs [0011][0013], [0017]-[0020],[0022]-[0024]; and a controller configured for: controlling the mechanical testing sub-system and the electrical testing sub-system to simultaneously perform a first stage of the mechanical testing and the electrical testing on the semiconductor chip package (figures 1-6, paragraphs [0011][0013], [0022]-[0024], and in response to determining that a preset trigger condition of the mechanical testing or the electrical testing is reached, switching the first stage of the mechanical testing to a second stage of the mechanical testing (figures 1-6, paragraphs [0011][0013], [0022]-[0024]. Shao et al (US 2012/0092033 A1) does not explicitly teach a controller, however it is inherent that an integrated circuit testing system where electrical parameters of the device, amount of pulling force and degree of deformation are measured while a mechanical force is applied (paragraphs [0011]-[0013]), will have a controller to perform the operations. Goryu et al (US 11156654 B2) teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Shao et al and Goryu et al does not explicitly teach a socket, conductive pins of the socket wherein the system comprises a socket, the socket comprising conductive pins, each conductive pin comprises a respective elastic member and is configured to move independently during deformation of the semiconductor chip package caused by the mechanical testing. However, Goryu et al teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). It is inherent that a socket and pin arrangement is involved in performing the electrical measurement is performed during mechanical stress is applied to the package. PNG media_image3.png 349 234 media_image3.png Greyscale Mardi et al (US 20190128956 A1) teaches, [0058] The portion of the pusher pin hole 202 formed through the first section 702 of the workpress 106 includes a first diameter section 740 and a second diameter section 742. The first diameter section 740 exits the first section 702 at the bottom surface 116. The first diameter section 740 has a diameter that is less than a diameter of the second diameter section 742. The transition between the first and second diameter sections 742, 740 forms a step 744. The step 744 is sized to prevent the entire pusher pin 118 from passing completely out of the workpress 106 through the bottom surface 116, as further described below. With the pusher pins 118 installed in the workpress 106, a tip 714 of the pusher pin 118 extends beyond the bottom surface 116 of the workpress 106 by a sufficient amount to allow the pusher pin 118 to engage the chip package assembly 160 and have sufficient travel to apply the desired amount of force to the top surface of the chip package assembly 160. As shown by the dashed line in FIG. 7, the tips 714 of the pusher pins 118 define the bottom 180 of the workpress 106. As the tips 714 of each pusher pin 118 may move independently and separately from the other pusher pins 118, the discrete independent movement and force generation of the pusher pins 118 distributed across the bottom 180 of the workpress 106 enable the bottom 180 to PNG media_image4.png 690 397 media_image4.png Greyscale dynamically conform to the topography of the chip package assembly 160 as the workpress 106 is advanced towards the socket 120. [0059] The portion of the pusher pin hole 202 formed through the second section 704 of the workpress 106 includes a hole 720. The hole 720 may be a blind hole having a bottom 722, or may alternatively be formed completely through the second section 704 such that the mounting plate 130 forms the bottom 722 of the hole 720. The bottom 722 of the hole 720 extends a depth 750 from a bottom surface of the second section 704 of the workpress 106. The depth 750, along with the spring constant of the pusher pin 118, is generally selected to set the force that the pusher pin 118 will exert on the chip package assembly 160. Thus, the force generated by each pusher pin 118 disposed in the workpress 106 is controlled by selecting the parameters of the depth 750 of the hole 720, along with the spring constant and the length of the each pusher pin 118. These parameters may be selected so that all the pusher pins 118 exert a uniform force per unit displacement, or that at least one or all of the pusher pins 118 exert different forces per unit displacement. [0066] FIG. 10 is another schematic partial side view of the workpress 106 of FIG. 1 having a conductive pusher pin 1018. The conductive pusher pin 1018 may be a commercially available spring pin that suitable for high frequency signal transmission through the pusher pin 1018. The pusher pin 1018 may also be constructed similar to any of the pusher pins 118 described below with reference to FIGS. 14-20, with the exception that the pusher pin 1018 is conductive tip to tip. [0073] Although FIGS. 11-13 provide example having the appearance of a uniform distribution of pusher pins 118, any pusher pins distribution described above, such as but not limited to that described with reference to FIGS. 2-6 may be utilized. Moreover, the pusher pins 118 are not limited to having a uniform stoke, spring constant or force per unit PNG media_image5.png 701 271 media_image5.png Greyscale displacement, but rather any one or more of the pusher pins 118 disposed in the workpress assembly 104 may have one or more of the stoke, spring constant or force per unit displacement different than one or more other pusher pins 118 disposed within the same workpress assembly 104. [0074] FIG. 14 show a perspective of an exemplary pusher pin 118. The pusher pin 118, which may be adapted from a pogo pin, pusher pin, buckling pin, cobra pin, microelectromechanical (MEMS) pin and the like, includes a first plunger 712, a second plunger 716 and a spring 1402. In one example, the plungers 712, 716 may be displaced axially through a distance (e.g., stroke) of about 0.5 to about 2.5 millimeters. In one example, an electrically insulative (e.g., discontinuous) path is defined between the exposed opposite ends of the first and second plunger 712, 716 through the pusher pin 118. The electrically insulative path defined through the pusher pin 118 prevents the pusher pin 118 from inadvertently shorting circuits that may be in contact with the pusher pin 118 when in use. It is noted that the pusher pin 118 described herein although for use with DUTs, is not intended for use in locations that require communication of an electric signal, ground or power for which a conductive pusher pin, such as the conductive pusher pin 1018 or equivalent, is utilized. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al and Goryu et al by providing a socket and retractable conductive pin assembly as taught by Mardi et al [figures 11-14, paragraphs [0058], [0059], [00666], [0073], [0074]). One of the ordinary skill in the art would have been motivated to make such a modification so that the force generated by each pusher pin is controlled along with the spring constant and the length of the each pusher pin so that all the pusher pins exert a uniform force per unit displacement, or that at least one or all of the pusher pins exert different forces per unit displacement, as taught by Mardi et al (paragraph [0059]). Regarding dependent claim 12, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the system according to claim 11. Shao et al (US 2012/0092033 A1) further teaches, a lower press head configured to be attached to the semiconductor chip package to provide lower support force to the semiconductor chip package; and the socket configured to be mounted on the semiconductor chip package, such that conductive pins of the socket are in contact with solders balls on an upper side of the semiconductor chip package (socket, conductive pins in contact with solder balls, and lower support are inherent). Shao et al further teaches, Force and degree of deformation (as shown in figure 2, paragraphs [0012] - [0016]), but is silent about a strain gauge configured to be attached to the semiconductor chip package to collect strain data of the semiconductor chip package. Goryu et al (US 11156654 B2) teaches, (FIG. 5 is a block diagram illustrating a schematic configuration example of a semiconductor device inspection apparatus according to this embodiment. As illustrated in FIG. 5, the semiconductor device inspection apparatus 100 includes a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107. In this configuration, the controller 101 is constituted, for example, by an information processing apparatus such as a central processing unit (CPU) and executes control of each member constituting the semiconductor device inspection apparatus 100 and various types of computations. In addition, the semiconductor device 20 to be inspected is placed on the stage 104 while being sandwiched between the two action units 103. The force sensor 105 is provided, for example, in at least one of the two action units 103 and measures the pressure imparted to the semiconductor device 20 by the two action units 103. Note that, in this description, the pressure includes the compressive force and the tensile force. In accordance with a command from the controller 101, the stress controller 102 controls the compressive force or the tensile force imparted to the semiconductor device 20 by the action unit 103, based on a pressure value detected by the force sensor 105. Consequently, the stress occurring inside the semiconductor device 20 (for example, a shear stress on a sliding surface in the SiC crystal) is controlled. Note that the stress controller 102 may output various items of information such as the pressure value detected by the force sensor 105 to the controller 101 as necessary. The probe 106 is a current probe for executing a current application test on the semiconductor device 20 and includes one or more electrodes that can be electrically connected to one or more terminals included in the semiconductor device 20 placed on the stage 104. In accordance with a command from the controller 101, the probe controller 107 supplies a current to the semiconductor device 20 via the probe 106 and detects the value of a voltage applied at that time and the value of a current flowing through the semiconductor device 20 to output to the controller 101. Accordingly, the controller 101 can specify the device characteristics (for example, a current-voltage characteristic) of the semiconductor device 20 from the input voltage value and current value (lines 17-60, column 5). Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 13, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the system according to claim 12. Shao et al (US 2012/0092033 A1) further teaches, wherein the controller is further configured to: control the mechanical testing sub-system to: move an upper press head to apply downward force to the semiconductor chip package to cause first deforming of the semiconductor chip package, and record mechanical data of the semiconductor chip package during the first deforming of the semiconductor chip package (figures 2-6, paragraphs [0011][0013], [0022]-[0024]); and control the electrical testing sub-system to: test an electrical function of the semiconductor chip package during the first deforming of the semiconductor chip package (paragraphs [0011][0013], [0022]-[0024]). Regarding dependent claim 14, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the system according to claim 13. Shao et al (US 2012/0092033 A1) further teaches, wherein: the mechanical data comprise at least one of: force data of the semiconductor chip package, displacement data of the semiconductor chip package, and strain data of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]); and the preset trigger condition of the mechanical testing comprises at least one of: the force data reaching a force threshold value, the displacement data reaching a displacement threshold value, and the strain data reaching a strain threshold value (Figure 2, paragraphs [0011][0013], [0022]-[0024]). Shao et al is silent about a preset trigger condition. Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 15, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the system according to claim 12. Shao et al (US 2012/0092033 A1) further teaches, wherein: the electrical function comprises at least one of: open/short conditions of the semiconductor chip package, current/voltage parameters of the semiconductor chip package, and performance parameters of the semiconductor chip package (paragraph [0016], [0018], [0032]); and the preset trigger condition of the electrical testing comprises: at least one solder ball of the semiconductor chip package being short, at least one current/voltage parameter of the semiconductor chip package reaching a current/voltage threshold value, and at least one performance parameter of the semiconductor chip package reaching a performance threshold value (paragraph [0016], [0018], [0032]). Shao et al is silent about a preset trigger condition. Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 16, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the system according to claim 15. Shao et al (US 2012/0092033 A1) further teaches, wherein when the preset trigger condition is reached, the controller is configured to: control the mechanical testing sub-system to stop moving the upper press head downward and retract the upper press head upward (paragraphs [0011]- [0016]). Shao et al is silent about stop moving and retracting. Goryu et al (US 11156654 B2) teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 17, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the system according to claim 16. Shao et al (US 2012/0092033 A1) further teaches, wherein the controller is further configured to: control the mechanical testing sub-system to, after stopping moving the upper press head downward and before retracting the upper press head upward, maintain a position of the upper press head for a period of time (paragraphs [0011] - [0016]). Shao et al is silent about stop moving and retracting. Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Regarding dependent claim 18, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the system according to claim 16. Shao et al (US 2012/0092033 A1) further teaches, wherein the controller is further configured to: control the mechanical testing sub-system to: when the electrical function recovers, move the upper press head downward to cause second deforming of the semiconductor chip package, and record the mechanical data of the semiconductor chip package during the second deforming of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]); and control the electrical testing sub-system to test the electrical function of the semiconductor chip package during the second deforming of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]). Regarding dependent claim 19, Shao et al (US 2012/0092033 A1), Goryu et al (US 11156654 B2) and Mardi et al (US 20190128956 A1) teach the system according to claim 16. Shao et al (US 2012/0092033 A1) further teaches, wherein the controller is further configured to: control the mechanical testing sub-system to: move the upper press head at a first downward rate to cause the first deforming of the semiconductor chip package (Figure 2, paragraphs [0011][0013], [0022]-[0024]); and move the upper press head at a second downward rate less than the first downward rate to cause the second deforming of the semiconductor chip package (Figure 2, paragraphs [0011],[0013], [0022]-[0024]). Shao teaches first and second deforming as shown in figure 2. Shao et al is silent about the movement of the mechanical press head at a first downward rate. Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package; In accordance with a command from the controller 101, the stress controller 102 controls the compressive force or the tensile force imparted to the semiconductor device 20 by the action unit 103, based on a pressure value detected by the force sensor 105 (lines 17-60, column 5). Goryu et al (US 11156654 B2) also teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). PNG media_image1.png 415 655 media_image1.png Greyscale Regarding independent claim 20, Shao et al (US 2012/0092033 A1) teaches, controlling a mechanical testing sub-system of the testing system to fix the semiconductor chip package within the mechanical testing sub-system, such that the semiconductor chip package is aligned with pressure components of the mechanical testing sub-system and is electrically connected to an electrical testing sub-system of the testing system (as shown in figure 3 and paragraphs [0017]-[0020]); controlling the mechanical testing sub-system and the electrical testing sub-system to PNG media_image2.png 445 469 media_image2.png Greyscale simultaneously perform a first stage of a mechanical testing and an electrical testing on the semiconductor chip package (figures 1-6, paragraphs [0011][0013], [0022]-[0024]); and in response to determining that a preset trigger condition of the mechanical testing or the electrical testing is reached, controlling the mechanical testing sub-system to switch the first stage of the mechanical testing to a second stage of the mechanical testing (figures 1-6, paragraphs [0011][0013], [0022]-[0024]). Shao et al (US 2012/0092033 A1) does not explicitly teach a non-transitory computer-readable medium containing stored thereon computer-executable instructions that, when executed by a processor of a testing system, cause the processor to perform operations for testing a semiconductor chip package. However, it is inherent that an integrated circuit testing system where electrical parameters of the device, amount of pulling force and degree of deformation are measured while a mechanical force is applied (paragraphs [0011] - [0013]), will have a processor executing instructions to perform the operations. Goryu et al (US 11156654 B2) teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). Note that, in the screening process, for example, the controller 101 (refer to FIG. 5) specifies the current-voltage characteristic of the semiconductor device 20 from the current detected by the probe controller 107 during the current application test in step S107 and the voltage applied at that time and judges the semiconductor device 20 whose current-voltage characteristic has fluctuated by a certain amount or more before and after the application of pressure as a nonconforming product. For example, in a case where a resistance value worked out from the current-voltage characteristic specified while the pressure is applied is increased from a resistance value worked out from the current-voltage characteristic specified while no pressure is applied by a predetermined threshold value or greater, the controller 101 judges this semiconductor device 20 as a nonconforming product (lines 48-63, column 7). Therefore it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al by providing a force sensor and control the amount of mechanical stress applied to the semiconductor device as taught by Goryu et al (lines 17-60, column 5). One of the ordinary skill in the art would have been motivated to make such a modification so that the applied force imparted to the semiconductor device by the action unit can be controlled, based on a pressure value detected by the force sensor, as taught by Goryu et al (lines 17-60, column 5). Shao et al and Goryu et al does not explicitly teach a socket, conductive pins of the socket wherein the system comprises a socket, the socket comprising conductive pins, each conductive pin comprises a respective elastic member and is configured to move independently during deformation of the semiconductor chip package caused by the mechanical testing. However, Goryu et al teaches, a controller 101, a stress controller 102, action units 103, a stage 104, a force sensor 105, a probe 106, and a probe controller 107 for performing electrical measurements while a mechanical stress is applied to the package (lines 17-60, column 5). It is inherent that a socket and pin arrangement is involved in performing the electrical measurement is performed during mechanical stress is applied to the package. PNG media_image3.png 349 234 media_image3.png Greyscale Mardi et al (US 20190128956 A1) teaches, [0058] The portion of the pusher pin hole 202 formed through the first section 702 of the workpress 106 includes a first diameter section 740 and a second diameter section 742. The first diameter section 740 exits the first section 702 at the bottom surface 116. The first diameter section 740 has a diameter that is less than a diameter of the second diameter section 742. The transition between the first and second diameter sections 742, 740 forms a step 744. The step 744 is sized to prevent the entire pusher pin 118 from passing completely out of the workpress 106 through the bottom surface 116, as further described below. With the pusher pins 118 installed in the workpress 106, a tip 714 of the pusher pin 118 extends beyond the bottom surface 116 of the workpress 106 by a sufficient amount to allow the pusher pin 118 to engage the chip package assembly 160 and have sufficient travel to apply the desired amount of force to the top surface of the chip package assembly 160. As shown by the dashed line in FIG. 7, the tips 714 of the pusher pins 118 define the bottom 180 of the workpress 106. As the tips 714 of each pusher pin 118 may move independently and separately from the other pusher pins 118, the PNG media_image4.png 690 397 media_image4.png Greyscale discrete independent movement and force generation of the pusher pins 118 distributed across the bottom 180 of the workpress 106 enable the bottom 180 to dynamically conform to the topography of the chip package assembly 160 as the workpress 106 is advanced towards the socket 120. [0059] The portion of the pusher pin hole 202 formed through the second section 704 of the workpress 106 includes a hole 720. The hole 720 may be a blind hole having a bottom 722, or may alternatively be formed completely through the second section 704 such that the mounting plate 130 forms the bottom 722 of the hole 720. The bottom 722 of the hole 720 extends a depth 750 from a bottom surface of the second section 704 of the workpress 106. The depth 750, along with the spring constant of the pusher pin 118, is generally selected to set the force that the pusher pin 118 will exert on the chip package assembly 160. Thus, the force generated by each pusher pin 118 disposed in the workpress 106 is controlled by selecting the parameters of the depth 750 of the hole 720, along with the spring constant and the length of the each pusher pin 118. These parameters may be selected so that all the pusher pins 118 exert a uniform force per unit displacement, or that at least one or all of the pusher pins 118 exert different forces per unit displacement. [0066] FIG. 10 is another schematic partial side view of the workpress 106 of FIG. 1 having a conductive pusher pin 1018. The conductive pusher pin 1018 may be a commercially available spring pin that suitable for high frequency signal transmission through the pusher pin 1018. The pusher pin 1018 may also be constructed similar to any of the pusher pins 118 described below with reference to FIGS. 14-20, with the exception that the pusher pin 1018 is conductive tip to tip. [0073] Although PNG media_image5.png 701 271 media_image5.png Greyscale FIGS. 11-13 provide example having the appearance of a uniform distribution of pusher pins 118, any pusher pins distribution described above, such as but not limited to that described with reference to FIGS. 2-6 may be utilized. Moreover, the pusher pins 118 are not limited to having a uniform stoke, spring constant or force per unit displacement, but rather any one or more of the pusher pins 118 disposed in the workpress assembly 104 may have one or more of the stoke, spring constant or force per unit displacement different than one or more other pusher pins 118 disposed within the same workpress assembly 104. [0074] FIG. 14 show a perspective of an exemplary pusher pin 118. The pusher pin 118, which may be adapted from a pogo pin, pusher pin, buckling pin, cobra pin, microelectromechanical (MEMS) pin and the like, includes a first plunger 712, a second plunger 716 and a spring 1402. In one example, the plungers 712, 716 may be displaced axially through a distance (e.g., stroke) of about 0.5 to about 2.5 millimeters. In one example, an electrically insulative (e.g., discontinuous) path is defined between the exposed opposite ends of the first and second plunger 712, 716 through the pusher pin 118. The electrically insulative path defined through the pusher pin 118 prevents the pusher pin 118 from inadvertently shorting circuits that may be in contact with the pusher pin 118 when in use. It is noted that the pusher pin 118 described herein although for use with DUTs, is not intended for use in locations that require communication of an electric signal, ground or power for which a conductive pusher pin, such as the conductive pusher pin 1018 or equivalent, is utilized. Therefore, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention, to have modified the teachings of Shao et al and Goryu et al by providing a socket and retractable conductive pin assembly as taught by Mardi et al [figures 11-14, paragraphs [0058], [0059], [00666], [0073], [0074]). One of the ordinary skill in the art would have been motivated to make such a modification so that the force generated by each pusher pin is controlled along with the spring constant and the length of the each pusher pin so that all the pusher pins exert a uniform force per unit displacement, or that at least one or all of the pusher pins exert different forces per unit displacement, as taught by Mardi et al (paragraph [0059]). Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to SURESH RAJAPUTRA whose telephone number is (571) 270-0477. The examiner can normally be reached between 8:00 AM - 5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EMAN ALKAFAWI can be reached on 571-272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SURESH K RAJAPUTRA/Examiner, Art Unit 2858 /NASIMA MONSUR/Primary Examiner, Art Unit 2858
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Prosecution Timeline

Show 4 earlier events
Mar 12, 2026
Examiner Interview Summary
Mar 31, 2026
Response Filed
Jun 22, 2026
Final Rejection mailed — §103
Jul 28, 2026
Interview Requested
Aug 19, 2026
Response after Non-Final Action
Sep 08, 2026
Request for Continued Examination
Sep 10, 2026
Response after Non-Final Action
Sep 18, 2026
Non-Final Rejection mailed — §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
84%
Grant Probability
97%
With Interview (+13.3%)
2y 5m (~1m remaining)
Median Time to Grant
High
PTA Risk
Based on 483 resolved cases by this examiner. Grant probability derived from career allowance rate.

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