DETAILED ACTION
Election/Restrictions
Applicant’s election without traverse of Invention I, drawn to a package structure with corresponding claims 1-8, in the reply filed on 08/11/2026 is acknowledged. Claims 9-13 are withdrawn from further consideration pursuant to 37 CFR 1.142(b) as being drawn to a nonelected invention.
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b).
The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13.
The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer.
Claim 1 is provisionally rejected on the ground of nonstatutory double patenting as being unpatentable over claim 9 of copending Application No. 18/670,912 (corresponding to US 2025/0364350 A1; hereinafter “Application 912”). Although the claims at issue are not identical, they are not patentably distinct from each other because the subject matter(s) as claimed in the instant application are obvious variant(s) of the noted claim(s) of Application 912.
This is a provisional nonstatutory double patenting rejection because the patentably indistinct claims have not in fact been patented.
Regarding claim 1, Application 912 recites a package structure (“a package structure”), comprising: an electronic device (“an electronic device”); and a heat sink structure (“a heat sink structure”) disposed over the electronic device, and comprising: a thermally conductive layer (“a thermally conductive layer”); a plurality of thermal vias (“a plurality of thermal vias”) connecting to a second surface of the thermally conductive layer; and a plurality of pads (“a plurality of pads”) connecting to a first surface of the thermally conductive layer, wherein the plurality of pads are thermally connected to the electronic device so as to dissipate a heat generated from the electronic device to the thermal vias through the thermally conductive layer (“wherein the plurality of thermal vias are thermally connected to the electronic device through the thermally conductive layer so as to dissipate a heat generated from the electronic device” and “wherein the thermally conductive layer is thermally connected to the electronic device through the plurality of pads”) (See Application 912, claim 9, which depends from claim 1).
Furthermore, claim 9 of Application 912 additionally recites the heat sink structure comprising a base portion (see claim 9). Therefore, claim 9 of Application 912 has a narrower scope of claim compared to claim 1 of the instant application.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claims 1-7 are rejected under 35 U.S.C. 102(a)(1) and/or 102(a)(2) as being anticipated by Shih (US 2024/0014089 A1).
Regarding claim 1, referring to Figs. 1A-2, Shih teaches a package structure, comprising: an electronic device (DW1) (paragraphs 62-63 and 69); and a heat sink structure (CW1) disposed over the electronic device (paragraphs 64-68), and comprising: a thermally conductive layer (10a) (paragraphs 42-44); a plurality of thermal vias (v1 and v2) connecting to a second surface of the thermally conductive layer (a top surface of 10a facing v1 and v2) (paragraphs 45 and 65); and a plurality of pads (c1 and c2) connecting to a first surface of the thermally conductive layer (a bottom surface of 10a facing c1 and c2) (paragraphs 73-75), wherein the plurality of pads are thermally connected to the electronic device so as to dissipate a heat generated from the electronic device to the thermal vias through the thermally conductive layer (paragraphs 66-68 and 91-93).
Regarding claim 2, Shih teaches wherein the heat sink structure is attached to the electronic device by hybrid bonding (Fig. 2 and paragraph 62).
Regarding claim 3, Shih teaches wherein the thermally conductive layer has a net shape (10b including a mesh profile) (Figs. 1B and paragraphs 54-60).
Regarding claim 4, Shih teaches wherein the thermally conductive layer includes a plurality of lines (x1-x6 and y1-y8) crossed with each other to form a plurality of intersection portions (Figs. 1B and paragraphs 54-60).
Regarding claim 5, Shih teaches wherein the plurality of thermal vias are connected to the plurality of intersection portions of the thermally conductive layer (Figs. 1B and paragraphs 54-60).
Regarding claim 6, Shih teaches wherein the heat sink structure further comprises a protection material (s1 and/or p1) encapsulating the plurality of thermal vias (Fig. 2 and paragraphs 64-65 and 106).
Regarding claim 7, Shih teaches wherein a lateral surface of the heat sink structure is substantially aligned with a lateral surface of the electronic device (Fig. 2).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 8 is rejected under 35 U.S.C. 103 as being unpatentable over Shih as applied to claim 1 above, and further in view of Kim et al. (US 2023/0113465 A1; hereinafter “Kim”).
Regarding claim 8, Shih teaches wherein the electronic device comprises: a first semiconductor chip (DW4); a second semiconductor chip (DW3) stacked on and electrically connected to the first semiconductor chip; a third semiconductor chip (DW2) stacked on and electrically connected to the second semiconductor chip; a fourth semiconductor chip (DW1) stacked on and electrically connected to the third semiconductor chip (Fig. 4 and paragraphs 101-104).
Shih does not further teach an encapsulant encapsulating the first semiconductor chip, the second semiconductor chip, the third semiconductor chip and the fourth semiconductor chip. Kim teaches a package structure (1000), comprising: an encapsulant (an encapsulant 500) encapsulating a first semiconductor chip (200A), a second semiconductor chip (200B), a third semiconductor chip (200C) and a fourth semiconductor chip (200D) (Fig. 1 and paragraph 45). Therefore, it would have been obvious to one of ordinary skill in the art to combine the teaching of Shih with that of Kim in order to provide the encapsulant providing protection by surrounding/encapsulating the stacked semiconductor chips.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL B WHALEN whose telephone number is (571)270-3418. The examiner can normally be reached on M-F: 8AM-5PM.
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/DANIEL WHALEN/Primary Examiner, Art Unit 2893
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