Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This office action is in response to the filing of the Applicant Arguments/Remarks Made in an Amendment on 12/18/2025. Currently, claims 1-20 are pending in the application. Claims 5-8 have been withdrawn from consideration. Claims 17-20 have been added new.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 and 9-20 are rejected under 35 U.S.C. 103 as being obvious over Lin et al (US 20200196925 A1) in view of LIANG et al (US 20170102357 A1).
Regarding claim 1, Figures 8-9 of Lin disclose a method of manufacturing a field effect transducer (FET), the method comprising:
providing a FET base structure comprising a substrate (519, [0301]), a drain (509, [0080]) and a source (508); and
providing a channel layer (505, [0300]) on the FET base structure, the channel layer being electrically connected to the drain and the source; and
wherein: providing the channel layer (505) comprises forming the channel layer separate from the FET base structure and subsequently transferring the channel layer onto the FET base structure ([0037] and [0080]).
Lin does not teach providing a first layer on the FET base structure, wherein the first layer comprises a one-dimensional material or a two-dimensional material and is arranged on an upper surface of the channel layer so as to form a sensing surface of the FET, and after transferring the channel layer onto the FET base structure, providing the first layer on the FET base structure.
However, LIANG is a pertinent art which teaches field-effect transistor (FET)-based biosensors, wherein Figure 1 of LIANG teach such a transistor comprised generally of a field effect transistor (FET) 14 formed on a substrate 12 and a reservoir layer 16 integrated on top of the FET 14 and an insulating layer 18 such as Hafnium oxide (HfO.sub.2, [0042]) is deposited on the FET 14 in order to enable a capacitive coupling between the microfluidic reservoir and the channel region of the FET 14 ([0039]), and wherein the insulating layer 18 also serves as an effective layer for biofunctionalization ([0042]). Further, Lin teaches that a dielectric layer such as h-BN (two dimensional material) are also biocompatible an alternative of Hafnium oxide (HfO.sub.2) ([0191], [0216] and [0326] of Lin).
Thus, it would have been obvious to one of the ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Lin by providing a first layer on the FET base structure and is arranged on an upper surface of the channel layer so as to form a sensing surface of the FET, and after transferring the channel layer onto the FET base structure, providing the first layer on the FET base structure according to the teaching of LIANG in order to enable a capacitive coupling between the microfluidic reservoir and the channel region in the device of LIN and as an effective layer for biofunctionalization ([0042] of LIANG), and, further, using the first layer comprising a material such as h-BN which is a two-dimensional material instead of a dielectric material such as hafnium oxide in the method according to the teaching of Lin in order to make it a mechanically flexible nano sensor ([0326], Lin).
Regarding claim 9, Figures 8-9 of Lin in view of LIANG do not teach that the method of claim 1, wherein providing the FET base structure comprises forming the FET base structure using a complementary metal-oxide-semiconductor (CMOS) fabrication process.
However, these above limitation is known in pertinent prior art such as “All CVD Boron Nitride Encapsulated Graphene FETs” by Himadri Pandey et al (Page 1) which is a reference provided with IDS.
Regarding claim 10, Figures 8-9 of Lin in view of LIANG teach that the method of claim 1, wherein the FET base structure further comprises a gate (507, [0080], Lin) comprising a gate electrode and a gate dielectric layer (506), and wherein the first layer (which is on the channel layer according to LIANG) is arranged on the FET base structure above the gate.
Regarding claim 11, Figures 8-9 of Lin disclose that the method of claim 1, wherein providing the FET base structure comprises: providing the substrate, the substrate comprising a Si substrate (519, [0301] of Lin); and providing the drain (509) and source (508) on the substrate.
Regarding claim 12, Figures 8-9 of Lin disclose that the method of claim 1, wherein providing the FET base structure comprises: providing the substrate, the substrate comprising a polymeric substrate ([0219] of Lin); and providing the drain (509) and source (508) on the substrate.
Regarding claim 13, Figures 8-9 of Lin in view of LIANG teach that the method of claim 1, further comprising modifying the first layer by at least one of functionalising the first layer and wherein the first layer is modified after the channel layer is provided on the FET base structure ([0039] of LIANG).
But, Lin in view of LIANG do not teach of doping the first layer. However, this limitation is known in pertinent prior art such as Sung which taches of forming device using graphene and hexagonal boron nitride, wherein hexagonal boron nitride can be doped with variety dopants in order to alter the physical properties for different sensors (Sung, US 20110163298 A1, [0029]-[0030]).
Regarding claim 14, Figures 8-9 of Lin in view of LIANG teach that the method of claim 1, wherein the one-dimensional material or the two-dimensional material is selected from graphene, hexagonal boron-nitride, carbon nano-tubes, or a combination thereof (hexagonal boron-nitride, [0191], [0216] and [0326] of Lin).
Regarding claim 15, Figures 8-9 of Lin in view of LIANG teach that the method of claim 1, wherein the channel layer (505, [0300], Figure 8 of Lin) comprises graphene and the first layer comprises hexagonal boron nitride (hexagonal boron-nitride, [0191], [0216] and [0326] of Lin).
Regarding claim 16, Figures 8-9 of Lin in view of LIANG teach that the method of claim 1, wherein providing the first layer on the FET base structure comprises forming the first layer on the channel layer (505, [0300], Figure 8 of Lin) after the channel layer has been transferred on to the FET base structure (since the first layer is above the channel layer based on LIANG).
Regarding claim 17, Figures 4 and 8-9 of Lin in view of LIANG teach that the method of claim 1, wherein during transferring the channel layer onto the FET base structure, the channel layer is supported on a supporting body, and wherein the method further comprises separating the supporting body from the channel layer (please see Figure 4 of Lin which teaches growing graphene channel layer on a copper foil and then transferred to substrate 217 for carrying and then separate the channel layer to transfer on the FET base structure in Figure 9D, [0075] and [0080]).
Regarding claim 18, Figures 4 and 8-9 of Lin in view of LIANG teach that the method of claim 17, wherein the supporting body comprises a temporary substrate on which the channel layer is formed (please see Figure 4 of Lin which teaches growing graphene channel layer on a copper foil and then transferred to substrate 217 for carrying and then separate the channel layer to transfer on the FET base structure in Figure 9D, [0075] and [0080]).
Regarding claim 19, Figures 4 and 8-9 of Lin in view of LIANG teach that the method of claim 17, further comprising transferring the channel layer from a temporary substrate on which the channel layer is formed to the supporting body (please see Figure 4 of Lin which teaches growing graphene channel layer on a copper foil and then transferred to substrate 217 for carrying and then separate the channel layer to transfer on the FET base structure in Figure 9D, [0075] and [0080]).
Regarding claim 20, Figures 4 and 8-9 of Lin in view of LIANG teach a field effects transducer manufactured by the method of claim 1 ([0017] of Lin).
Claims 2-4 are rejected under 35 U.S.C. 103 as being obvious over Lin et al (US 20200196925 A1) in view of LIANG et al (US 20170102357 A1) as applied to claim 1 above, and further in view of Shepard et al (US 20160197148 A1).
Regarding claims 2-4, Lin in view of LIANG do not teach that the method of claim 1, wherein providing the first layer on the FET base structure comprises forming the first layer and subsequently transferring the first layer onto the FET base structure, wherein providing the first layer on the channel layer comprises forming the first layer on the channel layer, and wherein the channel layer comprises graphene and the first layer comprises hexagonal boron nitride (hBN), and forming the first layer on the channel layer comprises forming hBN on a surface of the graphene.
However, Shepard is a pertinent art which teaches a graphene device on boron nitride, wherein Shepard teaches that the graphene layer 102 can be transferred to or otherwise affixed or grown on the boron nitride layer 104. In an example, the graphene layer 102 is grown on a separate surface, for example by chemical vapor deposition (CVD) techniques, then transferred to the boron nitride layer 104. In an example, the boron nitride layer 104, can be grown on a separate surface, for example by chemical vapor deposition (CVD) techniques, then transferred to a position in the device 100 ([0055]), wherein the quality of the layers very high ([0067]).
Thus, it would have been obvious to try by one of ordinary skill in the art before the effective filing date of the claimed invention to use a method of forming wherein providing the first layer on the FET base structure comprises forming the first layer and subsequently transferring the first layer onto the FET base structure, wherein providing the first layer on the channel layer comprises forming the first layer on the channel layer, and wherein the channel layer comprises graphene and the first layer comprises hexagonal boron nitride (hBN), and forming the first layer on the channel layer comprises forming hBN on a surface of the graphene in order to have high quality layers according to the teaching of Shepard ([0067]), since it has been held that choosing from a finite number of identified, predictable solutions such transfer method used to form the device, with a reasonable expectation of success is obvious. KSR Int'l v. Teleflex Inc., 127 S.Ct. 1727 (2007).
Response to Arguments
Applicant's arguments filed on 12/18/2025 have been fully considered but they are not persuasive.
Applicant’s main argument regarding claim 1 include: Figures 8-9 of Lin in view of LIANG do not teach “providing a channel layer on the FET base structure, wherein providing the channel layer comprises forming the channel layer separate from the FET base structure and subsequently transferring the channel layer onto the FET base structure” because Lin discloses "transferring the graphene can include coupling graphene to the top face of the wafer via chemical vapor deposition,"( Lin, cited para. 10037]), wherein Chemical vapor deposition (CVD) is a process in which volatile chemical precursors in the gas phase react or decompose at a heated substrate so that a solid film is grown/deposited directly onto that substrate, while reaction byproducts remain gaseous and are removed. In other words, CVD forms the material in situ on the target surface, rather than transferring a pre-formed film.
In response, the Examiner respectfully points out that “A prior art reference must be considered in its entirety, i.e., as a whole, including portions that would lead away from the claimed invention, MPEP § 2141.02”.
Figure 4 of Lin teaches a method for CVD graphene (205) synthesis and transfer procedure according to some embodiments of the disclosed subject matter, including (FIG. 4A) CVD graphene synthesis in quartz tubing furnace and (FIG. 4B) CVD graphene (205) transfer onto the substrate (217), and further FIGS. 9A-D illustrates an exemplary fabrication process of a graphene-based FET nanosensor (502) according to some embodiments of the disclosed subject matter, including (FIG. 9A) Deposition and patterning of 5/45 nm Cr/Au gate electrode (507), (FIG. 9B) deposition of 20 nm HfO2 dielectric layer using ALD (506), (FIG. 9C) fabrication of drain (509) and source (508) electrodes using lift-off, and (FIG. 9D) transfer of graphene (508). Thus, Lin teaches the limitation of “providing a channel layer on the FET base structure, wherein providing the channel layer comprises forming the channel layer separate from the FET base structure and subsequently transferring the channel layer onto the FET base structure”.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to KHAJA AHMAD whose telephone number is (571)270-7991. The examiner can normally be reached on Monday to Friday from 8:00 AM to 5:00 PM (Eastern Time).
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, GAUTHIER STEVEN B, can be reached on (571)270-0373. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/KHAJA AHMAD/
Primary Examiner, Art Unit 2813