Prosecution Insights
Last updated: July 17, 2026
Application No. 18/741,411

SEMICONDUCTOR STRUCTURE AND PREPARATION METHOD THEREOF

Non-Final OA §102§103
Filed
Jun 12, 2024
Priority
Dec 08, 2023 — CN 202311685452.3
Examiner
ALBRECHT, PETER M
Art Unit
Tech Center
Assignee
Enkris Semiconductor Inc.
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
7m
Est. Remaining
74%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
350 granted / 494 resolved
+10.9% vs TC avg
Minimal +4% lift
Without
With
+3.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
32 currently pending
Career history
516
Total Applications
across all art units

Statute-Specific Performance

§103
77.1%
+37.1% vs TC avg
§102
10.8%
-29.2% vs TC avg
§112
10.4%
-29.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 494 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Claim Objections Claims 7, 8, 15 and 16 are objected to because of the following informalities: “the first buffer sub-layers” should read “the second buffer sub-layers” (claim 7, line 6; claim 8, line 6; claim 15, line 6; claim 16, line 6). Appropriate correction is required. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 5, 11 and 12 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by US 2016/0043178 A1 (hereinafter “Liu”). Regarding claim 1, Liu discloses in Figs. 9, 10 and related text a semiconductor structure (100; [0042]), comprising: a substrate (12; [0031]), a buffer layer (18, 22, 24; [0042]), a channel layer (26; [0036]), and a barrier layer (28; [0037]) that are sequentially stacked; wherein the buffer layer comprises carbon element doping ([0042]-[0043]), and the buffer layer comprises a first portion (18; [0042]) and a second portion (24; [0042]) that are distributed in a stack, and wherein the first portion is disposed on a side of the buffer layer adjacent to the substrate, and in a direction of the substrate pointing to the channel layer, a carbon concentration (104; [0042]) in the first portion gradually increases with a preset trend, and a carbon concentration (106; [0042]) in the second portion gradually decreases; and wherein the buffer layer further comprises a first insertion layer (22; [0034]) disposed between the first portion and the second portion, and the first insertion layer comprises an Al composition (aluminum nitride). Regarding claim 2, Liu discloses a band gap of the first insertion layer is greater than a band gap of the first portion and a band gap of the second portion (the first insertion layer may be made of aluminum nitride having a band gap of 6.0-6.2 eV, the first portion may be made of silicon having a band gap of 1.1 eV, and the second portion may be made of gallium nitride having a band gap of 3.4 eV). Regarding claim 3, Liu discloses a material of the first insertion layer is III-nitride (aluminum nitride), and the first insertion layer is a single-layer structure insertion layer or a superlattice insertion layer ([0034]). Regarding claim 5, Liu discloses the carbon concentration in the first portion gradually increasing with the preset trend comprises that the carbon concentration in the first portion increases linearly or periodically (Fig. 10); and/or, the carbon concentration in the second portion gradually decreasing comprises that the carbon concentration in the second portion decreases linearly or periodically (Fig. 10). Regarding claim 11, Liu discloses in Figs. 9, 10 and related text a method for preparing a semiconductor structure (100; [0042]), comprising: providing a substrate (12; [0031]), and sequentially preparing a buffer layer (18, 22, 24; [0042]), a channel layer (26; [0036]), and a barrier layer (28; [0037]) on a side of the substrate; wherein preparing the buffer layer comprises doping the buffer layer with carbon elements ([0042]-[0043]), and preparing the buffer layer comprises preparing a first portion (18; [0042]), a first insertion layer (22; [0042]), and a second portion (24; [0042]) that are distributed in a stack, wherein the first portion is disposed on a side of the buffer layer adjacent to the substrate, and in a direction of the substrate pointing to the channel layer, a carbon concentration (104; [0042]) in the first portion gradually increases with a preset trend, and a carbon concentration (106; [0042]) in the second portion gradually decreases; and the first insertion layer comprises an Al composition (aluminum nitride; [0034]). Regarding claim 12, Liu discloses the carbon concentration in the first portion gradually increasing with the preset trend comprises that the carbon concentration in the first portion increases linearly or periodically (Fig. 10); and/or the carbon concentration in the second portion gradually decreasing comprises that the carbon concentration in the second portion decreases linearly or periodically (Fig. 10). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 4 and 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of US 2015/0021660 A1 (hereinafter “Chen”). Regarding claim 4, Liu discloses the semiconductor structure of claim 1, wherein the first insertion layer comprises the Al composition ([0034]). Liu does not disclose in the direction of the substrate pointing to the channel layer, the Al composition in the first insertion layer gradually increases, gradually decreases, or increases first and then decreases. Chen teaches in Fig. 1 and related text in the direction of the substrate (102; [0024]) pointing to the channel layer (108a; [0029]), the Al composition in the first insertion layer (the graded AlGaN layer forming the uppermost sublayer of nucleation layer 104) gradually decreases ([0025]-[0026]). Liu and Chen are analogous art because they both are directed to semiconductor structures including III-nitride materials and one of ordinary skill in the art would have had a reasonable expectation of success to modify Liu with the specified features of Chen because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, in the direction of the substrate pointing to the channel layer, to form the Al composition in the first insertion layer to gradually decrease, as taught by Chen, in order to reduce a lattice mismatch between the first insertion layer and the overlying second portion of the buffer layer which may be made of gallium nitride (Liu [0035]). Regarding claim 13, Liu discloses the method for preparing the semiconductor structure of claim 11, wherein the first insertion layer comprises the Al composition ([0034]). Liu does not disclose in the direction of the substrate pointing to the channel layer, the Al composition in the first insertion layer gradually increases, gradually decreases, or increases first and then decreases. Chen teaches in Fig. 1 and related text in the direction of the substrate (102; [0024]) pointing to the channel layer (108a; [0029]), the Al composition in the first insertion layer (the graded AlGaN layer forming the uppermost sublayer of nucleation layer 104) gradually decreases ([0025]-[0026]). Liu and Chen are analogous art because they both are directed to semiconductor structures including III-nitride materials and one of ordinary skill in the art would have had a reasonable expectation of success to modify Liu with the specified features of Chen because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, in the direction of the substrate pointing to the channel layer, to form the Al composition in the first insertion layer to gradually decrease, as taught by Chen, in order to reduce a lattice mismatch between the first insertion layer and the overlying second portion of the buffer layer which may be made of gallium nitride (Liu [0035]). Claim(s) 9 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu in view of US 2014/0175517 A1 (hereinafter “Cheng”). Regarding claim 9, Liu discloses the semiconductor structure of claim 1. Liu does not disclose a composition suppression layer disposed between the buffer layer and the channel layer. Cheng teaches in Fig. 2 and related text a composition suppression layer (210; [0021]) disposed between the buffer layer (202; [0021]) and the channel layer (204; [0021]). Liu and Cheng are analogous art because they both are directed to semiconductor structures including III-nitride materials and one of ordinary skill in the art would have had a reasonable expectation of success to modify Liu with the specified features of Cheng because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to form a composition suppression layer between the buffer layer and the channel layer, as taught by Cheng, in order to prevent carbon ions (or atoms) in the carbon-doped buffer layer from diffusing into the channel layer (Cheng [0021] and [0030]). Regarding claim 17, Liu discloses the method for preparing the semiconductor structure of claim 11. Liu does not disclose after preparing the buffer layer on the side of the substrate, the method further comprises: preparing a composition suppression layer on a side of the buffer layer away from the substrate. Cheng teaches in Fig. 2 and related text after preparing the buffer layer (202; [0021]) on the side of the substrate (200; [0021]), the method further comprises: preparing a composition suppression layer (210; [0021]) on a side of the buffer layer away from the substrate. Liu and Cheng are analogous art because they both are directed to semiconductor structures including III-nitride materials and one of ordinary skill in the art would have had a reasonable expectation of success to modify Liu with the specified features of Cheng because they are from the same field of endeavor. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, after preparing the buffer layer on the side of the substrate, the method further comprises: preparing a composition suppression layer on a side of the buffer layer away from the substrate, as taught by Cheng, in order to prevent carbon ions (or atoms) in the carbon-doped buffer layer from diffusing into the channel layer (Cheng [0021] and [0030]). Claim(s) 10 and 18 is/are rejected under 35 U.S.C. 103 as being unpatentable over Liu. Regarding claim 10, Liu discloses the semiconductor structure of claim 1. Liu does not disclose the buffer layer comprises a plurality of stacked structures each of which is formed by a combination of the first portion, the first insertion layer, and the second portion in sequence, and the plurality of stacked structures are sequentially formed on the substrate. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to form the buffer layer to comprise a plurality of stacked structures each of which is formed by a combination of the first portion, the first insertion layer, and the second portion in sequence, and the plurality of stacked structures are sequentially formed on the substrate, because mere duplication of parts has no patentable significance unless a new and unexpected result is produced. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960). MPEP 2144.04(VI)(B). Regarding claim 18, Liu discloses the method for preparing the semiconductor structure of claim 11. Liu does not disclose preparing the buffer layer on the side of the substrate comprises preparing a plurality of stacked structures each of which is formed by a combination of the first portion, the first insertion layer, and the second portion in sequence, and the plurality of stacked structures are sequentially formed on the substrate. It would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to prepare the buffer layer on the side of the substrate such that said preparing comprises preparing a plurality of stacked structures each of which is formed by a combination of the first portion, the first insertion layer, and the second portion in sequence, and the plurality of stacked structures are sequentially formed on the substrate, because mere duplication of parts has no patentable significance unless a new and unexpected result is produced. In re Harza, 274 F.2d 669, 124 USPQ 378 (CCPA 1960). MPEP 2144.04(VI)(B). Allowable Subject Matter Claims 6-8 and 14-16 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: the prior art of record, individually or in combination, does not teach or suggest “the buffer layer further comprises at least one second insertion layer, and a second insertion layer of the at least one second insertion layer comprises an Al composition; wherein the first portion comprises a plurality of first buffer sub-layers, and the at least one second insertion layer is disposed between two adjacent first buffer sub-layers of the plurality of first buffer sub-layers; and/or, the second portion comprises a plurality of second buffer sub-layers, and the at least one second insertion layer is disposed between two adjacent second buffer sub-layers of the plurality of second buffer sub-layers” as recited in claim 6, and “preparing the buffer layer further comprises preparing at least one second insertion layer, and a second insertion layer of the at least one second insertion layer comprises an Al composition; wherein preparing the first portion comprises preparing a plurality of first buffer sub-layers and preparing the second insertion layer between two adjacent first buffer sub-layers in the plurality of first buffer sub-layers; and/or preparing the second portion comprises preparing a plurality of second buffer sub-layers and preparing the second insertion layer between two adjacent second buffer sub-layers of the plurality of second buffer sub-layers” as recited in claim 14. Claims 7 and 8 depend from claim 6 and therefore would be allowable at least by virtue of their dependency. Claims 15 and 16 depend from claim 14 and therefore would be allowable at least by virtue of their dependency. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2023/0170214 A1 discloses a buffer layer (122) comprising a first-type buffer layer (1221) and a second-type buffer layer (1222), wherein the first-type buffer layer (1221) includes a first A buffer layer (1221a) and a first B buffer layer (1221b), and the second-type buffer layer (1222) includes a second A buffer layer (1222a) and a second B buffer layer (1222b) (Fig. 5; [0091] and [0097]). The first A buffer layer (1221a), the first B buffer layer (1221b), the second A buffer layer (1222a), and the second B buffer layer (1222b) may all be doped with carbon ions ([0099]). Any inquiry concerning this communication or earlier communications from the examiner should be directed to PETER M ALBRECHT whose telephone number is (571)272-7813. The examiner can normally be reached M-F 9:30 AM - 6:30 PM (CT). Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lynne Gurley can be reached at (571) 272-1670. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /PETER M ALBRECHT/Primary Examiner, Art Unit 2811
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Prosecution Timeline

Jun 12, 2024
Application Filed
Jun 16, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
74%
With Interview (+3.5%)
2y 9m (~7m remaining)
Median Time to Grant
Low
PTA Risk
Based on 494 resolved cases by this examiner. Grant probability derived from career allowance rate.

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