Prosecution Insights
Last updated: July 17, 2026
Application No. 18/742,750

REACTIVE ION BEAM ETCHING

Non-Final OA §103
Filed
Jun 13, 2024
Priority
Dec 15, 2023 — RE 10-2023-0182550
Examiner
SCHOENHOLTZ, JOSEPH
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
86%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allowance Rate
1197 granted / 1312 resolved
+31.2% vs TC avg
Minimal -5% lift
Without
With
+-4.9%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 9m
Avg Prosecution
11 currently pending
Career history
1325
Total Applications
across all art units

Statute-Specific Performance

§101
0.8%
-39.2% vs TC avg
§103
74.3%
+34.3% vs TC avg
§102
5.0%
-35.0% vs TC avg
§112
11.9%
-28.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1312 resolved cases

Office Action

§103
DETAILED ACTION This Office Action is in response to Applicant’s application 18/742,750 filed on June 13, 2024 in which claims 1 to 20 are pending. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings submitted on June 13, 2024 have been reviewed and accepted by the Examiner. Information Disclosure Statement The Information Disclosure Statement (IDS), filed on June 13, 2024 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosed therein has been considered by the Examiner. Priority Receipt is acknowledged of paper submitted under 35 U.S.C. 119(a)-(d) or under 35 U.S.C. 120, 121, 365(c), or 386(c) which has been placed of record in the file. Notation References to patents will be in the form of [C:L] where C is the column number and L is the line number. References to pre-grant patent publications will be to the paragraph number in the form of [xxxx]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. PNG media_image1.png 360 597 media_image1.png Greyscale Claims 1-5, 7 and 11-18 are rejected under 35 U.S.C. 103 as being unpatentable over U.S. 2021/00747762 (Tsubata) and U.S. 2022/0131071 (Lill). Regarding claim 1 Tsubtata discloses an ion beam etching method PNG media_image2.png 620 605 media_image2.png Greyscale comprising: preparing a substrate, 20 [0061], on which a plurality of magnetic random access memory (MRAM) stacks, 24 [0035], are provided; PNG media_image3.png 528 548 media_image3.png Greyscale performing a main etching using ion beam etching, IB1 and IB2 [0060-61, 69-71], such that sidewalls of the plurality of MRAM stacks have a target angle of inclination, as shown; and wherein the performing the main etching comprises: performing a first main etching using ion beam etching, e.g., IB1 [0060-61], on the plurality of MRAM stacks at a first incidence angle, [Symbol font/0x71]I1 at e.g., 30-60 degrees with respect to an upper surface of the substrate; and after performing the first main etching, performing a second main etching using ion beam etching on the plurality of MRAM stacks at a second incidence angle, [Symbol font/0x71]I2 e.g. 0-30 degrees [0070], that is smaller than the first incidence angle, e.g., 10 is smaller than 50. PNG media_image4.png 432 705 media_image4.png Greyscale At Figure 9, Tsubata teaches re-deposited material 42/51 [0082] on sidewalls of the MRAM stack 24. Tsubata does not teach removing a conductive etching by-product redeposited on the sidewalls of the plurality of MRAM stacks during the main etching by performing trim etching using ion beam etching. Lill is directed to process improvements for MRAM devices. At [0053], Lill teaches; [0053] The main etch may result in re-deposition of electrically conductive materials on sidewalls of the patterned MRAM stacks. The re-deposited electrically conductive materials may come from one or more magnetic layers in the plurality of MRAM layers. Typically, in etching the one or more magnetic layers of the plurality of MRAM layers, etch byproducts are produced that may be re-deposited on exposed surfaces. The etched byproducts may include atoms or molecules of metals or electrically conductive materials. These etch byproducts are sputtered when an ion beam is applied to the plurality of MRAM layers. The one or more magnetic layers may include non-volatile materials, where the non-volatile materials may include magnetic materials such as Co, Ni, Pt, Fe, and the like. When such etch byproducts are re-deposited on sidewall surfaces of the tunnel barrier layer, the MTJ stack is compromised and can lead to shorting. [0072] FIG. 6E shows a cross-sectional schematic illustration of an example IBE trim etch process following the etchback process of FIG. 6D according to some implementations. The remaining gapfill dielectric material 680 serves as an etch front during the IBE trim etch process. During the IBE trim etch process, an ion beam 625 is provided at relatively low ion energies and an optimized angle of incidence for cleaning the sidewalls of the patterned MRAM stacks 620a, 620b. The ion beam 625 removes the residue 605 from the sidewalls of the patterned MRAM stacks 620a, 620b as the IBE trim etch process proceeds. Sputtered atoms and/or molecules 675 from the ion beam 625 may be directed towards the sidewalls of the patterned MRAM stacks 620a, 620b. However, the sputtered atoms and/or molecules 675 include dielectric materials from the remaining gapfill dielectric material 680 that do not adversely impact the properties of the patterned MRAM stacks 620a, 620b. The IBE trim etch process proceeds to an etch depth that is below the depth of tunnel barrier layer 670 and above the underlayer 630. In some implementations, the IBE trim etch process does not proceed significantly into the underlayer 630. Exposed sidewalls of the patterned MRAM stacks 620a, 620b are free of the residue 605 containing electrically conductive materials or magnetic materials At [0028], Lill teaches; [0028] The ion beam 225 applied to the substrate 210 may be directed at an angle. An angle of incidence of the ion beam 225 may be adjusted to control parameters such as etch rates, uniformity, shapes, topography, and composition of target surfaces. In some instances, the angle of incidence of the ion beam 225 is adjusted to clean sidewalls of re-deposited materials. A lower angle of incidence (i.e., more vertical) of the ion beam 225 can lead to more re-deposition of materials, whereas an optimized higher angle of incidence (i.e., less vertical) of the ion beam 225 can lead to cleaner sidewall surfaces by removing re-deposited materials. Furthermore, as device density increases and aspect ratios increase, the feasibility of using higher incident angles in cleaning sidewall surfaces becomes more limited. At [0043-44], Lill teaches; [0043] Ion beam etching through the layers of the MRAM stack 400 may be performed to form patterned MRAM stacks, where the patterned MRAM stacks can include lines, pillars, or other patterned features. Ion beam etching to form patterned MRAM stacks may be performed at high power and a relatively low angle of incidence. In addition, ion beam etching may be performed to clean sidewalls of the patterned MRAM stacks in order to remove unwanted materials re-deposited on the sidewalls after forming the patterned MRAM stacks. Ion beam etching to clean sidewalls of the patterned MRAM stacks may be performed at a lower power and a relatively high angle of incidence from a substrate surface normal. [0044] In FIG. 4A, an ion beam 425 may be directed at an angle to clean sidewalls of patterned MRAM stacks. For example, the substrate 410 may be tilted or rotated to adjust the ion impact angle of the ion beam 425. The ion beam 425 impacts sidewalls of the patterned MRAM stacks to remove unwanted materials. The ion beam 425 also impacts a bottom surface of the MRAM stack 400 and causes atoms and molecules at the bottom surface to be sputtered. Sputtered atoms and molecules 475 may be directed towards sidewalls of the patterned MRAM stacks, which results in re-deposition on the sidewalls of the patterned MRAM stacks. When an etch front for the ion beam 425 has electrically conductive materials (e.g., metals), at least some of the electrically conductive materials may be re-deposited on the sidewalls of the patterned MRAM stacks. In FIG. 4A, when the etch front for the ion beam 425 includes the second magnetic layer 460, magnetic elements having Co, Ni, Pt, or Fe may be re-deposited on sidewalls of the patterned MRAM stacks, which can degrade the electrical and magnetic performance of the MRAM stack 400. Lill teaches that during a main ion beam etching process, conductive material is redeposited on the sidewalls which may lead to shorting. Lill teaches a trim etching process, [0068], using ion beam etching, [0069], is a useful method to remove conductive etching by products. Taken as a whole the prior art is directed to methods of forming MRAM devices. Tsubata teaches an ion beam etching process of claim 1 results in material of the MRAM stack being re-deposited on sidewalls of the stack. Lill teaches re-deposited materials from etching an MRAM stack with and ion beam are conductive and lead to shorting of the device. Lill teaches a trim etching process using ion beam etching to remove the redeposited materials that would lead to device failure. An artisan would find it desirable to improve the yield of the MRAM stacks. Accordingly it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to modify Tsubata’s method by removing a conductive etching by-product redeposited on the sidewalls of the plurality of MRAM stacks during the main etching by performing trim etching using ion beam etching, as taught by Lill, to improve device yield as taught by Lill and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). Regarding claim 2 which depends upon claim 1, at [0028], Tsubata teaches the first incidence angle is in a range of 30° to 60°, and Lill teaches the trim etching is performed at a third incidence angle, described as a relatively low angles of incidence at [0028] and relatively high angles [0043] that the third incidence angle can be adjusted [0044] to clean the sidewalls. Lill teaches at [0067], the third angle of incidence can be optimized to remove unwanted residue. Accordingly it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 1 wherein the first incidence angle is in a range of 50° to 80°, wherein the trim etching is performed at a third incidence angle, and wherein the third incidence angle is in a range of 30° to 50° because Lill teaches that the angle of incidence is a variable used to select and optimize the profile of the MRAM stack and teaches that the angle of incidence is a variable to be optimized to remove unwanted residue and because in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art”, a prima facie case of obviousness exists. In re Woodruff, 919 F.2d 1575 (Fed. Cir. 1990). See MPEP 2144.05. Regarding claim 3 which depends upon claim 2, Tsubata teaches [Symbol font/0x71]I1 at e.g. 30-60 degrees and [Symbol font/0x71]I2 e.g. 0-30 degrees and Lill teaches that the angle of incidence is a variable to be optimized for pillar shape. Accordingly, it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 2 wherein the second incidence angle is smaller than the first incidence angle by a range of 2° to 10° because in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art”, a prima facie case of obviousness exists. In re Woodruff, 919 F.2d 1575 (Fed. Cir. 1990). See MPEP 2144.05. Regarding claim 4 which depends upon claim 1, Lill teaches main ion beam etching process use a high voltage beam between 400 and 2000 V at [0050], and the trim etching uses low voltages between 30 and 400V at [0050]. Lill teaches the voltage is used to control the etch rate during ion beam etching at [0015]. Accordingly it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 1 wherein a first ion beam intensity of the first main etching and a second ion beam intensity of the second main etching are in a range of about 500 V to about 10000 V, and wherein a third ion beam intensity of the trim etching is in a range of about 50 V to about 400 V because Lill teaches the voltage of the beam is a variable used to control etch rate and because in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art”, a prima facie case of obviousness exists. In re Woodruff, 919 F.2d 1575 (Fed. Cir. 1990). See MPEP 2144.05. Regarding claim 5 which depends upon claim 1, Lill suggest an ion beam of the trim etching has an intensity such that each of the plurality of MRAM stacks is not substantially etched at [0043, 51] and Examiner takes the position that to do so is merely an optimization of bean intensity to maintain or optimize the profile of the MRAM stack, i.e. a soft or no etch. Regarding claim 7 which depends upon claim 1, at [0082] Tsubata teaches the performing the second main etching comprises partially removing the redeposited conductive etching by-product. Regarding claim 11 which depends upon claim 1, Tsubata teaches at [0034], the plurality of MRAM stacks comprise a lower electrode layer, 21 [0057], an upper electrode layer, 35 [0046], and a magnetic tunnel junction (MTJ) stack, 24 [0082], between the lower electrode layer and the upper electrode layer. Regarding claim 12 which depends upon claim 11, Tsubata teaches at [0036], the MTJ stack comprises a first magnetic layer, 31 [0034], a second magnetic layer, 35 [0046], and a magnetic tunnel barrier layer, 32 [0038], between the first magnetic layer and the second magnetic layer, as shown, and wherein the magnetic tunnel barrier layer comprises a non-magnetic insulating material e.g., MgO [0038]. Regarding claim 13 which depends upon claim 1, Lill teaches at claim 16 the redeposited conductive etching by-product comprises at least one of tungsten W, titanium (Ti), tantalum (Ta), titanium nitride (TiN), tantalum nitride (TaN), cobalt (Co), nickel (Ni), iron (Fe), platinum (Pt), ruthenium (Ru), and a combination thereof. PNG media_image5.png 355 556 media_image5.png Greyscale Regarding claim 14 which depends upon claim 1, Lill teaches after the removing the conductive etching by-product redeposited on the sidewalls of the plurality of MRAM stacks, forming an insulating protective layer, 690 [0074], on the sidewalls of the plurality of MRAM stacks at Figure 6F. Regarding claim 15 and referring to the discussion at claim 1, Tsubata teaches an ion beam etching method comprising: forming a plurality of stacks, 24 [0035], on a substrate, 20 [0061], each of the plurality of stacks comprising a lower electrode layer, 21 [0057], an upper electrode layer, 35 [0050], and at least one dielectric layer, 32 [0052], between the lower electrode layer and the upper electrode layer, as shown; performing a main etching using ion beam etching, IB1/IB2 [0061-70], such that sidewalls of the plurality of stacks have a target angle of inclination as shown; and wherein the performing the main etching comprises: performing a first main etching using ion beam etching, IB1 [0061-70], on the plurality of stacks at a first incidence angle, [Symbol font/0x71]I1 at e.g. 30-60 degrees, with respect to an upper surface of the substrate; and after performing the first main etching, performing a second main etching using ion beam etching, IB2 [0061-70], on the plurality of stacks at a second incidence angle, [Symbol font/0x71]I2 e.g. 0-30 degrees [0070], that is smaller than the first incidence angle, 10 is smaller than 50. Tsubata does not teach removing a conductive etching by-product redeposited on the sidewalls of the plurality of stacks during the main etching by performing trim etching using ion beam etching. Lill teaches removing a conductive etching by-product redeposited on the sidewalls of the plurality of stacks during the main etching by performing trim etching using ion beam etching For the reasons discussed at claim 1 it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to modify Tsubata’ s method by removing a conductive etching by-product redeposited on the sidewalls of the plurality of MRAM stacks during the main etching by performing trim etching using ion beam etching, as taught by Lill, to improve device yield as taught by Lill and because the combination of familiar elements according to known methods is likely to be obvious when it does no more than yield predictable results. KSR International Co. v. Teleflex Inc., 550 U.S. 398, 416 (2007). Regarding claim 16 which depends upon claim 15, at [0028], Tsubata teaches the first incidence angle is in a range of 30° to 60°, and the second angle of incidence is 0-30 degrees. Lill teaches that the angle of incidence is a variable used to select and optimize the profile of the MRAM stack. Accordingly it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 15 wherein the first incidence angle is in a range of 50° to 80°, and wherein the second incidence angle is in a range of 2° to 10° smaller than the first incidence angle because Lill teaches that the angle of incidence is a variable used to select and optimize the profile of the MRAM stack and because in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art”, a prima facie case of obviousness exists. In re Woodruff, 919 F.2d 1575 (Fed. Cir. 1990). See MPEP 2144.05. Regarding claim 17 which depends upon claim 16, Lill teaches the trim etching is performed at a third incidence angle, described as a relatively low angles of incidence at [0028] or relatively high angles at [0043] and that the third incidence angle can be adjusted [0044] to clean the sidewalls and further teaches at [0067], the third angle of incidence can be optimized to remove unwanted residue. Accordingly it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim 16 wherein the trim etching is performed at a third incidence angle, and wherein the third incidence angle is in a range of 30° to 50° because Lill teaches the angle can be relatively high or relatively low and further that it is optimized to remove the redeposited material and because in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art”, a prima facie case of obviousness exists. In re Woodruff, 919 F.2d 1575 (Fed. Cir. 1990). See MPEP 2144.05. Regarding claim 18 which depends upon claim 15, Lill teaches main ion beam etching process use a high voltage beam between 400 and 2000 V at [0050] and the trim etching uses low voltages between 30 and 400V at [0050]. Lill teaches the voltage is used to control the etch rate during ion beam etching at [0015]. Accordingly, it would have been obvious to a person of ordinary skill in the art at the time of Applicant’s invention to configure the method of claim wherein a first ion beam intensity of the first main etching and a second ion beam intensity of the second main etching are in a range of about 500 V to about 5000 V, and wherein a third ion beam intensity of the trim etching is in a range of about 50 V to about 400 V because Lill teaches the voltage of the beam is a variable used to control etch rate and because in the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art”, a prima facie case of obviousness exists. In re Woodruff, 919 F.2d 1575 (Fed. Cir. 1990). See MPEP 2144.05. Allowable Subject Matter Claims 6 and 8-10 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Regarding claim 6 the prior art fails to disclose the method of claim 1, wherein a first ion beam intensity of the first main etching is up to 10% less than a second ion beam intensity of the second main etching. Regarding claim 8 the prior art fails to disclose the method of claim 1, wherein a time ratio of an amount of time of the first main etching to an amount of time of the second main etching is in a range of 1:1 to 1:2. Regarding claim 9 the prior art fails to disclose the method of claim 1, wherein the performing the main etching further comprises, after the performing the second main etching, performing a third main etching using ion beam etching on the plurality of MRAM stacks at a third incidence angle that is smaller than the second incidence angle. Regarding claim 10 the prior art fails to disclose the method of claim 1, wherein the performing the main etching further comprises: after the performing the second main etching, performing a third main etching using ion beam etching on the plurality of MRAM stacks at a third incidence angle that is greater than the second incidence angle; and after the performing the third main etching, performing a fourth main etching using ion beam etching on the plurality of MRAM stacks at a fourth incidence angle that is smaller than the third incidence angle. Claim 19-20 are allowed. The following is an examiner’s statement of reasons for allowance: Regarding claim 19 the prior art fails to disclose an ion beam etching method comprising: preparing a substrate on which a plurality of magnetic random access memory (MRAM) stacks are provided; performing a first main etching using ion beam etching on the plurality of MRAM stacks at a first incidence angle with respect to an upper surface of the substrate such that sidewalls of the plurality of MRAM stacks have a first angle of inclination; performing a second main etching using ion beam etching on the plurality of MRAM stacks at a second incidence angle that is smaller than the first incidence angle, such that the sidewalls of the plurality of MRAM stacks have a second angle of inclination that is smaller than the first angle of inclination; and removing a conductive etching by-product layer redeposited on the sidewalls of the plurality of MRAM stacks during the first main etching and the second main etching by performing trim etching using ion beam etching, wherein the conductive etching by-product layer is redeposited on the sidewalls of the plurality of MRAM stacks during the first main etching at a first thickness and during the second main etching at a second thickness that is smaller than the first thickness. Claim 20 depends upon claim 19 and is allowable on that basis. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure is listed on the notice of references cited. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Joe Schoenholtz whose telephone number is (571)270-5475. The examiner can normally be reached M-Thur 7 AM to 7 PM PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Ms. Yara Green can be reached at (571) 272-3035. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.E. Schoenholtz/Primary Examiner, Art Unit 2893
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Prosecution Timeline

Jun 13, 2024
Application Filed
Jun 10, 2026
Non-Final Rejection mailed — §103
Jul 09, 2026
Interview Requested
Jul 16, 2026
Applicant Interview (Telephonic)
Jul 16, 2026
Examiner Interview Summary

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