DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election, without traverse, of Group I: claims 1-12, in the “Response to Election / Restrict. ion Filed - 07/14/2026”, is acknowledged.
This office action considers claims 1-15 are thus pending for prosecution, of which, non-elected claims 13-15 are withdrawn, and elected claims 1-12 are examined on their merits.
Claim Objections
Claim 7 recites the limitation “third" in line phrase “wherein the fourth superconducting metal layer is in contact with the ‘third’ superconducting metal layer and the fifth superconducting metal layer”, and it appears as if Applicant’s representative meant to write “wherein the fourth superconducting metal layer is in contact with the [[third ]] –second-- superconducting metal layer and the fifth superconducting metal layer”,.
See the instant specification paragraph [0156] the third superconducting metal layer 340 in contact with the first superconducting metal layer 310, the fourth superconducting metal layer 450 in contact with the second superconducting metal layer 320, and the fifth superconducting metal layer 460 in contact with the fourth superconducting metal layer 450 may be used as wirings coupled to the Josephson device 3. Examiner observation is that the claimed phrase “wherein the fourth superconducting metal layer is in contact with the ‘third’ superconducting metal layer” makes the the Josephson device 3 inoperative.
Appropriate correction is required. For the prosecution on merit, examiner assumes the phrase as appeared i.e. “wherein the fourth superconducting metal layer is in contact with the [[third ]] –second-- superconducting metal layer and the fifth superconducting metal layer”.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Notes: when present, semicolon separated fields within the parenthesis (; ;) represent, for example, as 30; Fig 1L; [0034]) or C 18, L 18-37)= (element 30; Figure No. 1l; Paragraph No. [0034]) or Column No 18, Line Nos. 18-17. For brevity, the texts “Element”, “Figure No.” and “Paragraph No.” shall be excluded, though; additional clarification notes may be added within each field. The number of fields may be fewer or more than three indicated above. The primary reference, in this case Ishida, citation may not be preceded by the inventor tag, wherein the other reference citation, for example Chang, will carry inventor tag. These conventions are used throughout this document.
Claims 1-2 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Ishida; Ichiro (US 5304817 A) hereinafter Ishida.
Regarding Claim 1. Ishida teaches a Josephson device (43; fig 4; C 5, L 6) comprising: (see the entire document, Figs 4 to 6, along with other figures 1 to 3 referenced subject matter for details, specifically, as cited below):
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Ishida Figure 4 Figure 6
a first superconducting metal layer (43a; C 5, L 1-34; first cited as 3 in Fig 2; C 3 L 10-67) that includes a first surface (top);
a second superconducting metal layer (43c first cited as 5 in Fig 2) that includes a second surface (bottom of 43c) that faces the first surface; and
an insulating layer (43b, first cited as 4 in Fig 2) provided between the first surface and the second surface,
wherein an outline of the second surface (bottom of 43c) is inside an outline of the first surface (top of 43b) in a plan view (Fig 4) from a direction perpendicular to the first surface.
Regarding Claim 2. Ishida as applied to the Josephson device according to claim 1, further teaches, wherein
the first surface (top of 43a) and the second surface (bottom of 43c; Fig 4) have a circular shape (fig 4), and
a diameter of the second surface (bottom of 43c) is smaller (depicted in Fig 4 than a diameter of the first surface (top of 43a).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable over Ishida; Ichiro (US 5304817 A) hereinafter Ishida.
Regarding Claim 3. Ishida as applied to the Josephson device according to claim 1, but does not expressly disclose in the embodiment pf figured 4 to 6 wherein the first superconducting metal layer (43a) and the second superconducting metal layer (43c) include Al, Nb Nb nitride, Ta, Ta nitride, or Ti nitride.
Nevertheless, Ishida, in first embodiment of figs 1-3, teaches wherein electrode 5 is Nb (C 3, L 40).
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate the particular features, structures, materials, or characteristics of other embodiments into the embodiment of Figs 4 to 6, as described in the preceding paragraph, since a person skilled in the art could have easily conceived of forming the first superconducting metal layer (43a) and the second superconducting metal layer (43c) with Nb using the invention disclosed in in first embodiment of figs 1-3.
Claims 4-11 are rejected under 35 U.S.C. 103 as being unpatentable over Ishida; Ichiro (US 5304817 A) hereinafter Ishida; in view of Chang; Josephine et al. (US 20170033273 A1) hereinafter Chang.
Regarding Claim 4. Ishida teaches a superconducting circuit (superconductive circuit; Figs 4 to 6; C 5, L 1-34) comprising:
a substrate (a substrate 41);
a third superconducting metal layer (42; Figs 5-6) formed on the substrate;
the Josephson device (43) according to claim 1, which is formed on the third superconducting metal layer (42) and in which the first superconducting metal layer (43a) is in contact with the third superconducting metal layer (42); and
But, Ishida does not expressly disclose a fourth superconducting metal layer coupled to the second superconducting metal layer (43c).
However, in the analogous art, Chang teaches a superconducting techniques, and more specifically, to a trilayer Josephson junction [0003], wherein (Fig 1l; [0034,0046]) a fourth electrode (30; Fig 1j; [0034]) is formed over JJ structure 100 having a first superconducting metal layer (10) a second superconducting metal layer 20 sandwiched by insulating layer 15, the contact bridge 30 is a metal such as Nb. Chang further teaches a fifth metal layer 21B over substrate 5 and a hollow space 35.
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Chang Figure 1L
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Chang teaching into Ishida such that thereafter the combination of (Ishida and Chang)’s circuit comprises a fourth superconducting metal layer (Chang 30) coupled to the second superconducting metal layer (43c) and fifth metal layer (Chang 21B), since, this inclusion, at least, provides an electrical connection between the second electrode and fifth electrode (Chang 0046])
Regarding Claim 5. the combination of (Ishida and Chang) as applied to the superconducting circuit according to claim 4, further teaches, wherein a periphery of the Josephson device is hollow (Chang 35).
Regarding Claim 6. the combination of (Ishida and Chang) as applied to the superconducting circuit according to claim 4, further teaches, (the circuit) further comprising a dielectric layer (44; Figs 4 to 6) that surrounds a periphery of the Josephson device (43).
Regarding Claim 7. the combination of (Ishida and Chang) as applied to the superconducting circuit according to claim 4, further teaches, (the circuit) further comprising
a fifth superconducting metal layer (Chang 21B) formed on the substrate (41/ Chang 5),
wherein the fourth superconducting metal layer (Chang 30) is in contact with the [third]] –second-- (see claim objection in section 1, supra) superconducting metal layer (43c) and the fifth superconducting metal layer (Chang 21B).
Regarding Claim 8. the combination of (Ishida and Chang) as applied to the superconducting circuit according to claim 4, further teaches, wherein the fifth superconducting metal layer (Chang 21B) includes Al, Nb (21B is portion of 20 that is specified as Nb in [0036]), Nb nitride, Ta, Ta nitride, or Ti nitride.
Regarding Claim 9. the combination of (Ishida and Chang) as applied to the superconducting circuit according to claim 4, further teaches, wherein a trench (30a; Fig 3A) is formed in a region around the Josephson device in a plan view of a surface of the substrate (41/1).
Regarding Claim 10. the combination of (Ishida and Chang) as applied to the superconducting circuit according to claim 4, further teaches, wherein a recess (42a; Figs 4 to 6) is formed on a surface of the substrate (1/41) below the Josephson device (43), and a space exists between the third superconducting metal layer (42 Figs 5-6) and the substrate (1/41).
Regarding Claim 11. the combination of (Ishida and Chang) as applied to the superconducting circuit according to claim 4, further teaches, wherein the third superconducting metal layer (42) and the fourth superconducting metal layer (Chang 30) include Al, Nb (Chang [0034])) , Nb nitride, Ta, Ta nitride, or Ti nitride.
Claims 12 is rejected under 35 U.S.C. 103 as being unpatentable over Ishida; Ichiro (US 5304817 A) hereinafter Ishida in view of Rigetti; Chad T. et al. (US 20160093790 A1) hereinafter Rigetti.
Regarding Claim 12. Ishida does not expressly disclose a quantum operation device comprising the superconducting circuit according to claim 4.
However it is well known in the art a quantum computing circuit is formed using a Josephson Junction. For example, in the analogous art, Rigett teaches, in [0018], a quantum computing circuit is formed using a Josephson.
Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to incorporate Rigett teaching into Ishida such that , a quantum operation device comprising the superconducting circuit according to claim 4, since, a person skilled in the art could have easily conceived of forming a quantum computing device using the invention disclosed by Rigett.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MOAZZAM HOSSAIN whose telephone number is (571)270-7960. The examiner can normally be reached M-F: 8:30AM - 6:00 PM.
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/MOAZZAM HOSSAIN/Primary Examiner, Art Unit 2898
July 31, 2026
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