Prosecution Insights
Last updated: October 02, 2026
Application No. 18/745,412

DISPLAY DEVICE AND METHOD OF MANUFACTURING DISPLAY DEVICE

Non-Final OA §102§103
Filed
Jun 17, 2024
Priority
Sep 25, 2023 — RE 10-2023-0128607
Examiner
SEDOROOK, DAVID PAUL
Art Unit
Tech Center
Assignee
Samsung Display Co., Ltd.
OA Round
1 (Non-Final)
92%
Grant Probability
Favorable
1-2
OA Rounds
9m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 92% — above average
92%
Career Allowance Rate
140 granted / 153 resolved
+31.5% vs TC avg
Moderate +8% lift
Without
With
+7.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 0m
Avg Prosecution
29 currently pending
Career history
166
Total Applications
across all art units

Statute-Specific Performance

§103
66.3%
+26.3% vs TC avg
§102
27.8%
-12.2% vs TC avg
§112
5.5%
-34.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 153 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restriction Applicant’s election of Claims 1-12 and 20, drawn to a device, without traverse, has been entered. Claims 1-20 remain pending. Claims 13-19 are withdrawn from consideration. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 6-8, and 11-12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Takahashi (US 2022/0238840). Regarding Claim 1, Takahashi discloses a display device (display device DSP [0031] Fig 5) comprising: a light emitting portion (display element 20 [0033] in opening portion OP [0042] Fig 5) disposed on a base layer (base material 10 [0031] Fig 5); a partition wall (barrier wall 13, organic layer OR’, and E2’ [0062] Fig 5) disposed adjacent to the light emitting portion (20 in opening portion OP Fig 5); and a partition wall insulating layer (insulator I [0073] Fig 5) covering at least a portion of the partition wall (13, OR’, E2’ Fig 5), wherein the partition wall (13, OR’, E2’ Fig 5) includes: a first partition wall layer (13 Fig 5); a second partition wall layer (OR’ Fig 5) disposed on the first partition wall layer (13 Fig 5); and a third partition wall layer (E2’ Fig 5) disposed on the second partition wall layer (OR’ Fig 5), the third partition wall layer (E2’ Fig 5) includes a Transparent Conductive Oxide (TCO) material (second electrode E2/second electrode E2’ is formed by a transparent conductive material [0043]), and the partition wall insulating layer (I Fig 5) does not cover a top surface of the light emitting portion (20 in opening portion OP Fig 5). Regarding Claim 6, Takahashi discloses the limitations of claim 1 as explained above. Takahashi further discloses wherein the partition wall insulating layer (I Fig 5) covers a side surface of each of the first partition wall layer (13 Fig 5), the second partition wall layer (OR’ Fig 5), and the third partition wall layer (E2’ Fig 5). Regarding Claim 7, Takahashi discloses the limitations of claim 1 as explained above. Takahashi further discloses wherein the partition wall insulating layer (I Fig 5) is in contact with at least a portion of a side surface of the light emitting portion (20 in opening portion OP Fig 5), and the first partition wall layer (13 Fig 5) is in contact with the second partition wall layer (OR’ Fig 5), and the third partition wall layer (E2’ Fig 5) is in contact with the second partition wall layer (OR’ Fig 5). Regarding Claim 8, Takahashi discloses the limitations of claim 6 as explained above. Takahashi further discloses wherein the partition wall insulating layer (I Fig 5) does not cover a top surface (shown in Fig 5) of the third partition wall layer (E2’ Fig 5). Regarding Claim 11, Takahashi discloses the limitations of claim 1 as explained above. Takahashi further discloses further comprising: a second electrode (second electrode E2 [0040] Fig 5) disposed on the light emitting portion (20 in opening portion OP Fig 5); and an auxiliary electrode (third electrode E3 [0062] Fig 5) disposed on the second electrode (E2 Fig 5), the auxiliary electrode (E3 Fig 5) being electrically connected to the second electrode (E2 Fig 5). Claims 1-3 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Choung et al’983 (US 11348983) (the examiner notes that claim 1 is again rejected in order to reject dependent claim 2). Regarding Claim 1, Choung et al’983 discloses a display device (sub-pixel circuit 100 [column 4, lines 43-67] Fig 1B) comprising: a light emitting portion (area of sub-pixels 106 [column 5, lines 12-27] Fig 1B) disposed on a base layer (substrate 102 [column 4, lines 43-67] Fig 1B); a partition wall (base portion of overhang structure 110A, body portion 110C, and top portion of overhang structure 110B [column 5, lines 25-47] Fig 1B) disposed adjacent to the light emitting portion (area of 106 Fig 1B); and a partition wall insulating layer (global encapsulation layer 120 [column 7, lines 16-30] Fig 1B) covering at least a portion of the partition wall (110A, 110B, 110C Fig 1B), wherein the partition wall (110A, 110B, 110C Fig 1B) includes: a first partition wall layer (110A Fig 1B); a second partition wall layer (110C Fig 1B) disposed on the first partition wall layer (upper 110A Fig 1B); and a third partition wall layer (110B Fig 1B) disposed on the second partition wall layer (110C Fig 1B), the third partition wall layer (110B Fig 1B) includes a Transparent Conductive Oxide (TCO) material (overhang structures (110) (which may be 110B) may include a conductive oxide which may include a TCO material [column 3, lines 35-60]), and the partition wall insulating layer (120 Fig 1A) does not cover a top surface of the light emitting portion (area of 106 Fig 1A). Regarding Claim 2, Choung et al’983 discloses the limitations of claim 1 as explained above. Choung et al’983 further discloses wherein the first partition wall layer (110A Fig 1B) and the third partition wall layer (110B Fig 1B) protrude outwardly (shown in Fig 1B) of the second partition wall layer (110C Fig 1B) in a direction in which a plane on which the base layer (102 Fig 1B) is disposed extends. Regarding Claim 3, Choung et al’983 discloses the limitations of claim 2 as explained above. Choung et al’983 further discloses wherein the second partition wall layer (110C Fig 1B) includes a reflective metal material (110 (which may be 110C) may also include metal alloy material, which is a reflective material [column 3, lines 35-60]), and the first partition wall layer ((overhang structures (110) (which may be 110A) may include a conductive oxide which may include a TCO material [column 3, lines 35-60]) includes a TCO material. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim 4-5 are rejected under 35 U.S.C. 103 as being unpatentable over Choung et al’983 (US 11348983) in view of Choung et al’812 (US 2017/036812). Regarding Claim 4, Choung et al’983 discloses the limitations of claim 3 as explained above. Choung et al’983 further discloses wherein the first partition wall layer (110A Fig 1B) includes at least one selected from the group consisting of Indium Tin Oxide (ITO) ((overhang structures (110) (which may be 110A) may include a conductive oxide which may include indium tin oxide ITO [column 3, lines 35-60]), Indium Zinc Oxide (IZO), Indium Gallium Zinc Oxide (IGZO), and Aluminum Zinc Oxide (AZO), the second partition wall layer (110C Fig 1B) includes at least one of silver (Ag) and aluminum (Al) ((overhang structures (110) (which may be 110C) may include a transition metal which may be silver Ag [column 3, lines 35-60]), and the third partition wall layer (110B Fig 1B) includes an TCO material ((overhang structures (110) (which may be 110B) may include a conductive oxide which may include a TCO material [column 3, lines 35-60]). Choung et al’983 does not directly disclose the third partition wall layer includes an amorphous TCO material. Choung et al’812, in the related art of semiconductor devices that include display devices, discloses protective layers (241-243 [0059] Fig 6I) includes an amorphous TCO material (amorphous transparent oxide material (amorphous TCO) [0059]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Choung et al’983 to include the third partition wall layer includes an amorphous TCO material as taught by Choung et al’812 in order to add protection as well as conductivity [0061]. Further, a person of ordinary skill in the art would have recognized that adding protection as well as conductivity would optimize the functioning capability will improving the reliability and durability of the device (see MPEP 2143.I(D)). Additionally, a person of ordinary skill in the art would have recognized that having a TCO material be amorphous would be a simple substitution of one known element for another to obtain predictable results (see MPEP 2143.I(B) (suitable alternate)). Regarding Claim 5, Choung et al’983 discloses the limitations of claim 3 as explained above. Choung et al’983 does not directly disclose wherein the first partition wall layer has a thickness in a range of about 30 Angstroms to about 100 Angstroms, the second partition wall layer has a thickness in a range of about 4000 Angstroms to about 10000 Angstroms, and the third partition wall layer has a thickness in a range of about 500 Angstroms to about 2000 Angstroms. Choung et al’812, in the related art of semiconductor devices that include display devices, discloses wherein the protective layers (241 to 243 Fig 6I) may be a thickness of 100 to 300 Angstroms [0061]. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Choung et al’983 to include wherein the first partition wall layer has a thickness in a range of about 30 Angstroms to about 100 Angstroms, the second partition wall layer has a thickness in a range of about 4000 Angstroms to about 10000 Angstroms, and the third partition wall layer has a thickness in a range of about 500 Angstroms to about 2000 Angstroms, as taught by Choung et al’812 in order to optimize the protective capability of the device while meeting small size requirements and because it would have been an obvious matter of design choice to optimize the size of the partition wall layers since such a modification would have involved a mere change in size of the component. A change in size is generally recognized as being within the level of ordinary skill in the art In Re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955) MPEP 2144.04.IV(A). Further, a person of ordinary skill in the art would have recognized that optimizing the protective capability while meeting small size requirement would be advantageous in improving the overall functioning capability of the device (see MPEP 2143.I(D)). Claims 9-10 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Takahashi (US 2022/0238840) in view of Adachi et al (US 2021/0167329). Regarding Claim 9, Takahashi discloses the limitations of claim 8 as explained above. Takahashi does not directly disclose wherein the partition wall insulating layer includes at least one selected from the group consisting of silica (SiO2) and aluminum oxide (Al2O3). Adachi et al, in the related art of semiconductor devices that include display devices, discloses the partition wall insulating layer (inorganic insulating layer 31, inorganic insulating layer 33, organic insulating layer 35, and inorganic insulating layer 64 [0064] Fig 1A-B) include an inorganic material (inorganic insulating layer 31 may be aluminum oxide [0152]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Takahashi to include the partition wall insulating layer include wherein the partition wall insulating layer includes at least one selected from the group consisting of silica (SiO2) and aluminum oxide (Al2O3) as taught by Adachi et al in order to optimize the optical performance of the device while providing protective function capabilities since organic film has a lower water resistance than the inorganic film [0061]. Further, a person of ordinary skill in the art would have recognized that having a partition wall insulating layer that includes an inorganic insulating material such as aluminum oxide would be a simple substitution of one known element for another to obtain predictable results (see MPEP 2143.I(B) (suitable alternate)). Regarding Claim 10, Takahashi discloses the limitations of claim 9 as explained above. Takahashi does not directly disclose wherein the partition wall insulating layer has a thickness in a range of about 100 Angstroms to about 500 Angstroms. However, Adachi et al, in the related art of semiconductor devices that include display devices, discloses wherein the thickness of the inorganic insulating layer (31 [0260] Fig 1A-B) is between 50 nm and 600 nm (500 Angstroms to 6000 Angstroms) [0260]. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Takahashi to include wherein the partition wall insulating layer has a thickness in a range of about 100 Angstroms to about 500 Angstroms as taught by Adachi et al in order to optimize the optical performance of the device while providing protective function capabilities since organic film has a lower water resistance than the inorganic film [0061] and because it has been held that "[W]here the general conditions of a claim are disclosed in the prior art, it is not inventive to discover the optimum or workable ranges by routine experimentation." In re Aller, 220 F.2d 454, 456, 105 USPQ 233, 235 (CCPA 1955) (see MPEP 2144.05), and further because it would have been an obvious matter of design choice to optimize the thickness of the partition wall insulating layer since such a modification would have involved a mere change in size of the component. A change in size is generally recognized as being within the level of ordinary skill in the art In Re Rose, 220 F.2d 459, 105 USPQ 237 (CCPA 1955) MPEP 2144.04.IV(A). Regarding Claim 20, Takahashi discloses a display device (display device DSP [0031] Fig 5) comprising: a first electrode (first electrode E1 [0040] Fig 5) disposed on a base layer (base material 10 [0031] Fig 5); a light emitting portion (display element 20 [0033] in opening portion OP [0042] Fig 5) disposed on the first electrode (E1 Fig 5); a second electrode (second electrode E2 [0040] Fig 5) disposed on the light emitting portion (20 in opening portion OP Fig 5); a partition wall (barrier wall 13, organic layer OR’, and E2’ [0062] Fig 5) disposed adjacent to the light emitting portion (20 in opening portion OP Fig 5); a partition wall insulating layer (insulator I [0073] Fig 5) covering at least a portion of the partition wall (13, OR’, E2’ Fig 5); and an auxiliary electrode (third electrode E3 [0062] Fig 5) covering the second electrode and the partition wall (13, OR’, E2’ Fig 5), wherein the partition wall (13, OR’, E2’ Fig 5) includes: a first partition wall layer (13 Fig 5); a second partition wall layer (OR’ Fig 5) disposed on the first partition wall layer (13 Fig 5); and a third partition wall layer (E2’ Fig 5) disposed on the second partition wall layer (OR’ Fig 5), the third partition wall layer (E2’ Fig 5) includes an amorphous Transparent Conductive Oxide (TCO) material (second electrode E2/second electrode E2’ is formed by a transparent conductive material [0043]), and the second electrode (E2 Fig 5) and the auxiliary electrode (E3 Fig 5) are electrically connected to each other. Takahashi does not directly disclose the partition wall insulating layer include an inorganic material. Adachi et al, in the related art of semiconductor devices that include display devices, discloses the partition wall insulating layer (inorganic insulating layer 31, inorganic insulating layer 33, organic insulating layer 35, and inorganic insulating layer 64 [0064] Fig 1A-B) include an inorganic material. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Takahashi to include the partition wall insulating layer include an inorganic material as taught by Adachi et al in order to optimize the optical performance of the device while providing protective function capabilities since organic film has a lower water resistance than the inorganic film [0061]. Further, a person of ordinary skill in the art would have recognized that having a partition wall insulating layer that includes an inorganic insulating material would be a simple substitution of one known element for another to obtain predictable results (see MPEP 2143.I(B) (suitable alternate)). Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Takahashi (US 2022/0238840). Regarding Claim 12, Takahashi discloses the limitations of claim 11 as explained above. Takahashi does not directly disclose wherein the auxiliary electrode (E3 Fig 5) includes at least one selected from the group consisting of a TCO material and titanium nitride (TiN). However, a person of ordinary skill in the art would know that the material of the auxiliary electrode is a result effective variable in that a transparent conductive material would have the advantage of allowing light to transmit through the device in light emitting portion, which would optimize the optical functioning of the device. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify Takahashi to include wherein the auxiliary electrode includes a TCO material since the auxiliary electrode E3 covers the partition walls and the light emitting portion and would have the advantage of allowing light to transmit through the device in light emitting portion, which would optimize the optical functioning of the device. Further, a person of ordinary skill in the art would have recognized that having a TCO material as at least part of an electrode would be a simple substitution of one known element for another to obtain predictable results (see MPEP 2143.I(B) (suitable alternate)). Related Cited Prior Art The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Kim (US 2017/0062760) which discloses an organic light-emitting diode OLED display [0005], and Suzuki et al (US 2007/0048970) which discloses an inorganic compound layer as an insulating layer [0019]. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to DAVID PAUL SEDOROOK whose telephone number is (571)272-4158. The examiner can normally be reached Monday - Friday 7:30 am -5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, William B Partridge can be reached on (571) 270-1402. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /D.P.S./Examiner, Art Unit 2812 /William B Partridge/Supervisory Patent Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Jun 17, 2024
Application Filed
Aug 27, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
92%
Grant Probability
99%
With Interview (+7.5%)
3y 0m (~9m remaining)
Median Time to Grant
Low
PTA Risk
Based on 153 resolved cases by this examiner. Grant probability derived from career allowance rate.

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