DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Double Patenting
The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969).
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Claims 1 – 19 rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1 – 8 of U.S. Patent No. 12,041,839. Although the claims at issue are not identical, they are not patentably distinct from each other because the claims of the patent recite each limitation of the instant application or are otherwise obvious as shown in the table below:
18/745,911
12,041,839
1. A display panel, comprising a display region and a non-display region disposed on at least one side of the display region, the non-display region comprising a wire replacement region; wherein the display panel further comprises: a substrate; a thin film transistor layer disposed on the substrate and comprising a first metal layer, wherein the first metal layer comprises a first metal trace at least disposed in the wire replacement region; an encapsulation layer disposed on one side of the thin film transistor layer away from the substrate, and comprising an inorganic encapsulation sub-layer; a spacer layer, wherein the spacer layer and the inorganic encapsulation sub-layer are stacked on the one side of the thin film transistor layer away from the substrate; and a touch metal layer disposed on the inorganic encapsulation sub-layer and on one side of the spacer layer away from the substrate, and comprising a touch trace at least disposed in the wire replacement region, wherein the touch trace is electrically connected to the first metal trace in the wire replacement region; wherein the inorganic encapsulation sub-layer does not overlap with the wire replacement region.
1. A display panel, comprising a display region and a non-display region disposed on at least one side of the display region, the non-display region comprising a wire replacement region; wherein the display panel further comprises: a substrate;a thin film transistor layer disposed on the substrate and comprising a first metal layer, wherein the first metal layer comprises a first metal trace at least disposed in the wire replacement region; an encapsulation layer disposed on one side of the thin film transistor layer away from the substrate, and comprising an inorganic encapsulation sub-layer; an inorganic spacer layer, wherein the inorganic spacer layer and the inorganic encapsulation sub-layer are stacked on the one side of the thin film transistor layer away from the substrate; and a touch metal layer disposed on the inorganic encapsulation sub-layer and on one side of the inorganic spacer layer away from the substrate, and comprising a touch trace at least disposed in the wire replacement region, wherein the touch trace is electrically connected to the first metal trace in the wire replacement region; wherein both of the inorganic encapsulation sub-layer and the inorganic spacer layer do not overlap with the wire replacement region.
2. The display panel according to claim 1, further comprising a bank structure disposed on the substrate and in the non-display region and disposed between the wire replacement region and the display region; wherein both of the inorganic encapsulation sub-layer and the spacer layer cover the bank structure, and extend from the bank structure in a direction away from the display region.
2. The display panel according to claim 1, further comprising a bank structure disposed on the substrate and in the non-display region and disposed between the wire replacement region and the display region; wherein both of the inorganic encapsulation sub-layer and the inorganic spacer layer cover the bank structure, and extend from the bank structure in a direction away from the display region.
3. The display panel according to claim 2, wherein on one side of the bank structure away from the display region, a thickness of the inorganic encapsulation sub-layer close to the bank structure is greater than a thickness of the inorganic encapsulation sub-layer away from the bank structure.
3. The display panel according to claim 2, wherein on one side of the bank structure away from the display region, a thickness of the inorganic encapsulation sub-layer close to the bank structure is greater than a thickness of the inorganic encapsulation sub-layer away from the bank structure.
4. The display panel according to claim 3, wherein boundaries of the inorganic encapsulation sub-layer and the spacer layer in the non-display region are both disposed between the bank structure and the wire replacement region.
4. The display panel according to claim 3, wherein boundaries of the inorganic encapsulation sub-layer and the inorganic spacer layer in the non-display region are both disposed between the bank structure and the wire replacement region.
5. The display panel according to claim 3, wherein the inorganic encapsulation sub-layer is provided with a first opening in the wire replacement region; and the spacer layer is provided with a second opening corresponding to the first opening, and the touch trace is electrically connected to the first metal trace through the first opening and the second opening.
5. The display panel according to claim 3, wherein the inorganic encapsulation sub- layer is provided with a first opening in the wire replacement region; and the inorganic spacer layer is provided with a second opening corresponding to the first opening, and the touch trace is electrically connected to the first metal trace through the first opening and the second opening.
6. The display panel according to claim 5, wherein the spacer layer is further disposed on a sidewall of the first opening, and a size of the second opening is less than a size of the first opening.
6. The display panel according to claim 5, wherein the inorganic spacer layer is further disposed on a sidewall of the first opening, and a size of the second opening is less than a size of the first opening.
7. The display panel according to claim 6, wherein the thin film transistor layer is provided with a third opening in the wire replacement region, the inorganic encapsulation sub-layer is further disposed on a sidewall of the third opening, the size of the first opening is less than a size of the third opening, and the touch trace is electrically connected to the first metal trace through the first opening, the second opening and the third opening.
7. The display panel according to claim 6, wherein the thin film transistor layer is provided with a third opening in the wire replacement region, the inorganic encapsulation sub-layer is further disposed on a sidewall of the third opening, the size of the first opening is less than a size of the third opening, and the touch trace is electrically connected to the first metal trace through the first opening, the second opening and the third opening.
8. The display panel according to claim 1, wherein the encapsulation layer comprises a first inorganic encapsulation sub-layer, an organic encapsulation sub-layer and a second inorganic encapsulation sub-layer arranged in a stacked manner, and the inorganic encapsulation sub-layer comprises the first inorganic encapsulation sub-layer and the second inorganic encapsulation sub-layer.
8. The display panel according to claim 1, wherein the encapsulation layer comprises a first inorganic encapsulation sub-layer, an organic encapsulation sub-layer and a second inorganic encapsulation sub-layer arranged in a stacked manner, and the inorganic encapsulation sub-layer comprises the first inorganic encapsulation sub-layer and the second inorganic encapsulation sub-layer.
10. A display device, comprising a main device body and a display panel, wherein the main device body and the display panel are combined together, the display panel comprises a display region and a non-display region disposed on at least one side of the display region, and the non-display region comprises a wire replacement region; wherein the display panel further comprises: a substrate; a thin film transistor layer disposed on the substrate and comprising a first metal layer, wherein the first metal layer comprises a first metal trace at least disposed in the wire replacement region; an encapsulation layer disposed on one side of the thin film transistor layer away from the substrate, and comprising an inorganic encapsulation sub-layer; a spacer layer, wherein the spacer layer and the inorganic encapsulation sub-layer are stacked on the one side of the thin film transistor layer away from the substrate; and a touch metal layer disposed on the inorganic encapsulation sub-layer and on one side of the spacer layer away from the substrate, and comprising a touch trace at least disposed in the wire replacement region, wherein the touch trace is electrically connected to the first metal trace in the wire replacement region; wherein the inorganic encapsulation sub-layer does not overlap with the wire replacement region.
19. The display device according to claim 10, wherein the spacer layer does not overlap with the wire replacement region.
1. A display panel, comprising a display region and a non-display region disposed on at least one side of the display region, the non-display region comprising a wire replacement region; wherein the display panel further comprises: a substrate;a thin film transistor layer disposed on the substrate and comprising a first metal layer, wherein the first metal layer comprises a first metal trace at least disposed in the wire replacement region; an encapsulation layer disposed on one side of the thin film transistor layer away from the substrate, and comprising an inorganic encapsulation sub-layer; an inorganic spacer layer, wherein the inorganic spacer layer and the inorganic encapsulation sub-layer are stacked on the one side of the thin film transistor layer away from the substrate; and a touch metal layer disposed on the inorganic encapsulation sub-layer and on one side of the inorganic spacer layer away from the substrate, and comprising a touch trace at least disposed in the wire replacement region, wherein the touch trace is electrically connected to the first metal trace in the wire replacement region; wherein both of the inorganic encapsulation sub-layer and the inorganic spacer layer do not overlap with the wire replacement region.
11. The display device according to claim 10, wherein the display panel further comprises a bank structure disposed on the substrate and in the non-display region and disposed between the wire replacement region and the display region; wherein both of the inorganic encapsulation sub-layer and the spacer layer cover the bank structure, and extend from the bank structure in a direction away from the display region.
2. The display panel according to claim 1, further comprising a bank structure disposed on the substrate and in the non-display region and disposed between the wire replacement region and the display region; wherein both of the inorganic encapsulation sub-layer and the inorganic spacer layer cover the bank structure, and extend from the bank structure in a direction away from the display region.
12. The display device according to claim 11, wherein on one side of the bank structure away from the display region, a thickness of the inorganic encapsulation sub-layer close to the bank structure is greater than a thickness of the inorganic encapsulation sub-layer away from the bank structure.
3. The display panel according to claim 2, wherein on one side of the bank structure away from the display region, a thickness of the inorganic encapsulation sub-layer close to the bank structure is greater than a thickness of the inorganic encapsulation sub-layer away from the bank structure.
13. The display device according to claim 12, wherein boundaries of both the inorganic encapsulation sub-layer and the spacer layer in the non-display region are disposed between the bank structure and the wire replacement region.
4. The display panel according to claim 3, wherein boundaries of the inorganic encapsulation sub-layer and the inorganic spacer layer in the non-display region are both disposed between the bank structure and the wire replacement region.
14. The display device according to claim 12, wherein the inorganic encapsulation sub-layer is provided with a first opening in the wire replacement region; and the spacer layer is provided with a second opening corresponding to the first opening, and the touch trace is electrically connected to the first metal trace through the first opening and the second opening.
5. The display panel according to claim 3, wherein the inorganic encapsulation sub- layer is provided with a first opening in the wire replacement region; and the inorganic spacer layer is provided with a second opening corresponding to the first opening, and the touch trace is electrically connected to the first metal trace through the first opening and the second opening.
15. The display device according to claim 14, wherein the spacer layer is further disposed on a sidewall of the first opening, and a size of the second opening is less than a size of the first opening.
6. The display panel according to claim 5, wherein the inorganic spacer layer is further disposed on a sidewall of the first opening, and a size of the second opening is less than a size of the first opening.
16. The display device according to claim 15, wherein the thin film transistor layer is provided with a third opening in the wire replacement region, the inorganic encapsulation sub-layer is further disposed on a sidewall of the third opening, the size of the first opening is less than a size of the third opening, and the touch trace is electrically connected to the first metal trace through the first opening, the second opening and the third opening.
7. The display panel according to claim 6, wherein the thin film transistor layer is provided with a third opening in the wire replacement region, the inorganic encapsulation sub-layer is further disposed on a sidewall of the third opening, the size of the first opening is less than a size of the third opening, and the touch trace is electrically connected to the first metal trace through the first opening, the second opening and the third opening.
17. The display device according to claim 10, wherein the encapsulation layer comprises a first inorganic encapsulation sub-layer, an organic encapsulation sub-layer and a second inorganic encapsulation sub-layer arranged in a stacked manner, and the inorganic encapsulation sub-layer comprises the first inorganic encapsulation sub-layer and the second inorganic encapsulation sub-layer.
8. The display panel according to claim 1, wherein the encapsulation layer comprises a first inorganic encapsulation sub-layer, an organic encapsulation sub-layer and a second inorganic encapsulation sub-layer arranged in a stacked manner, and the inorganic encapsulation sub-layer comprises the first inorganic encapsulation sub-layer and the second inorganic encapsulation sub-layer.
Regarding claim 18, patent no. 12, 041,839, henceforth ‘839, do not recite a claim that the spacer layer comprises one of silicon oxide or silicon nitride. It would have been obvious to one having ordinary skill in the art at the time the invention was filed to select SiO or SiN since they are both well known materials that are well suited for the intended use.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US Patent No. 10,886,339 to Won et al. teach a display panel including a touch sensor, encapsulation and a thin film transistor layer. Won et al. do not teach a thin film transistor layer with a first metal layer comprising a metal trace disposed in the wire replacement region.
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DOUGLAS W. OWENS, Esq.
Primary Patent Examiner
Art Unit 2897
/DOUGLAS W OWENS/Primary Patent Examiner, Art Unit 2897