DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
1. Claims 1-9 & 18-20 are elected for examination on 6/16/26.
Claims 10-17 are withdrawn as directed to a non-elected invention.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
2. Claim 1 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Tanaka et al (US 11,562,785).
The applied reference has a common assignee with the instant application. Based upon the earlier effectively filed date of the reference, it constitutes prior art under 35 U.S.C. 102(a)(2). This rejection under 35 U.S.C. 102(a)(2) might be overcome by: (1) a showing under 37 CFR 1.130(a) that the subject matter disclosed in the reference was obtained directly or indirectly from the inventor or a joint inventor of this application and is thus not prior art in accordance with 35 U.S.C. 102(b)(2)(A); (2) a showing under 37 CFR 1.130(b) of a prior public disclosure under 35 U.S.C. 102(b)(2)(B) if the same invention is not being claimed; or (3) a statement pursuant to 35 U.S.C. 102(b)(2)(C) establishing that, not later than the effective filing date of the claimed invention, the subject matter disclosed in the reference and the claimed invention were either owned by the same person or subject to an obligation of assignment to the same person or subject to a joint research agreement.
Claim 1, Tanaka (Fig. 1-2) clearly shows a semiconductor device comprising memory cells in a cell region (112), a plurality of storge/cell node device (or cell node 122, Fig. 1B) vertically underlying an coupled to the access device (or select transistor 122, Fig. 1B), see also col. 7-9 description. Additionally, Fig. 1B shows a hierarchical bit/digit line arranged on top of the whole memory cell array (112), and such hierarchical digit line (HDL) has at least 3 connected sections:
A lower section has horizontal/local digit lines (126 or 128, Fig. 1A-1B);
An upper section has horizontal/global digit lines (134 or 136, Fig. 1A-1B) and it overlying vertically, and at least partially offset from the lower section (of local digit lines 128A, 128B, Fig. 1A);
A middle section (between upper & lower section) has vertical conductive vias (132, 152, 154 & 156. Fig. 1A-1B) and vertically extending upward from the local digit lines 128 at the bottom level to the global digit line 136, for connecting between the lower section and the upper section as claimed.
A sense amplifier within the cell array (transistor 160, Fig. 1A, see col. 6 description) is vertically overlying and coupled to the HDL structure as claimed.
Allowable Subject Matter.
3. Claims 2-9 & 18-20 now contain allowable subject matter for reciting other novel limitations of a HDL structure, which are not clearly suggested by the prior arts nor they are seen elsewhere at this time.
4. Any inquiry concerning this communication or earlier communications from the examiner should be directed to VIET Q NGUYEN whose telephone number is (571)272-1788. The examiner can normally be reached M-F 7:30-3PM EST.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at 571-272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/VIET Q NGUYEN/Primary Examiner, Art Unit 2827
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