Prosecution Insights
Last updated: July 17, 2026
Application No. 18/746,337

SEMICONDUCTOR DEVICE WITH AIR GAP AND METHOD FOR PREPARING THE SAME

Non-Final OA §DP
Filed
Jun 18, 2024
Priority
Jul 21, 2022 — divisional of 12/213,306
Examiner
ALAM, MOHAMMED R
Art Unit
Tech Center
Assignee
NANYA TECHNOLOGY Corporation
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
1m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
510 granted / 571 resolved
+29.3% vs TC avg
Moderate +6% lift
Without
With
+6.1%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
20 currently pending
Career history
589
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
75.4%
+35.4% vs TC avg
§102
10.6%
-29.4% vs TC avg
§112
6.5%
-33.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 571 resolved cases

Office Action

§DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the claims at issue are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); and In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on a nonstatutory double patenting ground provided the reference application or patent either is shown to be commonly owned with this application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The USPTO internet Web site contains terminal disclaimer forms which may be used. Please visit http://www.uspto.gov/forms/. The filing date of the application will determine what form should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to http://www.uspto.gov/patents/process/file/efs/guidance/eTD-info-I.jsp. Claim 1-9 are rejected on the ground of nonstatutory obviousness-type double patenting as being unpatentable over Claims of U.S. Patent No. 12,279,416 B2. Regarding claim 1, Claim 1 of U.S. Patent No. 12,279,416 B2 discloses a method for preparing a semiconductor device, comprising: forming a bottom barrier material over a semiconductor substrate; forming a conductive material over the bottom barrier material; forming a top barrier material over the conductive material; etching the top barrier material, the conductive material, the bottom barrier material, and the semiconductor substrate to form an opening, wherein remaining portions of the top barrier material, the conductive material, and the bottom barrier material form an I-shaped structure; depositing an isolation layer in the opening such that an air gap is formed in the isolation layer. Claim 1 of examined application here recites the same limitations except “and forming an anti-reflective material over the top barrier material before the opening is formed, wherein the anti-reflective material is etched during the forming of the opening”, therefore claim 1 is obvious over the patented claim. Regarding claim 2, Claim 2 of U.S. Patent No. 12,279,416 B2 and Claim 2 of examined application are identical. Regarding claim 3, Claim 3 of U.S. Patent No. 12,279,416 B2 and Claim 3 of examined application are identical. Regarding claim 4-9, Claim(s) 4-7 of U.S. Patent No. 12,279,416 B2 make obvious of the claim(s) 4-9 of the application that is being examined. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: see the attached form PTO-892 for pertinent cited art. Lee et al. (US publication 2012/0292746 A1) discloses some features “…a bottom barrier layer (69, [0109], fig. 3b) …; a conductive contact (26, [0096]) disposed over the bottom barrier layer; a top barrier layer (63, [0107]) disposed over the conductive contact, wherein the bottom barrier layer, the conductive contact, and the top barrier layer form an I-shaped structure (fig. 3b); and an isolation layer (51, [0093]) disposed adjacent to the I-shaped structure …” of the claimed invention. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Mohammed R Alam whose telephone number is 469-295-9205 and can normally be reached between 8:00am-6:00pm (M-F) or by e-mail via Mohammed.Alam1@uspto.gov. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jacob Choi can be reached on 469-295-9060. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /MOHAMMED R ALAM/Primary Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Jun 18, 2024
Application Filed
Jun 24, 2026
Non-Final Rejection mailed — §DP (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12666778
DISPLAY DEVICE AND METHOD OF FABRICATING THE SAME
3y 4m to grant Granted Jun 23, 2026
Patent 12652939
DISPLAY PANELS AND DISPLAY DEVICES
2y 7m to grant Granted Jun 09, 2026
Patent 12652823
SEMICONDUCTOR STRUCTURE
2y 6m to grant Granted Jun 09, 2026
Patent 12648315
DISPLAY PANEL
2y 6m to grant Granted Jun 02, 2026
Patent 12641779
MEMORY DEVICE AND METHOD OF FORMING THE SAME
3y 0m to grant Granted May 26, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
95%
With Interview (+6.1%)
2y 2m (~1m remaining)
Median Time to Grant
Low
PTA Risk
Based on 571 resolved cases by this examiner. Grant probability derived from career allowance rate.

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