Prosecution Insights
Last updated: April 19, 2026
Application No. 18/747,805

PROGRAM TIME IMPROVEMENT FOR NAND DIE WITH COARSE BITSCAN DURING PROGRAM-VERIFY

Non-Final OA §112
Filed
Jun 19, 2024
Examiner
HEISTERKAMP, JUSTIN BRYCE
Art Unit
2827
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Sandisk Technologies Inc.
OA Round
1 (Non-Final)
99%
Grant Probability
Favorable
1-2
OA Rounds
2y 5m
To Grant
99%
With Interview

Examiner Intelligence

Grants 99% — above average
99%
Career Allow Rate
68 granted / 69 resolved
+30.6% vs TC avg
Minimal +3% lift
Without
With
+2.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
12 currently pending
Career history
81
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
33.2%
-6.8% vs TC avg
§102
24.7%
-15.3% vs TC avg
§112
30.9%
-9.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 69 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The disclosure is objected to because of the following informalities: Paragraph [0084], line 2, should read, “. . . , referred to as a sense module [[480]] 450, and . . .” Paragraph [0084], line 6, should read, “. . . eight , twelve, or sixteen sense modules 450.” Paragraph [0086], line 1, should read, “. . . Common portion 480 comprises a processor [[468]] 482, a set of data . . .” Paragraph [0186], line 4, should read, “. . . 2216 and an even strobe switch STB 2218 and an even sense controlled switch [[2220]] 2225 . . .“ Paragraph [0186], line 6, should read, “even sense controlled switch gate 2222 of the even sense controlled switch [[2220]] 2225 is . . .” Paragraph [0186], line 1 on page 53, should read, “An even local bus controlled switch gate [[2228]] 2220 of the even . . .” Paragraph [0188], line 3, should read, “. . . switch BLQ [[2330]] 2320 connecting the first even sense node . . .” Paragraph [0188], line 5, should read, “. . . switch 2336 connected in series between the first even transfer switch BLQ [[2330]] 2320 and a . . .” Paragraph [0188], line 6, should read, “A first even sense controlled switch gate [[2318]] 2318 of the first even . . .” Appropriate correction is required. The lengthy specification has not been checked to the extent necessary to determine the presence of all possible minor errors. Applicant’s cooperation is requested in correcting any errors of which applicant may become aware in the specification. Drawings The drawings are objected to as failing to comply with 37 CFR 1.84(p)(4) because reference characters "2336" and "2318" have both been used to designate a first even sense controlled switch 2336 (para. [0188]), and reference characters "2378" and "2390" have both been used to designate a second even sense controlled switch 2378 (para. [0190]). Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance. Claim Objections Claims 2, 3, 5, 9, 10, 12, 15, 16, and 18 objected to because of the following informalities: Claims 2, 3, 5, 9, 10, 12, 15, 16, and 18 recite the terms “logically or” or “logical or” in several limitations. Applicant is advised to capitalize “OR” to clearly express it as a logic operation and not a grammatical conjunction in the limitation. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. Claims 1-20 rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 1, 8, and 14, recite the limitation, “the count being a coarse count not separately counting the memory cells coupled with ones of the plurality of sense amplifiers of one or more of the tiers.” (emphasis added). Using a negative limitation and the adverb, “separately” create an ambiguity in the breadth of the limitation. That is, it isn’t clear what is meant by “not separately.” As best understood by the examiner the applicant intends to express the course count doesn’t count each individual memory cell (alluding to the logical OR operation detailed in claim 2). Additionally, the counting target (i.e., “the memory cells coupled with ones of the plurality of sense amplifiers of one or more of the tiers “) does not align with “a failure quantity of a group of the memory cells having the threshold voltage below one of a plurality of verify voltages associated with one of the plurality of data states targeted for the memory cells in each of a plurality of verify iterations of the program operation.” Applicant is advised to amend the limitations in claims 1, 8, and 14, similarly to or as, “the count being a coarse count not individually counting each memory cell in the group of the memory cells having the threshold voltage below one of a plurality of verify voltages associated with one of the plurality of data states targeted for the memory cells in each of a plurality of verify iterations of the program operation that are connected with ones of the plurality of sense amplifiers of one or more of the tiers.” (Claims 1, 8, and 14 express the memory cells or connected to one of the plurality of bit lines and the plurality of bit lines are coupled to the one of the plurality of sense amplifiers arranged in tiers – therefore, it may be preferrable to replace coupled with connected for consistency). Claims 2-7, 9-13, and 15-20 are rejected because they depend on claims 1, 8, and 14, respectively. Therefore, they contain at least the same defects. Allowable Subject Matter Claims 1, 8, and 14 would be allowable if rewritten or amended to overcome the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), 2nd paragraph, set forth in this Office action. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JUSTIN BRYCE HEISTERKAMP whose telephone number is (703)756-1095. The examiner can normally be reached M-F 0800-1700. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Amir Zarabian can be reached at (571) 272-1852. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JUSTIN BRYCE HEISTERKAMP/Examiner, Art Unit 2827 /AMIR ZARABIAN/Supervisory Patent Examiner, Art Unit 2827
Read full office action

Prosecution Timeline

Jun 19, 2024
Application Filed
Jan 16, 2026
Non-Final Rejection — §112 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12586646
PRECHARGE SCHEME DURING PROGRAMMING OF A MEMORY DEVICE
2y 5m to grant Granted Mar 24, 2026
Patent 12586650
PAGE BUFFER CIRCUIT AND MEMORY DEVICE INCLUDING THE SAME
2y 5m to grant Granted Mar 24, 2026
Patent 12555638
ERASE PULSE LOOP DEPENDENT ADJUSTMENT OF SELECT GATE ERASE BIAS VOLTAGE
2y 5m to grant Granted Feb 17, 2026
Patent 12555637
NON-VOLATILE MEMORY WITH ADAPTIVE DUMMY WORD LINE BIAS
2y 5m to grant Granted Feb 17, 2026
Patent 12555629
METHOD AND SYSTEM FOR A PROGRAMMABLE AND GENERIC PROCESSING-IN-SRAM ACCELERATOR
2y 5m to grant Granted Feb 17, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

AI Strategy Recommendation

Get an AI-powered prosecution strategy using examiner precedents, rejection analysis, and claim mapping.
Powered by AI — typically takes 5-10 seconds

Prosecution Projections

1-2
Expected OA Rounds
99%
Grant Probability
99%
With Interview (+2.6%)
2y 5m
Median Time to Grant
Low
PTA Risk
Based on 69 resolved cases by this examiner. Grant probability derived from career allow rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month