DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-3, 5-10, 13-15, & 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsutsumi et al. (US 20220157841).
Regarding claim 1, Tsutsumi discloses that a semiconductor memory device comprising:
a first stacked structure 165 comprising a plurality of first interlayer insulating films 132 (Fig. 6);
a second stacked structure 265 comprising a plurality of second interlayer insulating films 232 on the first stacked structure (Fig. 6); and
a hole 119 & 219 that extends into the first stacked structure 165 and the second stacked structure 265, wherein the plurality of second interlayer insulating films 232 comprise a plurality of first films that include first impurities (para. 0084 & 0106, note: can be doped silicate & undoped undoped silicate), and a plurality of second films that are free of the first impurities (para. 0106, at least on insulating material from the first tier.
Reclaim 2, Tsutsumi discloses that the plurality of first films are between the first stacked structure and the plurality of second films (para. 0084 & 0106).
Reclaim 3, Tsutsumi discloses that a concentration of the first impurities included in the plurality of first films increases toward the first stacked structure (para. 0084 & 0106).
Reclaim 5, Tsutsumi discloses that the plurality of first interlayer insulating films are free of the first impurities (para. 0084).
Reclaim 6, Tsutsumi discloses that the plurality of first interlayer insulating films comprise a plurality of third films that include second impurities, and a plurality of fourth films that are free of the second impurities (para. 0084).
Reclaim 7, Tsutsumi discloses that the plurality of fourth films are between the plurality of third films and the second stacked structure (para. 0084).
Reclaim 8, Tsutsumi discloses that a concentration of the second impurities included in the plurality of third films decreases toward the second stacked structure (para. 0084).
Reclaim 9, Tsutsumi discloses that side walls of the hole are free of a stepped portion.
Regarding claim 10, Tsutsumi discloses that a semiconductor memory device comprising:
a first stacked structure 165 comprising a plurality of first interlayer insulating films 132 ;
a second stacked structure 265 comprising a plurality of second interlayer insulating films 232 on the first stacked structure 165 (Fig. 7A); and
a hole 119 & 219 that extends into the first stacked structure and the second stacked structure, wherein the plurality of second interlayer insulating films 232 comprise a plurality of first films on the first stacked structure, and a plurality of second films on the plurality of first films, wherein one of the plurality of first interlayer insulating films that is closest to the second stacked structure is free of impurities (Undoped silicate), and wherein one of the plurality of first films that is closest to the first stacked structure includes the impurities (Doped silicate, Fig. 7A, para. 0084 & 0106).
Reclaim 13, Tsutsumi discloses that a slope of side walls of a first portion of the hole in the plurality of first films is the same as a slope of side walls of a second portion of the hole in the plurality of second films (Fig. 7A).
Reclaim 14, Tsutsumi discloses that a width of the hole at a lowermost portion of the second stacked structure is the same as a width of the hole at an uppermost portion of the first stacked structure (Fig. 7A).
Reclaim 15, Tsutsumi discloses that each of the plurality of first films includes the impurities (Fig. 7A, para. 0084 & 0106).
Regarding claim 18, Tsutsumi discloses that an electronic system comprising:
a main board 709;
a semiconductor memory 132 & 232 device on the main board 709; and
a controller 700 electrically connected to the semiconductor memory device on the main board, the semiconductor memory device comprising:
a cell substrate 8;
a first mold stack 165 comprising a plurality of first gate electrodes and a plurality of first mold insulating films 132 alternately stacked on the cell substrate;
a second mold stack 265 comprising a plurality of second gate electrodes and a plurality of second mold insulating films 232 alternately stacked on the first mold stack; and
a channel structure 50 that extends into the first mold stack and the second mold stack (Fig. 7A & 22D), wherein the plurality of second mold insulating films 232 comprise a plurality of first insulating films that include impurities (doped silicate), and a plurality of second insulating films that are free of the impurities (undoped silicate), and wherein the channel structure is free of a stepped portion (para. 0084 & 0106).
Reclaim 19, Tsutsumi discloses that the plurality of first insulating films are between the first mold stack and the plurality of second insulating films (Fig. 7A).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 4 & 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsutsumi et al. (US 20220157841) in view of You et al. (US 20110084329).
Reclaims 4 & 17, Tsutsumi fails to specify that the first impurities comprise at least one of fluorine (F) or phosphorus (P).
However, You suggests that the first impurities comprise at least one of fluorine (F) or phosphorus (P) (para. 0063, note: Tsutsumi discloses undoped silicate glass (undoped silicon oxide) and doped silicate glass).
Therefore, it would have been obvious to one of ordinary skill in the art before effective filing date of applicant(s) claimed invention was made to provide Tsutsumi with the first impurities comprise at least one of fluorine (F) or phosphorus (P) as taught by You in order to enhance variation of multi-insulating layers and also, the claim would have been obvious because a particular know technique was recognized as part of the ordinary capabilities of one skilled in the art.
Claim(s) 11-12, 16, & 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Tsutsumi et al. (US 20220157841) in view of KIDOH et al. (US 20100109072).
Reclaims 11 -12, Tsutsumi fails to teach that a slope of side walls of a first portion of the hole in the plurality of first films is greater than a slope of side walls of a second portion of the hole in the first stacked structure.
However, KIDOH suggests that that a slope of side walls of a first portion of the hole in the plurality of first films is greater than a slope of side walls of a second portion of the hole in the first stacked structure (Fig. 2, vertical portion 36aU vs horizontal 36bs).
Therefore, it would have been obvious to one of ordinary skill in the art before effective filing date of applicant(s) claimed invention was made to provide Tsutsumi with a slope of side walls of a first portion of the hole in the plurality of first films is greater than a slope of side walls of a second portion of the hole in the first stacked structure as taught by KIDOH in order to enhance that a plurality of portions having mutually shifted central axes, a connecting portion between the portions having a crank-like configuration (para. 0011) and also, the claim would have been obvious because a particular know technique was recognized as part of the ordinary capabilities of one skilled in the art.
Reclaim 16, Tsutsumi & KIDOH fail to specify that that a concentration of the impurities included in the plurality of first films increases toward the first stacked structure.
However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization.
Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain concentration of the impurities included in the plurality of first films increases toward the first stacked structure, because it would have been to obtain a certain concentration of the impurities included in the plurality of first films increases toward the first stacked structure to achieve reducing power consumption by reducing a property of dielectric constant with impurity.
Reclaim 20, Tsutsumi & KIDOH fail to specify that that a concentration of the impurities included in the plurality of first insulating films increases toward the first mold stack .
However, notwithstanding, one of ordinary skill in the art would have been led to the recited dimensions through routine experimentation and optimization.
Before effective filing date of the invention it would have been obvious to a person of ordinary skill in the art to use a certain concentration of the impurities included in the plurality of first insulating films increases toward the first mold stack, because it would have been to obtain a certain concentration of the impurities included in the plurality of first insulating films increases toward the first mold stack to achieve reducing power consumption by reducing a property of dielectric constant with impurity.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to SU C KIM whose telephone number is (571)272-5972. The examiner can normally be reached M-F 9:00 to 5:00.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Dale Page can be reached at 571-270-7877. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/SU C KIM/ Primary Examiner, Art Unit 2899
Prosecution Insights