DETAILED ACTION
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is responsive to the following communications: the Amendment filed March 27, 2026.
Claims 1-20 are pending. Claims 1, 8, 11, 17 and 20 are amended. Claims 1 and 11 are independent.
Priority
Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55 received on August 1, 2024.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim 1-20 are rejected under 35 U.S.C. 103 as being unpatentable over Slesazeck et al. (U.S. 2010/0110753; hereinafter “Slesazeck”) in view of Miyasako et al. (WO 2011/138941; hereinafter “Miyasako”).
Regarding independent claim 1, Slesazeck teaches a synapse device (Fig. 3A) comprising:
a first ferroelectric field effect transistor (Fig. 3A: 310a) including a source region (Fig. 3A: 326a), a drain region (Fig. 3A: 324a), and a gate electrode (Fig. 3A: 322a); and
a second ferroelectric field effect transistor including a source region, a drain region, and a gate electrode (see Examiner’s Markup Slesazeck’s Figure 3A),
wherein the gate electrodes of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to each other through a first shared wire such that the gate electrode of the first ferroelectric field effect transistor is upstream to the gate electrode of the second ferroelectric field effect transistor (Fig. 3A: gates of the first and second ferroelectric field effect transistors are electrically connected through line 392), the source regions of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to each other through a second shared wire such that the source region of the first ferroelectric field effect transistor us upstream to the source region of the second ferroelectric field effect transistor (Fig. 3A: source regions of the first and second ferroelectric field effect transistors are electrically connected through line 396), and the drain regions of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to each other through a third shared wire such that the drain region of the first ferroelectric field effect transistor is upstream to the drain region of the second ferroelectric field effect transistor (Fig. 3A: drain regions of the first and second ferroelectric field effect transistors are electrically connected through line 394).
However, Slesazeck is silent with respect to the first ferroelectric field effect transistor has a first coercive voltage, and the second ferroelectric field effect transistor has a second coercive voltage, and wherein the second coercive voltage and the first coercive voltage are different from each other.
Similar to Slesazeck, Miyasako teaches a device comprising first ferroelectric field effect transistors and second ferroelectric field effect transistor.
Furthermore, Miyasako teaches the first ferroelectric field effect transistor has a first coercive voltage, and the second ferroelectric field effect transistor has a second coercive voltage, and wherein the second coercive voltage and the first coercive voltage are different from each other (Fig. 1 shows a plurality of ferroelectric field effect transistors and each comprising first and second transistor portions having a first coercive voltage and a second coercive voltage, wherein the second coercive voltage is different from the first coercive voltage, see Miyasako’s specification description of Figs 1, 2A, 2D and 3A).
Since Miyasako and Slesazeck are from the same field of endeavor, the teachings described by Miyasako would have been recognized in the pertinent art of Slesazeck.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teachings of Miyasako with the teachings of Slesazeck for the purpose of achieve large-scaling integration, see Miyasako’s Abstract.
Regarding claim 2, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 1.
Furthermore, Slesazeck teaches wherein the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are each configured to be switchable between a first state having a first threshold voltage and a second state having a second threshold voltage that is greater than the first threshold voltage (see page 2, par. 0037).
Regarding claim 3, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 1.
Furthermore, Slesazeck teaches wherein each of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor further comprises:
a channel region (Fig. 1A: 118) between the source region (Fig. 1A: 126) and the drain region (Fig. 1A: 124); and
a ferroelectric layer (Fig. 1A: 111) between the channel region (Fig. 1A: 118) and the gate electrode (Fig. 1A: 112),
wherein the gate electrode (Fig. 1A: 112) faces the channel region (Fig. 1A: 118).
Regarding claim 4, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 3.
As discussed above, Slesazeck’s synapse device in combination with Miyasako is substantially identical in structure to the claimed “synapse device,” where the differences reside only in the remaining limitations relating to function and/or properties of “the ferroelectric layer of the first ferroelectric field effect transistor has a first thickness, and the ferroelectric layer of the second ferroelectric field effect transistor has a second thickness that is greater than the first thickness.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s synapse device in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 5, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 3.
As discussed above, Slesazeck’s synapse device in combination with Miyasako is substantially identical in structure to the claimed “synapse device,” where the differences reside only in the remaining limitations relating to function and/or properties of “the ferroelectric layer of the first ferroelectric field effect transistor and the ferroelectric layer of the second ferroelectric field effect transistor have at least one of different ferroelectric materials from each other or different compositions from each other.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s synapse device in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 6, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 3.
As discussed above, Slesazeck’s synapse device in combination with Miyasako is substantially identical in structure to the claimed “synapse device,” where the differences reside only in the remaining limitations relating to function and/or properties of “the ferroelectric layer of the first ferroelectric field effect transistor and the ferroelectric layer of the second ferroelectric field effect transistor are heat-treated in different heat treatment atmospheres or at different heat treatment temperatures.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s synapse device in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 7, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 3.
As discussed above, Slesazeck’s synapse device in combination with Miyasako is substantially identical in structure to the claimed “synapse device,” where the differences reside only in the remaining limitations relating to function and/or properties of “the channel region of the first ferroelectric field effect transistor and the channel region of the second ferroelectric field effect transistor have substantially the same material and size as each other.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s synapse device in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 8, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 1.
Furthermore, Slesazeck teaches a gate terminal electrically connected to the gate electrodes of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor through the first shared wire (Fig. 3A: 392);
a source terminal electrically connected to the source regions of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor through the second shared wire (Fig. 3A: 396); and
a drain terminal electrically connected to the drain regions of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor through the third shared wire (Fig. 3A: 394).
Regarding claim 9, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 1.
As discussed above, Slesazeck’s synapse device in combination with Miyasako is substantially identical in structure to the claimed “synapse device,” where the differences reside only in the remaining limitations relating to function and/or properties of “the first ferroelectric field effect transistor and the second ferroelectric field effect transistor have substantially the same electrical conductance when turned on.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s synapse device in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 10, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 1.
As discussed above, Slesazeck’s synapse device in combination with Miyasako is substantially identical in structure to the claimed “synapse device,” where the differences reside only in the remaining limitations relating to function and/or properties of “the synapse device is configured to switch between a plurality of discrete electrical conductance values based on a voltage applied to the synapse device and the plurality of discrete electrical conductance values are distinguished from each other.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s synapse device in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding independent claim 11, Slesazeck teaches a neural network apparatus (Fig. 3B) comprising:
a plurality of input lines (Fig. 3B: 396);
a plurality of output lines (Fig. 3B: 394);
a plurality of program lines (Fig. 3B: 392); and
a two-dimensional array of synapse devices (Fig. 3A), wherein each of the synapse devices is electrically connected to a corresponding input line among the plurality of input lines (Fig. 3B: 396), a corresponding program line among the plurality of program lines (Fig. 3B: 392), and a corresponding output line among the plurality of output lines (Fig. 3B: 394),
wherein each of the synapse devices comprises
a first ferroelectric field effect transistor (Fig. 3A: 310a) including a source region, a drain region, and a gate electrode, and
a second ferroelectric field effect transistor including a source region (Fig. 3A: 326a), a drain region (Fig. 3A: 324a), and a gate electrode (Fig. 3A: 322a),
wherein the gate electrodes of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to each other through a first shared wire such that the gate electrode of the first ferroelectric field effect transistor is upstream to the gate electrode of the second ferroelectric field effect transistor (Fig. 3A: gates of the first and second ferroelectric field effect transistors are electrically connected through line 392), the source regions of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to each other through a second shared wire such that the source region of the first ferroelectric field effect transistor is upstream to the source region of the second ferroelectric field effect transistor (Fig. 3A: source regions of the first and second ferroelectric field effect transistors are electrically connected through line 396), and the drain regions of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to each other through a third shared wire such that the drain region of the first ferroelectric field effect transistor is upstream to the drain region of the second ferroelectric field effect transistor (Fig. 3A: drain regions of the first and second ferroelectric field effect transistors are electrically connected through line 394).
However, Slesazeck is silent with respect to the first ferroelectric field effect transistor has a first coercive voltage, and the second ferroelectric field effect transistor has a second coercive voltage, and wherein the second coercive voltage and the first coercive voltage are different from each other.
Similar to Slesazeck, Miyasako teaches an apparatus comprising first ferroelectric field effect transistors and second ferroelectric field effect transistor.
Furthermore, Miyasako teaches the first ferroelectric field effect transistor has a first coercive voltage, and the second ferroelectric field effect transistor has a second coercive voltage, and wherein the second coercive voltage and the first coercive voltage are different from each other (Fig. 1 shows a plurality of ferroelectric field effect transistors and each comprising first and second transistor portions having a first coercive voltage and a second coercive voltage, wherein the second coercive voltage is different from the first coercive voltage, see Miyasako’s specification description of Figs 1, 2A, 2D and 3A).
Since Miyasako and Slesazeck are from the same field of endeavor, the teachings described by Miyasako would have been recognized in the pertinent art of Slesazeck.
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date to combine the teachings of Miyasako with the teachings of Slesazeck for the purpose of achieve large-scaling integration, see Miyasako’s Abstract.
Regarding claim 12, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 11.
Furthermore, Slesazeck teaches wherein the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are each configured to be switchable between a first state having a first threshold voltage and a second state having a second threshold voltage that is greater than the first threshold voltage (see page 2, par. 0037).
Regarding claim 13, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 11.
Furthermore, Slesazeck teaches wherein each of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor further comprises:
a channel region (Fig. 1A: 118) between the source region (Fig. 1A: 126) and the drain region (Fig. 1A: 124); and
a ferroelectric layer (Fig. 1A: 111) between the channel region (Fig. 1A: 118) and the gate electrode (Fig. 1A: 112),
wherein the gate electrode (Fig. 1A: 112) faces the channel region (Fig. 1A: 118).
As discussed above, Slesazeck’s neural network apparatus in combination with Miyasako is substantially identical in structure to the claimed “neural network apparatus,” where the differences reside only in the remaining limitations relating to function and/or properties of “the ferroelectric layer of the first ferroelectric field effect transistor has a first thickness, and the ferroelectric layer of the second ferroelectric field effect transistor has a second thickness that is greater than the first thickness.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s neural network apparatus in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 14, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 11.
Furthermore, Slesazeck teaches wherein each of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor further comprises:
a channel region (Fig. 1A: 118) between the source region (Fig. 1A: 126) and the drain region (Fig. 1A: 124); and
a ferroelectric layer (Fig. 1A: 111) between the channel region (Fig. 1A: 118) and the gate electrode (Fig. 1A: 112),
wherein the gate electrode (Fig. 1A: 112) faces the channel region (Fig. 1A: 118).
As discussed above, Slesazeck’s neural network apparatus in combination with Miyasako is substantially identical in structure to the claimed “neural network apparatus,” where the differences reside only in the remaining limitations relating to function and/or properties of “the ferroelectric layer of the first ferroelectric field effect transistor and the ferroelectric layer of the second ferroelectric field effect transistor have at least one of different ferroelectric materials from each other or different compositions from each other.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s neural network apparatus in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 15, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 11.
Furthermore, Slesazeck teaches wherein each of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor further comprises:
a channel region (Fig. 1A: 118) between the source region (Fig. 1A: 126) and the drain region (Fig. 1A: 124); and
a ferroelectric layer (Fig. 1A: 111) between the channel region (Fig. 1A: 118) and the gate electrode (Fig. 1A: 112),
wherein the gate electrode (Fig. 1A: 112) faces the channel region (Fig. 1A: 118).
As discussed above, Slesazeck’s neural network apparatus in combination with Miyasako is substantially identical in structure to the claimed “neural network apparatus,” where the differences reside only in the remaining limitations relating to function and/or properties of “the ferroelectric layer of the first ferroelectric field effect transistor and the ferroelectric layer of the second ferroelectric field effect transistor are heat-treated in different heat treatment atmospheres from each other or at different heat treatment temperatures from each others.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s neural network apparatus in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 16, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 13.
As discussed above, Slesazeck’s neural network apparatus in combination with Miyasako is substantially identical in structure to the claimed “neural network apparatus,” where the differences reside only in the remaining limitations relating to function and/or properties of “the channel region of the first ferroelectric field effect transistor and the channel region of the second ferroelectric field effect transistor have substantially the same material and size as each other.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s neural network apparatus in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 17, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 11.
Furthermore, Slesazeck teaches wherein the synapse devices each further include a gate terminal (Fig. 3A: 322a), a source terminal (Fig. 3A: 326a), and a drain terminal (Fig. 3A: 324a), wherein
the gate electrodes of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to the gate terminal through the first shared wire (Fig. 3A: 392),
the source regions of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to the source terminal through the second shared wire (Fig. 3A: 396), and
the drain regions of the first ferroelectric field effect transistor and the second ferroelectric field effect transistor are electrically connected to the drain terminal through the third shared wire (Fig. 3A: 394).
Regarding claim 18, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 17.
Furthermore, Slesazeck teaches wherein the gate terminal of each of the synapse devices is electrically connected to the corresponding program line (Figs. 3A-3B: 392), the source terminal of each of the synapse devices is electrically connected to the corresponding input line (Figs. 3A-3B: 396), and the drain terminal of each of the synapse devices is electrically connected to the corresponding output line (Figs. 3A-3B: 394).
Regarding claim 19, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 11.
As discussed above, Slesazeck’s neural network apparatus in combination with Miyasako is substantially identical in structure to the claimed “neural network apparatus,” where the differences reside only in the remaining limitations relating to function and/or properties of “the first ferroelectric field effect transistor and the second ferroelectric field effect transistor have substantially the same electrical conductance when turned on.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s neural network apparatus in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Regarding claim 20, Slesazeck in combination with Miyasako teaches the limitations with respect to claim 11.
Furthermore, Slesazeck teaches an input circuit configured to provide an input voltage to the plurality of input lines (Fig. 3B: 382);
a program line driver configured to provide at least one of a program voltage or a read voltage to the plurality of program lines (Fig. 3B: 371-372); and
an output circuit configured to output signals from the plurality of output lines (Fig. 3B: 381).
As discussed above, Slesazeck’s neural network apparatus in combination with Miyasako is substantially identical in structure to the claimed “neural network apparatus,” where the differences reside only in the remaining limitations relating to function and/or properties of “switch between at least a 0th electrical conductance, a first electrical conductance, and a second electrical conductance based on a voltage applied to the synapse device, and values of the 0th electrical conductance to the second electrical conductance are discrete values configured to represent an arithmetical progression.”
The MPEP explains that examiners are to presume claimed functions are inherent when the prior art apparatus is substantially identical to the claimed apparatus. See esp. MPEP 2112.01(I) (Product and Apparatus Claims – When the Structure Recited in the Reference is Substantially Identically to that of the Claims, Claimed Properties or Functions Are Presumed to be Inherent). Slesazeck’s neural network apparatus in combination with Miyasako appears to be identical to applicant’s device, and thus the prior art apparatus is substantially identical to claimed apparatus, for which the claimed functions are presumed inherent. See MPEP 2112.01(I).
This presumption is rebuttable by applicant either (1) showing the prior art device and claimed device are not the same or (2) proving prior art device is incapable of performing the claimed functions. In re Ludtke, 441 F.2d 660, 664 (CCPA 1971); see MPEP 2112.01(I)(quoting In re Spada, 911 F.2d 705, 709 for “When the PTO shows a sound basis for believing that the products of the application and the prior art are the same, the applicant has the burden of showing that they are not.”). Applicant is reminded that argument of counsel is not evidence. MPEP 2145(I). Applicant is also reminded that claim limitations directed to the manner of operating do not distinguish an apparatus claim from the prior art apparatus. MPEP 2114(II) (“Manner of Operating the Device Does Not Differentiate Apparatus Claim from the Prior Art”).
Response to Arguments
Applicant’s arguments with respect to claims 1-20 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to ALFREDO BERMUDEZ LOZADA whose telephone number is (571)272-0877. The examiner can normally be reached 7:00AM-3:30PM EST.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alexander G Sofocleous can be reached at 571-272-0635. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/Alfredo Bermudez Lozada/ Primary Examiner, Art Unit 2825
Prosecution Insights