Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments, see pages 5-6, filed Mayr 05, 2026, with respect to the rejection(s) of claims 5-8 and 17-18 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. A new ground(s) of rejection is necessitated by the amendment. Applicant’s arguments with respect to claims 5-6, 8, and 17-18 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 5 is/are rejected under 35 U.S.C. 102(a)(1) as being clearly anticipated by Soeda US 2020/0081056 A1.
Regarding Claim 5, Soeda discloses a system (fig. 1, soft error inspection apparatus, par. [0031]) for evaluatingfig. 1, semiconductor device 10 , par. [0032]) arranged on a test board (fig. 1, scanning stage 20, par. [0031]), the system configured to: irradiate a beam irradiation (fig. 1, irradiation source 30, par. [0031]) region of the test boardsee fig. 2-3, semiconductor device 10 is set on the scanning stage 20 and can be moved two-dimensionally, par. [0032]) to measure error value of the test target semiconductor device (fig. 2, S102, par.[0036]- [0038]) by the test beam (fig. 2, 3, step 104: laser beam is radiated to a predetermined position of the semiconductor device 10, par. [0039]), wherein the test target semiconductor device is at least partially arranged in the beam irradiation region (certain coordinate position of the LSI chip, par. [0026]): and move the beam irradiation region to a different portion of the test board while the error value of the test target semiconductor device is measured (fig. 2, 3, irradiation position of the laser beam is moved, and the processing proceeds to step 104 and steps 104 and 106 are repeated, par. [0041]).
Claim(s) 6 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Soeda as applied to claim 5 above, and further in view of Hanan US 2019/0011495 A1.
Regarding Claim 6, Soeda discloses the system of claim 5, further comprising an algorithm board (fig. 1, elm. 50, par. [0031]) configured to measure the error value, wherein the algorithm board a( par. [0035]) andfig. 1, scanning stage 20, par. [0031]) are where the test target semiconductor device is irradiated (fig. 2, 3, step 104: laser beam radiate the semiconductor device 10, par. [0039]).
Soeda does not disclose disposed in a beam irradiation room.
Hanan disclose disposed in a beam irradiation room (fig. 1, elm.100, par. [0044]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an Automatic Testing Equipment to communicate with the load board for testing the operation of an electronic device installed on the load board, as taught in Hanan in modifying the apparatus of Soeda. The motivation would be the ATE executes pre-programmed test procedure to count the number of errors detected. (see Hanan: par. [0038]).
Regarding Claim 8, Soeda and Hanan discloses the system of claim 6, Soeda discloses further comprising: a base control system (fig. 1, elm. 40, par. [0031]) configured to receive the error value of the test target semiconductor device (fig. 1, semiconductor device 10 , par. [0032]) a from the algorithm board (fig. 1, elm. 50, par. [0031]); and a base analysis system (fig. 1, elm.510, par. [0031]) configured to analyze the error value of the test target semiconductor device (fig. 2, S102, par.[0036]- [0038]) received from the base control system.
Hanan discloses wherein the base control system and the base analysis system are disposed in the beam irradiation room (fig. 1, elm.100, par. [0044]).
The references are combined for the same reason already applied in the rejection of claim 6.
With respect to claim 8 and the limitations of the base analysis system are disposed in a radiation test control room which is isolated form the beam irradiation room: These limitations with regard to the choice placement and portioning of room, absent any criticality, is only considered to be an obvious modification of the space (room), since it appears to the Examiner that a the choice of intended use is nothing more than one of numerous ways that a person having ordinary skill in the art will find obvious to provide. In this case to provide separation of the base control system and the base analysis system.
Regarding Claim 17, Soeda and Hanan discloses the system of claim 5,Hanan discloses wherein a plurality of test target semiconductor devices (fig. 3, DUT 140, par. [0081]) are disposed on the test board (fig. 3, LB 150, par. [0081]).
The references are combined for the same reason already applied in the rejection of claim 6.
Regarding Claim 18, Soeda and Hanan the discloses the system of claim 17, wherein Hanan the plurality of test target semiconductor devices (fig. 3, DUT 140, par. [0081]) are arranged two-dimensionally in rows and columns (see fig. 3).
The references are combined for the same reason already applied in the rejection of claim 6.
Claim(s) 20 are rejected under 35 U.S.C. 103 as being unpatentable over y Soeda as applied to claim 5 above, and further in view of Sato et al. JP 2001215282 A (hereinafter referred to as Sato).
Regarding Claim 20, Soeda discloses the system of claim 5, Soeda does not disclose wherein the system is further configured to measure a difference of radiation dose across the beam irradiation region.
Sato discloses wherein the system is further configured to measure a difference of radiation dose across the beam irradiation region (abs.).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to (provide a measuring method of a neutron dose capable of measuring correctly the dose of radiation beam, as taught in Soeda and Sato in modifying the apparatus of Sato The motivation would be capable of accurately measuring a fast neutron dose.(see Sato: par. [0004]).
Claim(s) 20 are rejected under 35 U.S.C. 103 as being unpatentable over y Soeda as applied to claim 5 above, and further in view of Sato in view of Hanan.
Regarding Claim 21, Soeda discloses the system of claim 5, Soeda does not disclose wherein the system is further configured to measure a radiation dose difference in a two-dimensionally partitioned grid of the beam irradiation region.
Sato discloses the system is further configured to measure a radiation dose difference (abs.).
The references are combined for the same reason already applied in the rejection of claim 6.
Hanan discloses a two-dimensionally partitioned grid of the beam irradiation region (fig. 3, DUT 140, par. [0081]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to provide an Automatic Testing Equipment to communicate with the load board for testing the operation of an electronic device installed on the load board, as taught in Hanan in modifying the apparatus of Soeda and Sato. The motivation would be the ATE executes pre-programmed test procedure to count the number of errors detected. (see Hanan: par. [0038]).
Allowable Subject Matter
Regarding Claim 19, is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to COURTNEY G MCDONNOUGH whose telephone number is (571)272-6552. The examiner can normally be reached M-F 8 am-5 pm.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, EMAN ALKAFAWI can be reached at (571) 272-4448. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/COURTNEY G MCDONNOUGH/Examiner, Art Unit 2858
/FARHANA A HOQUE/Primary Examiner, Art Unit 2858
Prosecution Insights