Prosecution Insights
Last updated: August 15, 2026
Application No. 18/750,165

LEAD FRAME FOR SENSOR

Final Rejection §103
Filed
Jun 21, 2024
Priority
Jun 23, 2023 — EU 23181129.0
Examiner
ASTACIO-OQUENDO, GIOVANNI
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Melexis Technologies S.A.
OA Round
2 (Final)
88%
Grant Probability
Favorable
3-4
OA Rounds
3m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 88% — above average
88%
Career Allowance Rate
648 granted / 733 resolved
+20.4% vs TC avg
Moderate +10% lift
Without
With
+10.4%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
21 currently pending
Career history
743
Total Applications
across all art units

Statute-Specific Performance

§101
11.9%
-28.1% vs TC avg
§103
37.3%
-2.7% vs TC avg
§102
11.8%
-28.2% vs TC avg
§112
34.4%
-5.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 733 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. This Action is in response to amendment filed on 6/1/2026. Claims 1 – 15 are pending. Claims 1 and 10 – 12 have been amended. Response to Arguments Applicant’s arguments have been fully considered but are moot in view of the new ground of rejection. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 4, 9, 10, 14, and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li et al. WO 2020/227363 A1; hereinafter Li; previously cited) in view of Kuriki (US 2022/0293923 A1; hereinafter Kuriki; newly cited). Li is cited by the Applicant. Regarding Claim 1, Li discloses a lead frame for a current sensor (Fig. 4A, item 400 and para [0042]; 400 comprising a leadframe), the lead frame comprising PNG media_image1.png 458 666 media_image1.png Greyscale a conductive piece with an average thickness and a sensing zone for generating a signal detectable by a current sensing element when current flows through the lead frame (Fig. 4A and para [0042]; Hall-effect sensor device 400 comprising a leadframe with a IC die 180 assembled top side up and para [0025]; in operation a DC power supply applied between lead 160 and lead 163 generates a constant current flow that flows in the semiconductor Hall element), and a routing zone outside the sensing zone for routing current towards the sensing zone (Fig. 4A and para [0042]; a Hall-effect sensor having bond pads 181 generally with pillars 182 thereon (bond pads/pillars not shown) that is attached top side up to a bottom side of the leads 160-163 of a leadframe, for example, by a solder connection where the clip 130 is riveted by rivets 431 to the leadframe), wherein the routing zone (Fig. 4A, item 130) comprises a region with a largest area having a predetermined average thickness, so a total thickness of the lead frame at the sensing zone is thicker than the average thickness of said largest area (Fig. 4A and para [0042]; clip 130 and double (2X) leadframe thickness on the FGC side of the device). But Li does not specifically teach wherein at least the sensing zone includes additional conductive material added by additive manufacturing techniques or disposed on the conductive piece. However, Kuriki suggests wherein at least the sensing zone includes additional conductive material added by additive manufacturing techniques or disposed on the conductive piece (para[0108]; addition of the conductive additive to the active material layer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify LI in view of Kuriki in order to increase the electric conductivity of the material (Kuriki, para [0108]). Regarding Claim 4, Li and Kuriki disclose the lead frame of claim 1, Li also discloses wherein the thickness of the sensing area is between 5% and 120% thicker than the average thickness of the conductive piece, for example between 10% and 80% thicker than the average thickness (Fig. 4A and para [0042]; clip 130 and double (2X) leadframe thickness on the FGC side of the device). Regarding Claim 9, Li and Kuriki disclose a current sensor comprising the lead frame (Li, Fig. 4A, item 400 and para [0042]; 400 comprising a leadframe) of claim 1. Regarding Claim 10, Li and Kuriki disclose a method of manufacturing a lead frame (Li, Fig. 4A, item 400 and para [0042]; 400 comprising a leadframe) in accordance with claim 1, Li also discloses comprising providing a shaped conductive piece with an average thickness. (Fig. 4A and para [0042]; Hall-effect sensor device 400 comprising a leadframe with a IC die 180 assembled top side up and para [0025]; in operation a DC power supply applied between lead 160 and lead 163 generates a constant current flow that flows in the semiconductor Hall element), so a total thickness of the sensing zone is thicker than the average thickness of the rest of the conductive piece, wherein the area of the conductive piece with the average thickness is larger than the sensing zone (Fig. 4A and para [0042]; clip 130 and double (2X) leadframe thickness on the FGC side of the device). But Li does not specifically teach and locally adding conductive material by additive manufacturing techniques or deposition the conductive material on a zone being a sensing zone. However, Kuriki suggests and locally adding conductive material by additive manufacturing techniques or deposition the conductive material on a zone being a sensing zone (para[0108]; addition of the conductive additive to the active material layer). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify LI in view of Kuriki in order to increase the electric conductivity of the material (Kuriki, para [0108]). Regarding Claim 14, Li and Kuriki disclose a method of providing a sensor comprising providing the lead frame in accordance with claim 10, Li also discloses further comprising attaching a die to the lead frame (para [0003]; an integrated circuit (IC) die having a semiconductor Hall-effect sensor element and para [0045]; semiconductor die or multiple semiconductors die) and providing molding (para [0031]; mold compound). Regarding Claim 15, Li and Kuriki disclose the method of claim 14, Li also discloses further comprising providing an insulation layer between the lead frame and the die (para [0045]; the semiconductor die can be formed from a variety of processes including bipolar, insulated-gate bipolar transistor). Claim(s) 2, 3, 5 – 8, and 11 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of Kuriki, and further in view of Sharma et al. (US 2005/0248336 A1; hereinafter Sharma). Sharma is cited by the Applicant. Regarding Claim 2, Li and Kuriki disclose the lead frame of claim 1. But Li and kuriki do not specifically disclose wherein the lead frame comprises a necking on the sensing zone. However, Sharma suggests wherein the lead frame comprises a necking on the sensing zone (para [0086]; lead frame comprises an extended current conductor portion). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the combination of LI and Kuriki in view of Sharma in order to provide alignment to the magnetic field sensor (Sharma, para [0086)]. Regarding Claim 3, Li and Kuriki disclos the lead frame of claim 1. But Li and Kuriki do not specifically disclose wherein the average thickness of the largest area of the routing zone is 250 micrometers. However, Sharma suggests wherein the average thickness of the largest area of the routing zone is 250 micrometers (para [0040]; the Hall effect element 18 lies in a region between 200 microns and 400 microns). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the combination of LI and Kuriki in view of Sharma because the position of the Hall effect element in the x-axis and the y-axis can vary with manufacturing position tolerances without substantial effect upon the sensitivity of the current sensor (Sharma, para [0040]). Regarding Claim 5, Li and Kuriki disclose the lead frame of claim 1. But Li and kuriki do not specifically disclose wherein the additional material is disposed on and beyond the sensing zone into the routing zone for an area smaller than the largest area of the routing zone. However, Sharma suggests wherein the additional material is disposed on and beyond the sensing zone into the routing zone for an area smaller than the largest area of the routing zone (para [0084]; current sensor also includes a substrate having a first surface and a second, opposing, surface). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the combination of Li and Kuriki in view of Sharma in order to provide greater sensitivity (Sharma, para [[0087]). Regarding Claim 6, Li and Kuriki disclos the lead frame of claim 1. But Li and Kuriki do not specifically disclose wherein the piece is a sheet that comprises two opposite planar faces, wherein the additional material is provided on one or both faces of the sheet. However, Sharma suggests wherein the piece is a sheet that comprises two opposite planar faces, wherein the additional material is provided on one or both faces of the sheet (para [0084]; current sensor also includes a substrate having a first surface and a second, opposing, surface). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify thew combination of Li and Kuriki in view of Sharma in order to provide greater sensitivity (Sharma, para [[0087]). Regarding Claim 7, Li, Kuriki, and Sharma disclose the lead frame of claim 6, Sharma also suggests wherein the additional material disposed on a face of the sheet covers a first area and the additional material disposed on the opposite face covers a second area, wherein the first area is larger than the second area (para [0086]; the Hall effect element is disposed to a side (i.e., slightly offset along a y-axis) of the current conductor portion, where the magnetic field is pointed along the z-axis; however, a Hall effect element, or another type of magnetic field sensor, for example, a magnetoresistance element, having a maximum response axis aligned in another direction, can be disposed at another position relative to the current conductor portion, for example, on top (in a direction of the z-axis) of the current conductor portion). Regarding Claim 8, Li and Kuriki disclose the lead frame of claim 1. But Li and Kuriki do not specifically disclose wherein the conductive piece is a conductive planar piece with constant and uniform thickness outside the sensing zone. However, Sharma suggests wherein the conductive piece is a conductive planar piece with constant and uniform thickness outside the sensing zone (para[0029]; an exemplary current sensor in accordance with the present invention includes a lead frame having a plurality of leads; the leads are coupled to the other leads to form a current path, or current conductor with a narrow portion having a width w1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the combination of Li and Kuriki in view of Sharma in order to provide improved sensitivity (Sharma, para [0010]). Regarding Claim 11, Li and Kuriki disclos the method of claim 10. But Li and Kuriki do not specifically disclose wherein locally adding the conductive material is provided by 3D printing. However, Sharma suggests wherein locally adding the conductive material is provided by 3D printing (para [0014]; providing a substrate having first and second opposing surfaces, forming one or more magnetic field transducers about the first surface of the substrate, depositing a second current conductor portion on the first surface of the substrate proximate to the one or more magnetic field transducers, and mounting the substrate to the lead frame portion so that the first current conductor portion is coupled to the second current conductor portion and para[0032]; material deposited directly on the first surface). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the combination of Li and Kuriki in view of Sharma in order to provide greater sensitivity (Sharma, para [[0087]). Claim(s) 12 and 14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Li in view of Kuriki in view of Sharma, and further in view of Taylor et al. (US 2008/0297138 A1; hereinafter Taylor). Regarding Claim 12, Li and Kuriki disclos the method of claim 10. But Li and Kuriki does not specifically disclose wherein locally adding the conductive material is provided by vacuum deposition and/or electroplating. However, Taylor suggests wherein locally adding material is provided by depositing conductive material on the lead frame, for example by vacuum deposition and/or electroplating (para [0119]; screen printing process can result in a lead frame deposited insulting layer comprised of a variety of materials, including but not limited to, polymers or ceramics. In still other embodiments, the lead frame deposited insulating layer is formed with a vacuum deposition process). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the combination of Li and Kuriki in view of Taylor because the invention provides a miniaturized current sensor (Taylor, para [0003]). Regarding Claim 13, Li, Kuriki, and Taylor discloses the method of claim 12. But Li, Kuriki, and Taylor do not specifically teach further comprising providing a mask. However, Urankar suggests further comprising providing a mask (para [0067]; older mask, deposited on the sides of the first and second printed circuit assemblies). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the combination of Li, Kuriki, and Taylor in view of Urankar in order to prevent any contact (Urankar, para [0067]). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: Muellner et al. (US 2022/0270960 A1) teach an additive processing steps (see para [0075]). Weiblen et al. (US 2025/0101161 A1) suggest a conductive region made of a conductive plastic or of a plastic material provided with conductive additives (para [0036]). Bickford et al. (US 10,018,686 B1) disclose conductive traces may be fabricated on the semiconductor substrate 270 by means of photolithographic patterning, an additive process, such as inkjet or aerojet printing, or another technique (column 8, lines 29 – 32). Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GIOVANNI ASTACIO-OQUENDO whose telephone number is (571)270-5724. The examiner can normally be reached Monday - Friday, 8:00am - 5:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy Phan can be reached at 571-272-7924. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GIOVANNI ASTACIO-OQUENDO/ Primary Examiner, Art Unit 2858 6/13/2026
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Prosecution Timeline

Jun 21, 2024
Application Filed
Mar 02, 2026
Non-Final Rejection mailed — §103
Jun 01, 2026
Response Filed
Jun 18, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
88%
Grant Probability
99%
With Interview (+10.4%)
2y 5m (~3m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 733 resolved cases by this examiner. Grant probability derived from career allowance rate.

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