Prosecution Insights
Last updated: October 02, 2026
Application No. 18/750,247

PHOTOALIGNMENT OF SEMICONDUCTOR STRUCTURES USING AN OPAQUE HARDMASK

Non-Final OA §102
Filed
Jun 21, 2024
Priority
Jun 27, 2023 — provisional 63/523,567
Examiner
FERNANDES, ERROL V
Art Unit
Tech Center
Assignee
Micron Technology Inc.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
96%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allowance Rate
701 granted / 821 resolved
+25.4% vs TC avg
Moderate +11% lift
Without
With
+10.8%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 2m
Avg Prosecution
26 currently pending
Career history
830
Total Applications
across all art units

Statute-Specific Performance

§101
0.1%
-39.9% vs TC avg
§103
62.3%
+22.3% vs TC avg
§102
33.3%
-6.7% vs TC avg
§112
4.0%
-36.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 821 resolved cases

Office Action

§102
DETAILED ACTION Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Gupta et al. US 2023/0139457 A1. Regarding claim 1, Gupta discloses: A three-dimensional (3D) NAND structure (Fig. 1A), comprising: a first substrate stack (101) comprising alternating oxide (104; para 0036) and nitride (106; para 0037) layers; a plurality of first pillars (110) formed through multiple layers of the first substrate stack; a plurality of first pillar alignment features (122) respectively provided at top portions of the plurality of first pillars; a second substrate stack (105) provided on the first substrate stack, the second substrate stack comprising alternating oxide (104; para 0048) and nitride layers (106; para 0048), and the second substrate stack covering the plurality of first pillars and the plurality of first pillar alignment features; and a plurality of second pillars (135, 137) formed through multiple layers of the second substrate stack, wherein bottoms of each of the second pillars are respectively aligned with corresponding ones of the first pillar alignment features. Allowable Subject Matter Claim 2-9 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to teach or clearly suggest the limitations of claim 2 stating “wherein the first pillar alignment features comprise oxide plugs”. In light of these limitations, the prior art fails to anticipate or make obvious the claimed invention. Claims 10-20 are allowed. The following is an examiner’s statement of reasons for allowance: The prior art fails to teach or clearly suggest the limitations of claim 10 stating “illuminating a portion of the first masking layer with illumination light, wherein a reflected portion of the illumination light indicates a location of the first pillar alignment feature corresponding to the first pillar, wherein particular wavelengths of the illumination light are blocked by the first masking layer”; and of claim 19 stating “illuminating a portion of the first masking layer with illumination light, wherein a reflected portion of the illumination light indicates a location of the first pillar alignment feature corresponding to the first pillar, wherein particular wavelengths of the illumination light are blocked by the first masking layer; forming a first reference alignment feature in the first masking layer; using the light source to align the first reference alignment feature with the first pillar alignment feature; depositing a second masking layer on at least a portion of the first masking layer; forming a second reference alignment feature in the second masking layer, wherein the second reference alignment feature is aligned with the first reference alignment feature”. In light of these limitations, the prior art fails to anticipate or make obvious the claimed invention. Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.” Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Gupta US 2023/0139457 A1 – discloses “pillar alignment features” (Fig. 1A; 122) as being conductive (para 0047) rather than oxide plugs as noted in claim 2. Also, there is no discussion relative to the alignment to the underlying plugs through a masking layer based on reflected portion of illuminated light as in claims 10 and 19. Fukuzumi et al. US 2022/0199641 A1 – discloses “pillar alignment features” (Fig. 1c; 122) as being conductive (para 0041) rather than oxide plugs as noted in claim 2. Also, there is no discussion relative to the alignment (Fig. 1D; para 0047) to the underlying plugs through a masking layer based on reflected portion of illuminated light as in claims 10 and 19. Omura US 2010/0176440 A1 – discloses “pillar alignment features” (Fig. 7A; 16a) as being a silicon nitride film (para 0087) rather than oxide plugs as noted in claim 2. Also, there is no discussion relative to the alignment (Fig. 6C-7A; paras 0090-0092) to the underlying plugs through a masking layer based on reflected portion of illuminated light as in claims 10 and 19. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ERROL V FERNANDES whose telephone number is (571)270-7433. The examiner can normally be reached on 9-5:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Britt Hanley can be reached on 571-270-3042. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /ERROL V FERNANDES/Primary Examiner, AU 2893
Read full office action

Prosecution Timeline

Jun 21, 2024
Application Filed
Sep 10, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12745469
SOLID-STATE IMAGING ELEMENT AND IMAGING SYSTEM
4y 1m to grant Granted Sep 22, 2026
Patent 12740098
TRANSISTORS WITH MITIGATED FREE BODY EFFECT
3y 0m to grant Granted Sep 15, 2026
Patent 12740124
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING
3y 0m to grant Granted Sep 15, 2026
Patent 12727494
SEMICONDUCTOR PACKAGE INCLUDING INTERPOSER
3y 9m to grant Granted Sep 01, 2026
Patent 12727460
INTEGRATED CIRCUIT STRUCTURE WITH RECESSED TRENCH CONTACT AND DEEP BOUNDARY VIA
3y 9m to grant Granted Sep 01, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
96%
With Interview (+10.8%)
2y 2m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 821 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month