Prosecution Insights
Last updated: August 17, 2026
Application No. 18/751,347

DISPLAY DEVICE

Non-Final OA §103
Filed
Jun 24, 2024
Priority
Sep 25, 2023 — TW 112136640
Examiner
DEGRASSE, IAN ISAAC
Art Unit
Tech Center
Assignee
AUO Corporation
OA Round
1 (Non-Final)
79%
Grant Probability
Favorable
1-2
OA Rounds
1y 4m
Est. Remaining
81%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allowance Rate
19 granted / 24 resolved
+19.2% vs TC avg
Minimal +1% lift
Without
With
+1.4%
Interview Lift
resolved cases with interview
Typical timeline
3y 6m
Avg Prosecution
49 currently pending
Career history
76
Total Applications
across all art units

Statute-Specific Performance

§103
54.3%
+14.3% vs TC avg
§102
33.2%
-6.8% vs TC avg
§112
12.5%
-27.5% vs TC avg
Black line = Tech Center average estimate • Based on career data from 24 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-12 are rejected under 35 U.S.C. 103 as being unpatentable over US 2017/0256522 A1 to Cok et al. (hereinafter “Cok”). Regarding claim 1, Cok discloses a display device, comprising: a driver substrate having a display region and a peripheral region (micro-LED display device having substrate 80 having display region 84 and peripheral region outside of region 84; Figs. 27-29A; paragraphs [0004], [0181]); and a first light-emitting unit disposed on the driver substrate and comprising: a first microcontroller disposed outside the display region and electrically connected to the driver substrate through a plurality of first connection pads (a first light-emitting unit may be defined as a portion of surface area of micro-printed display 99 disposed on substrate 80 comprising controllers 86, 88 disposed outside region 84 and electrically connected to substrate 80 through pads 62, where full array of pixels 96 of display 99 in micro-LED display device comprises many more rows and columns of pixels 96 than are shown; Figs. 27-29A; paragraph [0181]); and a plurality of first pixels and a plurality of first supplementary pixels electrically connected to the first microcontroller and disposed on the display region (plurality of first pixels 96 with a plurality of first other pixels 96 electrically connected to controllers 86, 88 and disposed in region 84; Figs. 27-29A), wherein the first pixels are arranged in two rows extending in a second direction in a first direction, and the first supplementary pixels are arranged in two other rows extending in the second direction in the first direction (first pixels 96 arranged in two rows in first direction and extending in second direction, and other pixels 96 arranged in two rows in first direction and extending in second direction; Figs. 27-29A; paragraphs [0181], [0189]), wherein the first microcontroller is disposed between the first pixels in the two rows in the first direction, and the first supplementary pixels in the two other rows are at least partially aligned with the first pixels in the two rows in the first direction (controllers 86, 88 disposed between first pixels 96 in two rows in the first direction, and the other pixels 96 in the two other rows are at least partially aligned with first pixels 96 in the two rows in the first direction; Figs. 27-29A). Cok fails to explicitly disclose the first microcontroller disposed on the display region. However, Cok discloses another controller 92 disposed in the display region (see Figs. 27-28A; paragraphs [0180]-[0181]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Cok in this manner in order to potentially provide narrower or bezel-less panel designs by freeing up peripheral space, smaller overall assembly footprint, and shorter signal paths which reduces parasitics, improves timing accuracy, and lowers power losses. Regarding claim 2, Cok discloses the display device according to claim 1, wherein the first light-emitting unit further comprises: a plurality of first traces completely disposed in the display region and electrically connecting the first microcontroller to the first pixels in the two rows; and a plurality of first supplementary traces completely disposed in the display region and electrically connecting the first microcontroller to the first supplementary pixels in the two other rows (part of conductors 32, 34 disposed entirely in region 84 and associated with all pixels 96 in all rows and electrically connected to controllers 86, 88; Fig. 29A; paragraphs [0180]-[0182]). Regarding claim 3, Cok discloses the display device according to claim 1, wherein the first light-emitting unit further comprises: a plurality of first traces completely disposed in the display region and electrically connecting the first microcontroller to the first pixels in the two rows; and a plurality of first supplementary traces, wherein at least a portion of the first supplementary traces extend from the first microcontroller in the display region to the peripheral region and then extend from the peripheral region to the first supplementary pixels in the two other rows in the display region (conductors 32, 34 in region 84 associated with all pixels 96 in all rows and electrically connected to controllers 86, 88, where part of conductors 34 extend from region 84 to controllers 86, 88 and into peripheral region and then towards other pixels 96 in rows in region 84; Fig. 29A; paragraphs [0180]-[0182]). Regarding claim 4, Cok discloses the display device according to claim 3, wherein another portion of the first supplementary traces are completely disposed in the display region (part of conductors 34 disposed entirely in region 84; Fig. 29A). Regarding claim 5, Cok discloses the display device according to claim 1, wherein the display region comprises a plurality of first control regions (region 84 may comprise a plurality of areas defined as control regions along border of region 84; Fig. 29A), and the display device further comprises a plurality of first light-emitting units (micro-LED display device comprises a plurality of portions of surface area of full array of micro-printed display 99; Fig. 29A), wherein the first microcontroller, the first supplementary pixels, and the first pixels in each of the first light-emitting units are disposed on a corresponding one among the first control regions, wherein the first control regions are aligned in the first direction at a boundary between the display region and the peripheral region (controllers 86, 88 and pixels 96 of each portion of display 99 aligned along first direction at boundary of region 84 which may be defined as one of the control regions; Fig. 29A). Regarding claim 6, Cok discloses the display device according to claim 1, further comprising a plurality of first light-emitting units, wherein in each of the first light-emitting units, a vertical projection of the first microcontroller on the driver substrate does not overlap with vertical projections of the first pixels and the first supplementary pixels on the driver substrate (micro-LED display device comprises a plurality of portions of surface area of full array of micro-printed display 99, where controllers 86, 88 do not vertically overlap with pixels 96; Fig. 29A; paragraph [0004]). Regarding claim 7, Cok discloses the display device according to claim 1, further comprising: a plurality of second light-emitting units disposed on the driver substrate and arranged in the first direction (micro-LED display device comprise a second plurality of portions of surface area of full array of micro-printed display 99; Fig. 29A), wherein each of the second light-emitting units comprises: a second microcontroller disposed outside the display region and electrically connected to the driver substrate through a plurality of second connection pads (controllers 86, 88 disposed outside region 84 and electrically connected to substrate 80 through pads 62, where full array of pixels 96 of display 99 in micro-LED display device comprises many more rows and columns of pixels 96 than are shown; Figs. 27-29A; paragraph [0181]); and a plurality of second pixels electrically connected to the second microcontroller and disposed on the display region (plurality of second pixels 96 electrically connected to controllers 86, 88 and disposed in region 84; Figs. 27-29A), wherein the second pixels are arranged in two rows extending in the second direction in the first direction, wherein the second microcontroller is disposed between the second pixels in the two rows in the first direction (second pixels 96 arranged in two rows in first direction and extending in second direction, where at least one of controllers 86, 88 disposed between second pixels 96 in two rows; Figs. 27-29A; paragraphs [0181], [0189]). Cok fails to explicitly disclose the second microcontroller disposed on the display region. However, Cok discloses another controller 92 disposed in the display region (see Figs. 27-28A; paragraphs [0180]-[0181]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Cok in this manner in order to potentially provide narrower or bezel-less panel designs by freeing up peripheral space, smaller overall assembly footprint, and shorter signal paths which reduces parasitics, improves timing accuracy, and lowers power losses. Regarding claim 8, Cok discloses the display device according to claim 7, further comprising a plurality of first light-emitting units, wherein the first microcontrollers of the first light-emitting units and the second microcontrollers of the second light-emitting units are arranged in an alternating manner in the first direction (portions of controllers 86, 88 associated with first and second plurality of portions of surface area of full array of micro-printed display 99 may be defined such that the portions of controllers 86, 88 are disposed in an alternating manner in the first direction; Fig. 29A). Regarding claim 9, Cok discloses the display device according to claim 7, wherein the display region comprise a plurality of first control regions and a plurality of second control regions (region 84 may comprise a plurality of areas defined as first and second control regions along border of region 84; Fig. 29A), and the display device further comprises a plurality of first light-emitting units (micro-LED display device comprises a plurality of portions of surface area of full array of micro-printed display 99; Fig. 29A), wherein the first microcontroller, the first supplementary pixels, and the first pixels in each of the first light-emitting units are disposed on a corresponding one among the first control regions (controllers 86, 88 and pixels 96 of first portion of display 99 may be defined as one of first control regions; Fig. 29A), and the second microcontroller and the second pixels in each of the second light-emitting units are disposed on a corresponding one among the second control regions (controllers 86, 88 and pixels 96 of second portion of display 99 may be disposed in area defined as one of second control regions; Fig. 29A), wherein a width of each of the first control regions in the first direction is twice a width of each of the second control regions in the first direction (first and second control regions may be arbitrarily defined across a part of full array of pixels 96 of display 99 such that width of first control regions are twice that of the second control regions; Fig. 29A). Regarding claim 10, Cok discloses the display device according to claim 7, wherein each of the second light-emitting units comprises: a plurality of second supplementary pixels electrically connected to the second microcontroller and disposed on the display region (plurality of second other pixels 96 electrically connected to associated controllers 86, 88 and disposed in region 84; Figs. 27-29A), wherein the second supplementary pixels are arranged in two other rows extending in the second direction in the first direction (second other pixels 96 arranged in two rows in first direction and extending in second direction; Figs. 27-29A; paragraphs [0181], [0189]), wherein the second supplementary pixels in the two other rows are at least partially aligned with the second pixels in the two rows in the first direction (second other pixels 96 in the two other rows are at least partially aligned with second pixels 96 in the two rows in the first direction; Figs. 27-29A). Regarding claim 11, Cok discloses the display device according to claim 10, wherein the display region comprise a plurality of first control regions and a plurality of second control regions (region 84 may comprise a plurality of areas defined as first and second control regions along border of region 84; Fig. 29A), and the display device further comprises a plurality of first light-emitting units (micro-LED display device comprises a plurality of portions of surface area of full array of micro-printed display 99; Fig. 29A), wherein the first microcontroller, the first supplementary pixels, and the first pixels in each of the first light-emitting units are disposed on a corresponding one among the first control regions (first controllers 86, 88 and pixels 96 of first portion of display 99 may be defined as one of first control regions; Fig. 29A), and the second microcontroller, the second pixels, and the second supplementary pixels in each of the second light-emitting units are disposed on a corresponding one among the second control regions (second controllers 86, 88 and pixels 96 of second portion of display 99 may be disposed in area defined as one of second control regions; Fig. 29A), wherein a width of each of the first control regions in the first direction is equal to a width of each of the second control regions in the first direction (first and second control regions may be arbitrarily defined across a part of full array of pixels 96 of display 99 such that width of first control regions are twice that of the second control regions; Fig. 29A). Regarding claim 12, Cok discloses a display device, comprising: a driver substrate having a display region and a peripheral region (micro-LED display device having substrate 80 having display region 84 and peripheral region outside of region 84; Figs. 27-29A; paragraphs [0004], [0181]); and a first light-emitting unit disposed on the driver substrate and comprising: a first microcontroller disposed outside the display region and electrically connected to the driver substrate through a plurality of first connection pads (a first light-emitting unit may be defined as a portion of surface area of micro-printed display 99 disposed on substrate 80 comprising controllers 86, 88 disposed outside region 84 and electrically connected to substrate 80 through pads 62, where full array of pixels 96 of display 99 in micro-LED display device comprises many more rows and columns of pixels 96 than are shown; Figs. 27-29A; paragraph [0181]); a plurality of first pixels disposed on the display region and arranged in two rows extending in a second direction in a first direction (plurality of first pixels 96 disposed in region 84 and arranged in two rows in first direction and extending in second direction; Figs. 27-29A; paragraphs [0181], [0189]); a plurality of first supplementary pixels disposed on the display region and arranged in two other rows extending in the second direction in the first direction (plurality of first other pixels 96 disposed in region 84 and arranged in two rows in first direction and extending in second direction; Figs. 27-29A; paragraphs [0181], [0189]); a plurality of first traces completely disposed in the display region and electrically connecting the first microcontroller to the first pixels in the two rows (first conductors 32, 34 disposed entirely in region 84 associated with first pixels 96 and electrically connected to controllers 86, 88; Fig. 29A; paragraphs [0180]-[0182]); and a plurality of first supplementary traces, wherein at least a portion of the first supplementary traces extend from the first microcontroller in the display region to the peripheral region and then extend from the peripheral region to the first supplementary pixels in the two other rows in the display region (first other conductors 32, 34, where part of conductors 34 extend from region 84 to controllers 86, 88 and into peripheral region and then towards other pixels 96 in rows in region 84; Fig. 29A; paragraphs [0180]-[0182]). Cok fails to explicitly disclose the first microcontroller disposed on the display region. However, Cok discloses another controller 92 disposed in the display region (see Figs. 27-28A; paragraphs [0180]-[0181]). Therefore, it would have been obvious to a person having ordinary skill in the art before the effective filing date of the claimed invention to have modified Cok in this manner in order to potentially provide narrower or bezel-less panel designs by freeing up peripheral space, smaller overall assembly footprint, and shorter signal paths which reduces parasitics, improves timing accuracy, and lowers power losses. Conclusion The following prior art made of record and not relied upon is considered pertinent to applicant's disclosure: US 2022/0320243 A1 to Huang et al., US 2021/0225817 A1 to Liao et al., and US 2020/0020676 A1 to Cok et al. which disclose related display devices having similar arrangements of pixels, controllers and associated traces. Any inquiry concerning this communication or earlier communications from the examiner should be directed to IAN DEGRASSE whose telephone number is (571) 272-0261. The examiner can normally be reached Monday through Friday 8:30a until 5:00p. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, JEFF NATALINI can be reached on (571) 272-2266. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /IAN DEGRASSE/Examiner, Art Unit 2818 /JEFF W NATALINI/Supervisory Patent Examiner, Art Unit 2818
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Prosecution Timeline

Jun 24, 2024
Application Filed
Aug 04, 2026
Non-Final Rejection mailed — §103 (current)

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Prosecution Projections

1-2
Expected OA Rounds
79%
Grant Probability
81%
With Interview (+1.4%)
3y 6m (~1y 4m remaining)
Median Time to Grant
Low
PTA Risk
Based on 24 resolved cases by this examiner. Grant probability derived from career allowance rate.

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