Prosecution Insights
Last updated: July 17, 2026
Application No. 18/751,384

SEMICONDUCTOR PACKAGE AND METHOD OF MANUFACTURING THE SEMICONDUCTOR PACKAGE

Non-Final OA §112
Filed
Jun 24, 2024
Priority
Aug 21, 2023 — RE 10-2023-0108720
Examiner
PATEL, REEMA
Art Unit
Tech Center
Assignee
Samsung Electronics Co., Ltd.
OA Round
1 (Non-Final)
89%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
95%
With Interview

Examiner Intelligence

Grants 89% — above average
89%
Career Allowance Rate
996 granted / 1122 resolved
+28.8% vs TC avg
Moderate +6% lift
Without
With
+6.4%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
34 currently pending
Career history
1156
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
61.4%
+21.4% vs TC avg
§102
10.5%
-29.5% vs TC avg
§112
11.8%
-28.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1122 resolved cases

Office Action

§112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statement (IDS) was submitted on 6/24/24. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement has been considered by the examiner. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 2 and 12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claims 2 and 12 recite the limitation that the photosensitive insulating layer includes “at least one selected from acrylate resin, novolac resin, and PHS resin.” There is a grammatical incongruity between the phrase “at least one” and the conjunction “and”. As written, it is unclear if the “at least one” is selected from at least one acrylate resin AND at least one novolac resin AND at least one PHS resin. Alternatively, the claim could be interpreted as the “at least one” is selected from the group of acrylate resin AND novolac resin AND PHS resin (i.e., the “at least one” is selected acrylate resin OR novolac resin OR PHS). Because both interpretations have differing metes and bounds, the claim is rendered indefinite. For the purposes of examination, the examiner interprets the latter interpretation (i.e., the “at least one” is selected from “the group of...”). However, appropriate correction and/or clarification is requested. Allowable Subject Matter Claims 1, 3-11, and 13-20 are allowed. Claim 1 contains allowable subject matter because of the limitation of forming a semiconductor package by forming a photosensitive insulating layer on the lower redistribution wiring layer; radiating a first light onto the photosensitive insulating layer through a first mask to form a first hardened portion on the central region; radiating a second light onto the photosensitive insulating layer through a second mask to form a second hardened portion on the peripheral region, the second hardened portion surrounding through opening regions; removing non-hardened portions in the through opening regions and at least a portion of the first hardened portion; and forming conductive structures in the through opening regions. Claims 3-10 depend on claim 1. Claim 11 contains allowable subject matter because of the limitation of forming a semiconductor package by forming a lower redistribution wiring layer having a central region and a peripheral region surrounding the central region, the lower redistribution wiring layer having bonding pads that are exposed from an upper surface thereof; forming a photosensitive insulating layer on the upper surface of the lower redistribution wiring layer; radiating a first light having a first wavelength onto the photosensitive insulating layer through a first mask to form a first hardened portion in the central region; radiating a second light having a second wavelength greater than the first wavelength onto the photosensitive insulating layer through a second mask to form a second hardened portion on the bonding pads, the second hardened portion surrounding through opening regions; removing the photosensitive insulating layer in the through opening regions and at least a portion of the first hardened portion; and forming conductive structures on the bonding pads in the through opening regions. Claims 13-19 depend on claim 11. Claim 20 contains allowable subject matter because of the limitation of forming a semiconductor package by forming a lower redistribution wiring layer having a central region and a peripheral region surrounding the central region, the lower redistribution wiring layer having bonding pads that are exposed from an upper surface thereof; forming a photosensitive insulating layer on the upper surface of the lower redistribution wiring layer; forming a first hardened portion having a first hardness on the central region by radiating a first light having a first wavelength on the photosensitive insulating layer; forming a second hardened portion having a second hardness higher than the first hardness by radiating a second light having a second wavelength greater than the first wavelength onto the photosensitive insulating layer, the second hardened portion surrounding through opening regions on the bonding pads; removing the photosensitive insulating layer on the through opening regions and at least a portion of the first hardened portion; and forming conductive structures on the bonding pads in the through opening regions. The closest prior art is Yoo et al. (U.S. 2020/0373216) which discloses a semiconductor package (1000, Fig. 5) with a lower redistribution wiring layer (101, Fig. 5) having a central region (center portion containing 105, Fig. 5) and a peripheral region (laterally surrounding center portion containing 105, Fig. 5) and conductive structures (107, 109, Fig. 5) within the peripheral region. However, Yoo does not disclose forming the conductive structures by radiating a first light onto the photosensitive insulating layer on the lower redistribution wiring layer through a first mask to form a first hardened portion on the central region; radiating a second light onto the photosensitive insulating layer through a second mask to form a second hardened portion on the peripheral region, the second hardened portion surrounding through opening regions; removing non-hardened portions in the through opening regions and at least a portion of the first hardened portion; and forming the conductive structures in the through opening regions and this is not otherwise rendered obvious from the prior art. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to REEMA PATEL whose telephone number is (571)270-1436. The examiner can normally be reached M-F, 8am-5pm EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Christine Kim can be reached at (571)272-8458. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /REEMA PATEL/Primary Examiner, Art Unit 2812
Read full office action

Prosecution Timeline

Jun 24, 2024
Application Filed
Jul 01, 2026
Non-Final Rejection mailed — §112 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
89%
Grant Probability
95%
With Interview (+6.4%)
2y 0m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1122 resolved cases by this examiner. Grant probability derived from career allowance rate.

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