DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, “the plurality of first bonding pads are in contact with the plurality of second bonding pads, respectively”, and “a plurality of fourth bonding pads on a fourth surface of the second structure and connected to the peripheral circuit” (as recited in claim 2) must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claim 2 is rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 2 is not clear because it recites, in lines 12-14, the limitation “a third structure between the first structure and the second structure, wherein the plurality of first bonding pads are in contact with the plurality of second bonding pads, respectively” (emphasis added). Claim 2 is shown in Fig. 7B of the present invention that “a third structure (D3) between the first structure (D1) and the second structure (D2)” (as recited in claim 2). Since the third structure D3 is between the first structure (D1) and the second structure (D2), therefore the plurality of first bonding pads (131a) cannot be in contact with the plurality of second bonding pads (132a), as recited in claim 2. For the purpose of examination, the Examiner assumes the above limitation of “a third structure between the first structure and the second structure, wherein the plurality of first bonding pads are in contact with the plurality of second bonding pads, respectively” (as recited in claim 2, lines 12-14) is:
“a third structure between the first structure and the second structure”.
Claim 2 is also not clear because it recites, in lines 20-23, the limitation “a plurality of third bonding pads on a third surface of the third structure and connected to the peripheral circuit; and a plurality of fourth bonding pads on a fourth surface of the second structure and connected to the peripheral circuit” (emphasis added). Fig. 7B of the present invention shows: a plurality of third bonding pads (133a) on a third surface of the third structure (D3) and connected to the peripheral circuit (PC), and a plurality of fourth bonding pads (133b) on a fourth surface of the third structure (D3) (not the second structure) and connected to the peripheral circuit (PC). For the purpose of examination, the Examiner assumes the above limitation of “a plurality of third bonding pads on a third surface of the third structure and connected to the peripheral circuit; and a plurality of fourth bonding pads on a fourth surface of the second structure and connected to the peripheral circuit” (as recited in claim 2, lines 20-23) is:
“a plurality of third bonding pads on a third surface of the third structure and connected to the peripheral circuit; and a plurality of fourth bonding pads on a fourth surface of the third structure and connected to the peripheral circuit” (emphasis added).
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Xiao et al. (U.S 2020/0098748 A1) (submitted from IDS filed on 06/24/2024 by the Applicant).
As to claim 1, Xiao et al. disclose in Fig. 1 a nonvolatile memory device comprising: a first structure (“peripheral device chip” 102) comprising at least one first memory plane (“memory stack” 116) (Fig. 1, para. [0033]-[0034], [0039]-[0040]); and a second structure ("first memory array device chip" 104) bonded to the first structure (“peripheral device chip” 102) and comprising at least one second memory plane (“two memory stacks” 134 and 156) (Fig. 1, para. [0047]-[0048]), wherein a number of the at least one first memory plane (“memory stack” 116) included in the first structure (“peripheral device chip” 102) is different from a number of the at least one second memory plane (“two memory stacks” 134 and 156) included in the second structure ("first memory array device chip" 104) (Fig. 1, para.[0044], [0048]), and wherein at least one of the first structure (“peripheral device chip” 102) and the second structure ("first memory array device chip" 104) further comprises a peripheral circuit (“transistors” 110) (Fig. 1, para. [0034], [0036]).
Allowable Subject Matter
Claim 2 would be allowable if amended to overcome 35 USC § 112 rejection as mentioned above.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure: HWANG et al. (US 2018/0358371 A1), KANAMORI et al. (US 2020/0203329 A1), and PARK et al. (US 2020/0105735 A1).
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THANH Y TRAN whose telephone number is (571)272-2110. The examiner can normally be reached M-F, 10am-10pm (flex) (PST).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kretelia Graham can be reached at (571)272-5055. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/Thanh Y. Tran/Primary Examiner, Art Unit 2817
June 26, 2026
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