Prosecution Insights
Last updated: April 19, 2026
Application No. 18/752,363

INTEGRATED ACTIVE ISOLATION MEASUREMENT

Non-Final OA §102§103§112
Filed
Jun 24, 2024
Examiner
MILLER, DANIEL R
Art Unit
2858
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Infineon Technologies AG
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 9m
To Grant
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
669 granted / 812 resolved
+14.4% vs TC avg
Strong +22% interview lift
Without
With
+21.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
31 currently pending
Career history
843
Total Applications
across all art units

Statute-Specific Performance

§101
4.0%
-36.0% vs TC avg
§103
45.7%
+5.7% vs TC avg
§102
22.9%
-17.1% vs TC avg
§112
23.1%
-16.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 812 resolved cases

Office Action

§102 §103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Specification The disclosure is objected to because of the following informalities: Paragraph 22 of the specification states “positive HV bus 120 and negative HV bus 122”. These reference numbers appear to be incorrect, as Fig. 1 shows positive HV bus 212 and negative HV bus 214. Paragraph 22 of the specification states “Power supply 106”. This reference number appears to be incorrect, as Fig. 1 shows power supply 102. Paragraph 22 of the specification states “a DC-DC converter (e.g., for )”. Language appears to missing after “e.g., for”. Paragraph 34 of the specification states “For example, with switch 204 open and switch 202 closed”. These reference numbers appear to be incorrect, as Fig. 2 shows switch 206 and switch 208. Paragraph 39 of the specification states “measurement resistor 310”. This reference number appears to be incorrect, as Fig. 3 shows measurement resistor 210. Paragraph 45 of the specification states “Additionally, the noninverting input of operational amplifier 524 is configured to be connected to terminal 410B (e.g., to receive the inverted measured voltage) and the inverting input of operational amplifier 524 is configured to connect to terminal 410A (e.g., to receive the positive measured voltage).” The reference numbers 410A, 410B in this passage appear to be reversed relative to the arrangement shown in Fig. 5. Paragraph 50 of the specification states “In the example shown in FIG. 8, pulse generator 220 applies pulses 850, 852, and 854 at times T2, T3, and T5 respectively”. However, Fig. 8 shows pulses applied at times T1, T3, and T5 respectively. Appropriate correction is required. The above-identified issues are merely exemplary and should not be considered comprehensive in nature. The examiner respectfully requests applicant’s review of the specification to correct any further informalities. Claim Objections Claims 6, 10 and 15 are objected to because of the following informalities: In claim 6, lines 2-3, “at least one the positive bus …” should be “at least one of the positive bus …”. In claim 10, line 3, “repeated values …” should be “taking repeated values …” (see claim 3, for example). In claim 15, line 6, “controlling a second to connect …” should be “controlling a second switch to connect …”. Appropriate correction is required. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1-13 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 1 recites: An isolation measurement circuit comprising: a first switch connecting a first isolation resistor to a terminal of a measurement resistor, wherein the first isolation resistor also connects to a positive bus of a power distribution system; a second switch connecting a second isolation resistor to the terminal of the measurement resistor, wherein the second isolation resistor also connects to a negative bus of the power distribution system; and a pulse generator that connects the measurement resistor to chassis ground. The examiner notes that the claim does not affirmatively recite a first isolation resistor, a measurement resistor, a positive bus of a power distribution system, a second isolation resistor, a negative bus of the power distribution system and chassis ground as affirmative elements of the claimed isolation measurement circuit. It is therefore unclear whether these structures are to be regarded as required elements of the isolation measurement circuit, or merely structures that functionally relate to the claimed isolation measurement circuit and the manner in which it is used. For purposes of the present examination these structures are not regarded as required elements of the claimed isolation measurement circuit, but rather structures that functionally relate to the claimed isolation measurement circuit and a manner of its use. The analogous issue is present in claim 8, with the same interpretation being applied for purposes of the present examination. Clarification is required so that the scope of the claims is clear. Claims 2-7 and claims 9-13 are rejected by virtue of their dependence from claims 1 and 8, respectively. Claim 2 recites: The isolation measurement circuit of claim 1, wherein the isolation measurement circuit is configured to determine a first value and a second value: wherein the first value is measured across the measurement resistor and comprises an indication of the isolation resistance between chassis ground and the positive bus when the first switch is conducting and the pulse generator delivers a pulse, wherein the second value is measured across the measurement resistor and comprises an indication of the isolation resistance between chassis ground and the negative bus when the second switch is conducting and the pulse generator delivers a pulse. It appears that the claim has recited insufficient structure for performing the recited function of “wherein the isolation measurement circuit is configured to determine a first value and a second value”, “wherein the first value is measured across the measurement resistor” and “wherein the second value is measured across the measurement resistor”. Paragraph 31 of the specification teaches, for example “Measurement circuit 218 is configured to measure a voltage drop across measurement resistor 210 and/or an electrical current through measurement resistor 210”, paragraph 34 teaches “Measurement circuitry 218 may measure the resulting voltage drop across measurement resistor 210 for the pulse, which may be a value indicative of the isolation resistance between chassis ground 120 and the positive HV bus 212 provided by isolation resistor 202” and paragraph 35 teaches “Measurement circuitry 218 may measure the resulting voltage drop across measurement resistor 210 for the pulse, which may be a value indicative of the isolation resistance between chassis ground 120 and the negative HV bus 24 provided by isolation resistor 204”. Paragraphs 31 and 34-35 of the specification teach that measurement circuitry 218 is configured to determine a first value and a second value, with the first value being measured across the measurement resistor and with the second value being measured across the measurement resistor. However, the isolation measurement circuit of claim 1 only requires a first switch, a second switch and a pulse generator. Consequently, the claim does not appear to recite the requisite structure for performing the claimed determine/measure functionality. As such, the boundaries of the functional language are unclear because the claim does not provide a discernable boundary on what performs the function. The recited function does not follow from the structure recited in the claim, so it is unclear whether the function requires some other structure or is simply a result of operating the isolation measurement circuit. Thus one of ordinary skill would not be able to draw a clear boundary between what is and is not covered by the claim. See MPEP 2173.05(g). Claim 9 is rejected under 35 U.S.C. 112(b) by analogous reasoning. Claims 3 and 10 are rejected under 35 U.S.C. 112(b) by virtue of their dependence from claims 2 and 9 respectively, and because the recited functionality of claims 3 and 10 (i.e., “taking repeated values measured across the measurement resistor over time; and determine whether a measured value deviates by a threshold amount relative to the repeated value measurements”) does not follow from the structure recited in claims 3 and 10 or the claims from which they depend, so it is unclear whether these functions require some other structure or is simply a result of operating the isolation measurement circuit. Clarification is required so that the scope of the claims is clear. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1-2, 4, 8-9, 11, 14-16 and 18 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by US 2025/0076353 to Healy (Healy). Regarding claim 1, Healy discloses an isolation measurement circuit comprising: a first switch connecting a first isolation resistor to a terminal of a measurement resistor, wherein the first isolation resistor also connects to a positive bus of a power distribution system (Healy, e.g. Fig. 3B (duplicated below) and paragraphs 52-62, first switch in the form of switch 310 connecting first isolation resistor in the form of resistor Riso+ connected to HV-Link+ to an upper terminal of a measurement resistor in the form of resistor R1); a second switch connecting a second isolation resistor to the terminal of the measurement resistor, wherein the second isolation resistor also connects to a negative bus of the power distribution system (Healy, e.g. Fig. 3B and paragraphs 52-62, second switch in the form of switch 311 connecting second isolation resistor in the form of resistor Riso- connected to HV-Link- to the upper terminal of a measurement resistor in the form of resistor R1); and a pulse generator that connects the measurement resistor to chassis ground (Healy, e.g. Fig. 3B and paragraphs 52-62, pulse generator in the form of AC signal generation circuit that includes auxiliary supply voltage 303 and switches 314-315). PNG media_image1.png 647 963 media_image1.png Greyscale Healy, Fig. 3B Regarding claim 2, Healy discloses wherein the isolation measurement circuit is configured to determine a first value and a second value: wherein the first value is measured across the measurement resistor and comprises an indication of the isolation resistance between chassis ground and the positive bus when the first switch is conducting and the pulse generator delivers a pulse (Healy, e.g. Fig. 3B and paragraphs 52-62, measurement of first value across resistor R1 by controller buffer 391 and resistor divider 375 to generate measurement at measurement node 393 when switch 310 is closed and pulse is applied by AC signal generation circuit; also see, e.g., paragraph 47 (Fig. 3A) and paragraph 56 (Fig. 3B)), wherein the second value is measured across the measurement resistor and comprises an indication of the isolation resistance between chassis ground and the negative bus when the second switch is conducting and the pulse generator delivers a pulse (Healy, e.g. Fig. 3B and paragraphs 52-62, measurement of second value across resistor R1 by controller buffer 391 and resistor divider 375 to generate measurement at measurement node 393 when switch 311 is closed and pulse is applied by AC signal generation circuit; also see, e.g., paragraph 47 (Fig. 3A) and paragraph 56 (Fig. 3B)). Regarding claim 4, Healy discloses a signal conditioning circuit, wherein the signal conditioning circuit is configured to receive the indication of the isolation resistance, and condition the signal for use by other circuitry (see Healy as applied to claim 2, e.g., Fig. 3B, measurement of first/second value across resistor R1 by controller buffer 391 and resistor divider 375 to generate measurement at measurement node 393 for use by other circuitry). Claim 8 recites power distribution system comprising: a power supply configured to supply a load with power, wherein the power supply and load are isolated from a chassis ground for the power distribution system; an isolation measurement circuit comprising: a first switch connecting a first isolation resistor to a first terminal of a measurement resistor, wherein the first isolation resistor also connects to a positive bus of a power distribution system; a second switch connecting a second isolation resistor to a second terminal of the measurement resistor, wherein the second isolation resistor also connects to a negative bus of the power distribution system; and; a pulse generator that connects the measurement resistor to the chassis ground, and is rejected under 35 U.S.C. 102 as anticipated by Healy for reasons analogous to those discussed above in connection with the rejection of claim 1, recognizing that Healy discloses in Fig. 3B a power supply (e.g., battery pack 304) configured to supply a load with power, wherein the power supply and load are isolated from a chassis ground for the power distribution system (e.g., isolation provided by Riso+, Riso-; also see, e.g., paragraphs 12-13). Claim 9 recites wherein the isolation measurement circuit is configured to determine a first value and a second value: wherein the first value is measured across the measurement resistor and comprises an indication of an isolation resistance between chassis ground and the positive bus when the first switch is conducting and the pulse generator delivers a pulse, wherein the second value is measured across the measurement resistor and comprises is an indication of the isolation resistance between chassis ground and the negative bus when the second switch is conducting and the pulse generator delivers a pulse, and is rejected under 35 U.S.C. 102 as anticipated by Healy for reasons analogous to those discussed above in connection with the rejection of claim 2. Claim 11 recites a signal conditioning circuit, wherein the signal conditioning circuit is configured to receive the indication of the isolation resistance, and condition the signal for use by downstream circuitry and is rejected under 35 U.S.C. 102 as anticipated by Healy for reasons analogous to those discussed above in connection with the rejection of claim 4. Regarding claim 14, Healy discloses a method comprising: controlling a switch to connect a bus of a power distribution system to a first terminal of a measurement resistor, wherein the bus connects to the first terminal of the measurement resistor through an isolation resistor (Healy, e.g. Fig. 3B (duplicated above) and paragraphs 52-62, first switch in the form of switch 310 that when controlled to be closed connects first bus in the form of HV-Link+ of a power distribution system to a first (upper) terminal of measurement resistor in the form of resistor R1; see paragraph 56 in particular; also note that HV-Link+ connects to the first (upper) terminal of R1 through a first isolation resistor in the form of resistor R2a); applying, by a pulse generator of an isolation measurement circuit, a pulse between a chassis ground and a second terminal of the measurement resistor (Healy, e.g. Fig. 3B and paragraphs 52-62, pulse generator in the form of AC signal generation circuit that includes auxiliary supply voltage 303 and switches 314-315; see paragraphs 53-54 in particular; note in Fig. 3B that pulse output of pulse generator is applied between chassis ground node 302 and a second (lower) terminal of resistor R1; also see Healy, e.g., Figs. 5A-5B and paragraphs 70-85, step 506), measuring a value across the measurement resistor, wherein the value measured across the measurement resistor comprises an indication of an isolation resistance between a chassis ground and the bus when the switch is conducting and the pulse generator delivers the pulse (Healy, e.g. Fig. 3B and paragraphs 52-62; see paragraph 56 in particular, measurement circuit 306 measures the voltage drop over first resistor 371 (R1) at measurement node 393; also see Healy, e.g., Figs. 5A-5B and paragraphs 70-85, steps 508, 514; also see Fig. 4 and paragraph 64, controller 407 can determine an isolation resistance value for battery pack 404 or the battery link based on the corresponding first voltage measurement and second voltage measurement of either battery pack 404 or the battery link). Regarding claim 15, Healy discloses wherein the switch is a first switch, the bus is a first bus, and the isolation resistor is a first isolation resistor, wherein the value is a first value (see Healy as applied to claim 14), the method further comprising: controlling the first switch to disconnect the first bus from the first terminal of the measurement resistor (Healy, e.g. Fig. 3B and paragraphs 52-62; also see Fig. 3A and paragraph 51; switches 310-313 are individually operated such that the test voltage is applied to a corresponding terminal of battery pack 304 or battery link 305; also see Fig. 4 and paragraph 64, controller 407 may enable switches 410-413 individually to connect the positive and negative terminals of either the battery pack 404 or a battery link (e.g., battery pack 305 of FIGS. 3A and 3B), allowing for two separate voltage measurements (e.g., the first voltage drop and the second voltage drop of FIGS. 3A and 3B) for either of battery pack 404 or the battery link (e.g., battery pack 305 of FIGS. 3A and 3B); it would therefore be clear to one of ordinary skill in the art that in Fig. 3B only one of the switches 310-313 are operated at a time so that the pulse output of the AC signal generation circuitry is applied to only one of HV-Link+, HV-Link-, HV-Pack+ and HV-Pack- at a time; accordingly, in Fig. 3B when switch 311 is operated to couple the pulse output of the AC signal generation circuit to HV-Link-, it is implicit that switch 310 is controlled to disconnect HV-Link+ from the first (upper) terminal of resistor R1); controlling a second to connect a second bus of the power distribution system to the first terminal of the measurement resistor, wherein the second bus connects to the first terminal of the measurement resistor through a second isolation resistor (Healy, e.g. Fig. 3B and paragraphs 52-62, second switch in the form of switch 311 that when controlled to be closed connects second bus in the form of HV-Link- of the power distribution system to the first (upper) terminal of resistor R1; see paragraph 56 in particular; also note that HV-Link+ connects to the first (upper) terminal of R1 through a second isolation resistor in the form of resistor R2b); applying, by the pulse generator of the isolation measurement circuit, a pulse between the chassis ground and the second terminal of the measurement resistor (Healy, e.g. Fig. 3B and paragraphs 52-62, pulse generator in the form of AC signal generation circuit that includes auxiliary supply voltage 303 and switches 314-315; see paragraphs 53-54 in particular; note in Fig. 3B that pulse output of pulse generator is applied between chassis ground node 302 and a second (lower) terminal of resistor R1; also see Healy, e.g., Figs. 5A-5B and paragraphs 70-85, step 510); and measuring a second value across the measurement resistor (Healy, e.g. Fig. 3B and paragraphs 52-62; see paragraph 56 in particular, measurement circuit 306 measures the voltage drop over first resistor 371 (R1) at measurement node 393; also see Healy, e.g., Figs. 5A-5B and paragraphs 70-85, steps 512, 526; also see Fig. 4 and paragraph 64, controller 407 can determine an isolation resistance value for battery pack 404 or the battery link based on the corresponding first voltage measurement and second voltage measurement of either battery pack 404 or the battery link), wherein the second value measured across the measurement resistor is an indication of the isolation resistance between chassis ground and the second bus when the second switch is conducting and the pulse generator delivers the pulse (see Healy as applied above in connection with measuring a second value, e.g., Figs. 5A-5B and paragraphs 70-85, step 526; also see Fig. 4 and paragraph 64, controller 407 can determine an isolation resistance value for battery pack 404 or the battery link based on the corresponding first voltage measurement and second voltage measurement of either battery pack 404 or the battery link). Regarding claim 16, Healy discloses wherein the first switch is conducting when the second switch is not conducting (see Healy as discussed above in connection with claim 15, Healy, e.g. Fig. 3B and paragraphs 52-62; also see Fig. 3A and paragraph 51; switches 310-313 are individually operated such that the test voltage is applied to a corresponding terminal of battery pack 304 or battery link 305; also see Fig. 4 and paragraph 64, controller 407 may enable switches 410-413 individually to connect the positive and negative terminals of either the battery pack 404 or a battery link (e.g., battery pack 305 of FIGS. 3A and 3B), allowing for two separate voltage measurements (e.g., the first voltage drop and the second voltage drop of FIGS. 3A and 3B) for either of battery pack 404 or the battery link (e.g., battery pack 305 of FIGS. 3A and 3B); it would therefore be clear to one of ordinary skill in the art that in Fig. 3B only one of the switches 310-313 are operated at a time so that the pulse output of the AC signal generation circuitry is applied to only one of HV-Link+, HV-Link-, HV-Pack+ and HV-Pack- at a time; accordingly, in Fig. 3B when switch 310 is operated to couple the pulse output of the AC signal generation circuit to HV-Link+, it is implicit that switch 311 is controlled to disconnect HV-Link- from the first (upper) terminal of resistor R1). Regarding claim 18, Healy discloses receiving, by a signal conditioning circuit, the indication of the isolation resistance; and conditioning the signal for use by other circuitry (Healy, e.g. Fig. 3B and paragraphs 52-62, measurement of first and second values across resistor R1 by controller buffer 391 and resistor divider 375 to generate measurements at measurement node 393 when each of switches 310, 311 is respectively closed and pulse is applied by AC signal generation circuit). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claims 3, 5, 10, 12, 17 and 19-20 are rejected under 35 U.S.C. 103 as being unpatentable over Healy. Regarding claim 3, Healy discloses in connection with Figs. 5A-5B for example applying a test voltage to a first terminal of a battery link (step 506), measuring a first voltage drop over a first resistor coupled to the first terminal (step 508), applying the test voltage to a second terminal of the battery link (step 510), measuring a second voltage drop over the first resistor coupled to the second terminal (step 512), determining a first isolation resistance value based on at least the first test voltage applied to the first terminal, the first measured voltage drop, the second measured voltage drop, and a resistance value of the first resistor (step 514), comparing the first isolation resistance value to a predetermined threshold and generating an alert in response to the first isolation resistance value being less than the predetermined threshold (steps 516-518), determining a second isolation resistance value based on the test voltage applied to the second terminal, the first measured voltage drop, the second measure voltage drop, and the resistance value of the first resistor (step 526), comparing the second isolation resistance value to a predetermined threshold and generating an alert in response to the second isolation resistance value being less than the predetermined threshold (steps 528-530) (Healy, e.g., Figs. 5A-5B and paragraphs 70-85). Healy’s approach is therefore to measure the first and second voltage drops across the first resistor, determine the first and second isolation resistance values based on the measured voltage drops, compare each of determined isolation resistance values to a threshold and generate an alert(s) based on the comparisons. Although Healy does not explicitly state that the processes of Figs. 5A-5B are performed repeatedly, at least the phrase “insulation resistance monitoring” (see, e.g., paragraph 70) would be understood by one of ordinary skill as implicitly requiring repetition of Healy’s process over time to realize the monitoring functionality. Claim 3 recites wherein the isolation measurement circuit is configured to determine whether an isolation ground failure exists by: taking repeated values measured across the measurement resistor over time; and determine whether a measured value deviates by a threshold amount relative to the repeated value measurements. Claim 3 differs from Healy’s arrangement in that claim 3 directly compares the resistor voltage drop measurements to a threshold, whereas Healy first converts the resistor voltage drop measurements to an isolation resistance value, which is then compared to an isolation resistance threshold. In other words, claim 3 performs threshold comparisons directly in terms of voltage, whereas Healy performs threshold comparisons only after conversion of voltage to isolation resistance. One of ordinary skill in the art would nonetheless understand that Healy’s threshold comparison may equivalently be implemented in terms of voltage simply by converting the isolation resistance threshold to a corresponding voltage threshold. Such reasoning falls well within the inferences and creative steps that a person of ordinary skill in the art would employ in light of Healy’s arrangement of Fig. 3B and the knowledge of one of ordinary skill in the art. For this reason, claim 3 does not patentably define over Healy’s arrangement of Fig. 3B and the processes of Figs. 5A-5B. Regarding claim 5, Healy as applied to claim 4 is not relied upon as explicitly disclosing wherein the signal conditioning circuit comprises a differential amplifier. The examiner takes Official notice of the fact that the use of an operational amplifier (a differential amplifier) to suitably amplify voltage signals (such as a voltage signal output by measurement node 393 in Fig. 3B of Healy) for processing by subsequent circuit stages was well-known and conventional before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Healy such that Healy’s signal conditioning circuit includes a differential amplifier. In this way, Healy’s voltage output, e.g., output at measurement node 393 in Fig. 3B of Healy, may be suitably amplified for processing by subsequent circuit stages as is well-known and conventional in the electronic arts. Claim 10 recites wherein the isolation measurement circuit is configured to determine whether an isolation ground failure exists by: repeated values measured across the measurement resistor over time; determine whether a measured value deviates by a threshold amount relative to the repeated value measurements, and is rejected under 35 U.S.C. 103 as unpatentable over Healy for reasons analogous to those discussed above in connection with the rejection of claim 3. Claim 12 recites wherein the signal conditioning circuit comprises a differential amplifier and is rejected under 35 U.S.C. 103 as unpatentable over Healy for reasons analogous to those discussed above in connection with the rejection of claim 5. Regarding claim 17, Healy discloses in connection with Figs. 5A-5B for example applying a test voltage to a first terminal of a battery link (step 506), measuring a first voltage drop over a first resistor coupled to the first terminal (step 508), applying the test voltage to a second terminal of the battery link (step 510), measuring a second voltage drop over the first resistor coupled to the second terminal (step 512), determining a first isolation resistance value based on at least the first test voltage applied to the first terminal, the first measured voltage drop, the second measured voltage drop, and a resistance value of the first resistor (step 514), comparing the first isolation resistance value to a predetermined threshold and generating an alert in response to the first isolation resistance value being less than the predetermined threshold (steps 516-518), determining a second isolation resistance value based on the test voltage applied to the second terminal, the first measured voltage drop, the second measure voltage drop, and the resistance value of the first resistor (step 526), comparing the second isolation resistance value to a predetermined threshold and generating an alert in response to the second isolation resistance value being less than the predetermined threshold (steps 528-530) (Healy, e.g., Figs. 5A-5B and paragraphs 70-85). Healy’s approach is therefore to measure the first and second voltage drops across the first resistor, determine the first and second isolation resistance values based on the measured voltage drops, compare each of determined isolation resistance values to a threshold and generate an alert(s) based on the comparisons. Although Healy does not explicitly state that the processes of Figs. 5A-5B are performed repeatedly, at least the phrase “insulation resistance monitoring” (see, e.g., paragraph 70) would be understood by one of ordinary skill as implicitly requiring repetition of Healy’s process over time to realize the monitoring functionality. Claim 17 recites determining whether an isolation ground failure exists based on: performing repeated value measurements across the measurement resistor; and determining whether a measured value deviates by a threshold amount relative to the repeated value measurements. Claim 17 differs from Healy’s arrangement in that claim 17 directly analyzes the resistor voltage drop measurements with respect to a threshold amount, whereas Healy first converts the resistor voltage drop measurements to an isolation resistance value, which is then compared to an isolation resistance threshold. In other words, claim 17 performs the threshold analysis directly in terms of voltage, whereas Healy performs threshold comparisons only after conversion of voltage to isolation resistance. One of ordinary skill in the art would nonetheless understand that Healy’s threshold comparison may equivalently be implemented in terms of voltage simply by converting the isolation resistance threshold to a corresponding voltage threshold. Such reasoning falls well within the inferences and creative steps that a person of ordinary skill in the art would employ in light of Healy’s arrangement of Fig. 3B and the knowledge of one of ordinary skill in the art. For this reason, claim 17 does not patentably define over Healy’s arrangement of Fig. 3B and the processes of Figs. 5A-5B. Regarding claim 19, Healy as applied to claim 18 is not relied upon as explicitly disclosing wherein the signal conditioning circuit comprises a differential amplifier. The examiner takes Official notice of the fact that the use of an operational amplifier (a differential amplifier) to suitably amplify voltage signals (such as a voltage signal output by measurement node 393 in Fig. 3B of Healy) for processing by subsequent circuit stages was well-known and conventional before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Healy such that Healy’s signal conditioning circuit includes a differential amplifier. In this way, Healy’s voltage output, e.g., output at measurement node 393 in Fig. 3B of Healy, may be suitably amplified for processing by subsequent circuit stages as is well-known and conventional in the electronic arts. Regarding claim 20, Healy is not relied upon as explicitly disclosing measuring a rise time of the value across the measurement resistor, wherein the rise time is an indication of a capacitance between the chassis ground and the bus. In particular, although Healy discloses measuring isolation resistance (e.g., Riso+ and Riso− between battery links 505 and chassis ground node 302 in Fig. 3B), Healy does not explicitly disclose determining values of the Y capacitances (e.g., Cy between battery links 505 and chassis ground node 302 in Fig. 3B). One of ordinary skill in the art would nonetheless understand that proper values of the Y capacitance are critical for maintaining system safety and therefore would understand the advantage of determining values of the Y capacitance values Cy between battery links 505 and chassis ground node 302 in Fig. 3B to ensure a safe operating environment. One of ordinary skill in the art would further be aware of techniques for measuring capacitance in RC circuits using rise time, and would understand that the voltage measured across resistor R1 in Fig. 3B in response to the application of a pulse by the AC signal generation circuit will experience a rise time, e.g., when switch 310 is closed, due to the RC circuit formed by the parallel combination of Riso+ and Cy. It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Healy to include a step of measuring a rise time of the value across the measurement resistor (R1) when switch 310 is closed to apply a pulse to HV-Link+, with the rise time being indicative of a capacitance between the chassis ground and HV-Link+. In this way, a value of the Y capacitance values Cy between HV-Link+ and chassis ground node 302 can be evaluated to ensure a safe operating environment. Claims 6-7 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Healy in view of US 2012/0105220 to Wang et al. (Wang). Regarding claim 6-7, Healy discloses a capacitance between chassis ground and at least one the positive bus or the negative bus (claim 6) and a capacitance between the positive bus and the negative bus (claim 7) (Healy, e.g., Fig. 3B, values of Cy between each of HV-Link+ and HV-Link- and chassis ground node 302; value of Cx between HV-Link+ and HV-Link-). Healy is not relied upon as explicitly disclosing a capacitance measurement circuit configured to measure the values of Cy between each of HV-Link+ and HV-Link- and chassis ground node 302 and a capacitance measurement circuit configured to measure the capacitance value of Cx between HV-Link+ and HV-Link-. Measurement of the x-capacitance and y-capacitance in connection with vehicle propulsion system is known for diagnostic purposes (Wang, e.g., paragraphs 20-21). It would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Healy to include a capacitance measurement circuit configured to measure the values of Cy between each of HV-Link+ and HV-Link- and chassis ground node 302 (claim 6) and a capacitance measurement circuit configured to measure the capacitance value of Cx between HV-Link+ and HV-Link- (claim 7). In this way, in the manner disclosed by Wang, vehicle propulsion system diagnostics can be realized. Claim 13 recites a capacitance measurement circuit configured to measure a capacitance between chassis ground and the positive bus and is rejected under 35 U.S.C. 103 as unpatentable over Healy for reasons analogous to those discussed above in connection with the rejection of claim 6. Allowable Subject Matter Claim 21 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. US 2015/0168480 to Robin et al. relates to a device for continuous detection of a break in electric insulation of a high-voltage cable and an associated detection method. US 2018/0222342 to Comesaña relates to a device and a method for measuring isolation resistance of battery powered systems. US 2022/0011377 to Nakayama et al. relates to an electrical fault detection device that detects a ground fault from a load insulated from a ground, and a vehicle power supply system. Any inquiry concerning this communication or earlier communications from the examiner should be directed to DANIEL R MILLER whose telephone number is (571)270-1964. The examiner can normally be reached 9AM-5PM EST M-F. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lee Rodak can be reached at (571) 270-5628. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /DANIEL R MILLER/Primary Examiner, Art Unit 2863
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Prosecution Timeline

Jun 24, 2024
Application Filed
Jan 24, 2026
Non-Final Rejection — §102, §103, §112 (current)

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