DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 12/16/2024 was filed. The submission is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they include the following reference character(s) not mentioned in the description: At least element 1211 in figure 51 is not cited in the specification. Note, every element number should be checked.
Corrected drawing sheets in compliance with 37 CFR 1.121(d), or amendment to the specification to add the reference character(s) in the description in compliance with 37 CFR 1.121(b) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 21 through 35 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 21 recites “the second light emitting source is stacked on the third light emitting source and the third light emitting source is stacked on the second light emitting source” in lines 8 and 9. This element is circular and therefore unclear, ambiguous, and not supported by the specification. The examiner will interpret this as “the second light emitting source is stacked on the third light emitting source and the third first light emitting source is stacked on the second light emitting source
Claim 34 recites “the second buffer structure, and the second buffer structure” in line 2. This is redundant and ambiguous, the examiner suggests, “the second buffer structure, and the second third buffer structure”.
Claims 22 through 35 depend from and incorporate claim 21.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 21 through 28 and 33 through 35 is/are rejected under 35 U.S.C. 102a1 as being anticipated by Cha (US 2017/0288093)
Regarding claim 21.
Cha teaches:
A pixel device (fig 1:100; [para 0027]) comprising: a first light emitting source (fig 7:30; [para 0044]) comprising a first light emitting structure (fig 7:30; [para 0044])emitting first light (blue; [para 0087]) and a first buffer structure (fig 2,7:non-act,30; [para 0033]) spaced apart (fig 2,7:46; [para 0033,0059]) from the first light emitting structure (fig 7:30; [para 0044]);
a second light emitting source (fig 7:20; [para 0044]) comprising a second light emitting structure (fig 7:20; [para 0044]) emitting second light (green; [para 0085]) and a second buffer structure (fig 2,7:non-act,20; [para 0033])spaced apart (fig 2,7:46; [para 0033,0059]) from the second light emitting structure (fig 7:20; [para 0044]);
and a third light emitting source (fig 7:10; [para 0044]) comprising a third light emitting structure (fig 7:10; [para 0044]) emitting third light (red; [para 0070]) and a third buffer structure (fig 2,7:non-act,10; [para 0033]) spaced apart (fig 2,7:46; [para 0033,0059]) from the third light emitting structure (fig 7:10; [para 0044]), wherein the second light emitting source (fig 7:20; [para 0044]) is stacked on the third light emitting source (fig 7:10; [para 0044]) and the third (first) light emitting source (fig 7:30; [para 0044]) is stacked on the second light emitting source (fig 7:20; [para 0044]), and wherein the first buffer structure, the second buffer structure, and the third buffer structure are non-emissive (fig 2,7:non-act; [para 0033]).
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Regarding claim 22.
Cha teaches the pixel device according to claim 21,
the first light emitting source (fig 7:30; [para 0044]), the second light emitting source (fig 7:20; [para 0044]), and the third light emitting source (fig 7:10; [para 0044]) emit different colors of visible light (red,blue,green; [para 0028]) from one another.
Regarding claim 23.
Cha teaches the pixel device according to claim 21:
the first light emitting source comprises (fig 7:30; [para 0044]) a first-1 semiconductor layer (fig 7:30a; [para 0039]), a first-2 semiconductor layer (fig 7:30c; [para 0039]), and a first active layer (fig 7:30b; [para 0039]) formed between the first-1 semiconductor layer (fig 7:30a; [para 0039]) and the first-2 semiconductor layer (fig 7:30c; [para 0039]), the second light emitting source (fig 7:20; [para 0044]) comprises a second-1 semiconductor layer (fig 7:20a; [para 0039]), a second-2 semiconductor layer (fig 7:20c; [para 0039]), and a second active layer (fig 7:20b; [para 0039]) formed between the second-1 semiconductor layer (fig 7:20a; [para 0039]) and the second-2 semiconductor layer (fig 7:20c; [para 0039]), and the third light emitting source (fig 7:10; [para 0044]) comprises a third-1 semiconductor layer (fig 7:10a; [para 0039]), a third-2 semiconductor layer (fig 7:10c; [para 0039]), and a third active layer (fig 7:10b; [para 0039]) formed between the third-1 semiconductor layer (fig 7:10a; [para 0039]) and the third-2 semiconductor layer (fig 7:10c; [para 0039]).
Regarding claim 24.
Cha teaches the pixel device according to claim 23:
the first light emitting structure (fig 7:30; [para 0044]) comprises the first active layer (fig 7:30b; [para 0039]) and the first-2 semiconductor layer (fig 7:30c; [para 0039]) formed on the first-1 semiconductor layer (fig 7:30a; [para 0039]), the second light emitting structure (fig 7:20; [para 0044]) comprises the second active layer (fig 7:20b; [para 0039]) and the second-2 semiconductor layer (fig 7:20c; [para 0039]) formed on the second-1 semiconductor layer (fig 7:20a; [para 0039]), and the third light emitting structure (fig 7:10; [para 0044]) comprises the third active layer (fig 7:10b; [para 0039]) and the third-2 semiconductor layer (fig 7:10c; [para 0039]) formed on the third-1 semiconductor layer (fig 7:10a; [para 0039]).
Regarding claim 25.
Cha teaches the pixel device according to claim 23:
the first buffer structure (fig 2,7:non-act,30; [para 0033]) comprises the first active layer (fig 7:30b; [para 0039]) and the first-2 semiconductor layer (fig 7:30c; [para 0039]) formed on the first-1 semiconductor layer (fig 7:30a; [para 0039]), the second buffer structure (fig 2,7:non-act,20; [para 0033]) comprises the second active layer (fig 7:20b; [para 0039]) and the second-2 semiconductor layer (fig 7:20c; [para 0039]) formed on the second-1 semiconductor layer (fig 7:20a; [para 0039]), the third buffer structure (fig 2,7:non-act,10; [para 0033]) comprises the third active layer (fig 7:10b; [para 0039]) and the third-2 semiconductor layer (fig 7:10c; [para 0039]) formed on the third-1 semiconductor layer (fig 7:10a; [para 0039]).
Regarding claim 26.
Cha teaches the pixel device according to claim 23;
a common electrode (fig 7:12,22,32; [para 0045]) electrically connected to all of the first-1 semiconductor layer (fig 7:30a; [para 0039]), the second-1 semiconductor layer (fig 7:20a; [para 0039]), and the third-1 semiconductor layer (fig 7:10a; [para 0039]);
a first electrode (fig 7:15,25,35; [para 0049]) electrically connected to the first-2 semiconductor layer (fig 7:30c; [para 0039]);
a second electrode (fig 7:14,24; [para 0051]) electrically connected to the second-2 semiconductor layer (fig 7:20c; [para 0039]);
and a third electrode (fig 7:13; [para 0054]) electrically connected to the third-2 semiconductor layer (fig 7:10c; [para 0039]).
Regarding claim 27.
Cha teaches the pixel device according to claim 26:
a first transparent layer (fig 7:36; [para 0087]) disposed between the first light emitting source (fig 7:30; [para 0044]) and the second light emitting source (fig 7:20; [para 0044]);
and a second transparent layer (fig 7:26; [para 0085]) disposed between the second light emitting source (fig 7:20; [para 0044]) and the third light emitting source (fig 7:10; [para 0044]).
Regarding claim 28.
Cha teaches the pixel device according to claim 27:
the common electrode (fig 7:12,22,32; [para 0045]) is formed through the first transparent layer (fig 7:36; [para 0087]) and the second transparent layer (fig 7:26; [para 0085]) to be electrically connected to the first-1 semiconductor layer (fig 7:30a; [para 0039]) and the second-1 semiconductor layer (fig 7:20a; [para 0039]), the first electrode (fig 7:15; [para 0049]) is formed through the first transparent layer (fig 7:36; [para 0087]) and the second transparent layer (fig 7:26; [para 0085]) to be electrically connected to the first-2 semiconductor layer (fig 7:30c; [para 0039]), and the second electrode (fig 7:14; [para 0051]) is formed through the second transparent layer (fig 7:26; [para 0085]) to be electrically connected to the second-2 semiconductor layer (fig 7:20c; [para 0039]).
Regarding claim 33.
Cha teaches the pixel device according to claim 21,
the second light emitting structure (fig 7:20; [para 0044]) is partially disposed on the first light emitting structure (fig 7:30; [para 0044]) and the third light emitting structure (fig 7:10; [para 0044]) is partially disposed on the second light emitting structure (fig 7:20; [para 0044]).
Regarding claim 34.
Cha teaches the pixel device according to claim 33,
the first buffer structure (fig 2,7:non-act,30; [para 0033]), the second buffer structure (fig 2,7:non-act,20; [para 0033]), and the second (third) buffer structure (fig 2,7:non-act,10; [para 0033]) are formed outside a region (fig 2,7:50; [para 0031,0033]) in which all of the first light emitting structure (fig 7:30; [para 0044]), the second light emitting structure (fig 7:20; [para 0044]), and the third light emitting structure (fig 7:10; [para 0044]) are stacked.
Regarding claim 35.
Cha teaches the pixel device according to claim 26,
the common electrode (fig 7:12,22,32; [para 0045]), the first electrode (fig 7:15; [para 0049]), the second electrode (fig 7:14; [para 0051]), and the third electrode (fig 7:13; [para 0054]) are formed outside a region in which all of the first light emitting structure, the second light emitting structure, and the third light emitting structure are stacked (fig 2,7).
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Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Rejection Note: Italicized and struck through claim limitations indicate limitations that are not explicitly disclosed in the primary reference, but disclosed in the secondary reference(s).
Claim(s) 29 through 32 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cha (US 2017/0288093) as applied to claim 28 and further in view of Cha (US 2017/0288093)
Regarding claim 29.
Cha teaches the pixel device according to claim 28,
the common electrode (fig 7:12,22,32; [para 0045]) comprises: a first-1 layer (fig 7:32a; [para 0046]) formed on the first-1 semiconductor layer (fig 7:30a; [para 0039]) of the first light emitting source (fig 7:30; [para 0044]) to contact first-1 semiconductor layer (fig 7:30a; [para 0039]);
a first-1 connection layer (fig 7:32b; [para 0046]) formed through the first transparent layer (fig 7:36; [para 0087]) to contact the first-1 layer (fig 7:32a; [para 0046]);
a second-1 layer (fig 7:42b,22a; [para 0045,0046]) formed through the second-1 semiconductor layer (fig 7:20a; [para 0039]) of the second light emitting source (fig 7:20; [para 0044]) to contact the second-1 semiconductor layer (fig 7:20a; [para 0039]);
a second-1 connection layer (fig 7:22b; [para 0046]) formed through the second transparent layer (fig 7:26; [para 0085]) to contact the second-1 layer (fig 7:42b,22a; [para 0045,0046]);
and a third-1 layer (fig 7:42a,12a; [para 0045,0046]) formed through the third-1 semiconductor layer (fig 7:10a; [para 0039]) of the third light emitting source (fig 7:10; [para 0044]) to contact the third-1 semiconductor layer (fig 7:10a; [para 0039]), at least a region of the first-1 connection layer (fig 7:32b; [para 0046]) being disposed on the first-1 layer (fig 7:32a; [para 0046]), at least a region of the second-1 layer (fig 7:42b,22a; [para 0045,0046]) being disposed on the first-1 connection layer (fig 7:32b; [para 0046]), at least a region of the second-1 connection layer (fig 7:22b; [para 0046]) being disposed on the second-1 layer (fig 7:42b,22a; [para 0045,0046]), and at least a region of the third-1 layer (fig 7:42a,12a; [para 0045,0046]) being disposed on the second-1 connection layer (fig 7:22b; [para 0046]).
Chu does not state that the layers are metal layers.
Chu teaches:
Forming electrodes (fig 12:12b,13b,14b; [para 0079]) from metaland vias (fig 21:42a,4a,45a; [para 0101]) from metal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use metal for the conductive layer elements due to metals’ high conductivity
Regarding claim 30
Cha teaches the pixel device according to claim 28,
the first electrode (fig 7:15,25,35; [para 0049]) comprises: a first-2 layer (fig 7:35a; [para 0055]) formed on the first-2 semiconductor layer (fig 7:30c; [para 0039]) of the first light emitting source (fig 7:30; [para 0044]) to be electrically connected to the first-2 semiconductor layer (fig 7:30c; [para 0039]);
a first-2 connection layer (fig 7:35b; [para 0055]) formed through the first transparent layer (fig 7:36; [para 0087]) to contact the first-2 layer (fig 7:35a; [para 0055]);
a second-2 layer (fig 7:45b; [para 0054]) formed through the second-1 semiconductor layer (fig 7:20a; [para 0039]) of the second light emitting source (fig 7:20; [para 0044]) and insulated (fig 7:27; [para 0057]) from the second-1 semiconductor layer (fig 7:20a; [para 0039]);
a second-2 connection layer (fig 7:25; [para 0054])formed through the second transparent layer (fig 7:26; [para 0085]) to contact the second-2 layer (fig 7:45b; [para 0054]);
and a third-2 layer (fig 7:45a; [para 0054]) formed through the third-1 semiconductor layer (fig 7:10a; [para 0039]) of the third light emitting source (fig 7:10; [para 0044]) and insulated (fig 7:17; [para 0057]) from the third-1 semiconductor layer (fig 7:10a; [para 0039]), at least a region of the first-2 connection layer (fig 7:35b; [para 0055]) being disposed on the first-2 layer (fig 7:45b; [para 0054]), at least a region of the second-2 layer (fig 7:45b; [para 0054]) being disposed on the first-2 connection layer (fig 7:35b; [para 0055]), at least a region of the second-2 connection layer (fig 7:25; [para 0054]) being disposed on the second-2 layer (fig 7:45b; [para 0054]), and at least a region of the third-2 layer (fig 7:45a; [para 0054]) being disposed on the second-2 connection layer (fig 7:25; [para 0054]).
Chu does not state that the layers are metal layers.
Chu teaches:
Forming electrodes (fig 12:12b,13b,14b; [para 0079]) from metaland vias (fig 21:42a,4a,45a; [para 0101]) from metal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use metal for the conductive layer elements due to metals’ high conductivity
Regarding claim 31
Cha teaches the pixel device according to claim 28,
the second electrode (fig 7:14,24; [para 0051]) comprises: a second-3 layer (fig 7:24a; [para 0052]) formed on the second-2 semiconductor layer (fig 7:20c; [para 0039]) of the second light emitting source (fig 7:20; [para 0044]) to be electrically connected to the second-2 semiconductor layer (fig 7:20c; [para 0039]);
a second-3 connection layer (fig 7:24b; [para 0052]) formed through the second transparent layer (fig 7:26; [para 0085]) to contact the second-3 layer (fig 7:24a; [para 0052]);
and a third-3 layer (fig 7:42a; [para 0045]) formed through the third-1 semiconductor layer (fig 7:10a; [para 0039]) of the third light emitting source (fig 7:10; [para 0044]) and insulated (fig 7:17; [para 0057]) from the third-1 semiconductor layer (fig 7:10a; [para 0039]), at least a region of the second-3 connection layer (fig 7:24b; [para 0052]) being disposed on the second-3 layer (fig 7:24a; [para 0052]), and at least a region of the third-3 layer (fig 7:42a; [para 0045])being disposed on the second-3 connection layer (fig 7:24b; [para 0052]).
Chu does not state that the layers are metal layers.
Chu teaches:
Forming electrodes (fig 12:12b,13b,14b; [para 0079]) from metaland vias (fig 21:42a,4a,45a; [para 0101]) from metal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use metal for the conductive layer elements due to metals’ high conductivity
Regarding claim 32.
Cha teaches the pixel device according to claim 28,
the third electrode (fig 7:13; [para 0054]) comprises a third-4 layer (fig 7:13a; [para 0049]) formed on the third-2 semiconductor layer (fig 7:10c; [para 0039]) of the third light emitting source (fig 7:10; [para 0038]) to be electrically connected to the third-2 semiconductor layer (fig 7:10c; [para 0039]).
Chu does not state that the layers are metal layers.
Chu teaches:
Forming electrodes (fig 12:12b,13b,14b; [para 0079]) from metaland vias (fig 21:42a,4a,45a; [para 0101]) from metal.
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use metal for the conductive layer elements due to metals’ high conductivity
Conclusion
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/D.J.G/Examiner, Art Unit 2817 /NICHOLAS J TOBERGTE/Primary Examiner, Art Unit 2817
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